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公开(公告)号：KR1019990050432A
公开(公告)日：1999-07-05
申请号：KR1019970069551
申请日：1997-12-17
Applicant: 한국전자통신연구원
IPC: H04B1/00
Abstract: 본 발명은 피드백을 이용한 MMIC 캐스코드 혼합기에 관한 것으로, 특히, 특히 무선통신 및 광통신에 사용되는 피드백을 이용한 MMIC 캐스코드 혼합기에 관한 것이다. 본 발명의 목적은 주파수 대역폭과 안정도를 향상하면서도 웨이퍼의 소요 면적을 절약하여 신뢰성이 증대되고 제작비용을 절감할 수 있는 피드백을 이용한 MMIC 캐스코드 혼합기를 제공하는 데에 있다. 본 발명의 피드백을 이용한 MMIC 캐스코드 혼합기는 게이트에 국부 발진기의 입력신호가 인가되고 드레인에서 주파수 변조된 중간 주파수를 얻는 제 1FET 및 게이트에 RF 주파수의 입력신호가 인가되는 제 2FET와, 상기 제 1FET의 게이트와 드레인 사이에 피드백으로 연결되어 상기 국부 발진기의 입력신호와 상기 중간 주파수의 출력신호에 대한 주파수 대역폭을 넓히고 회로의 안정도를 증가시키는 제 1안정수단과, 상기 제 2FET의 게이트와 드레인 사이에 피드백으로 연결되어 상기 RF 주파수의 입력신호와 상기 중간 주파수의 출력신호에 대한 주파수 대역폭을 넓이고 회로의 안정도를 증가시키는 제 2안정수단을 구비한다.
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公开(公告)号：KR1019970001888B1
公开(公告)日：1997-02-18
申请号：KR1019930026305
申请日：1993-12-03
Applicant: 한국전자통신연구원
IPC: H01L23/34
Abstract: A method for thermal emitting of electric power FET(field effect transistor) for micro wave is disclosed. The method for thermal emitting of electric power FET(field effect transistor) for micro wave comprises the steps of: a) forming a photoresist(22) and deposing the etching mask(11); b) etching a lower portion of a channel layer using the channel etching mask(11) to a predetermined thickness; c) removing the channel etching mask(11); d) depositing titanium and base metal(55) to a predetermined thickness; e) forming a photoresist(22) for filling an only channel layer on the resulting deposited structure; f) forming a filled gold except for the photoresist(22); g) removing the photoresist(22); and h) performing a plating of gold to a predetermined thickness. Thereby, the thermal emitting is effectively achieved compared with the prior art.
Abstract translation: 公开了一种用于微波的功率FET（场效应晶体管）的热发射方法。 用于微波的电功率FET（场效应晶体管）的热发射方法包括以下步骤：a）形成光致抗蚀剂（22）并去除蚀刻掩模（11）; b）使用沟道蚀刻掩模（11）将沟道层的下部蚀刻至预定厚度; c）去除沟道蚀刻掩模（11）; d）将钛和贱金属（55）沉积到预定厚度; e）形成光致抗蚀剂（22），用于填充所得沉积结构上的唯一沟道层; f）除了光致抗蚀剂（22）之外，形成填充的金; g）去除光致抗蚀剂（22）; 和h）进行镀金至预定厚度。 因此，与现有技术相比，有效地实现了热发射。
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公开(公告)号：KR1019920010132B1
公开(公告)日：1992-11-16
申请号：KR1019890012336
申请日：1989-08-29
Applicant: 한국전자통신연구원
IPC: H01L21/36
CPC classification number: G01N33/64 , C12Q1/26 , C12Q1/32 , C12Q1/34 , C12Q1/37 , C12Q1/40 , C12Q1/48 , C12Q1/527 , C12Q2334/10 , C12Q2337/12 , G01N33/84 , G01N2333/9121 , G01N2333/924 , Y10S435/962
Abstract: The method uses a regrowing process to form epitaxial layers onto a substrate, the epitaxial layers having different structures respectively, thereby mounting multifunctional elements on a single chip. The method comprises the steps of depositing a dielectric layer (13) onto a first epitaxial layer (12) grown on a semiconductor substrate (11), etching the desired portions of the layers (12,13) to form a mesa structure (12a,13a), regrowing second epitaxial layer (14) thereon, and removing the dielectric layer (13a) and the second epilaxial layer (14a) formed on the layer (13a) by using a lift-off process, thereby forming two different epitaxial layers (12a,14) on a substrate (11).
Abstract translation: 该方法使用再生过程在衬底上形成外延层，外延层分别具有不同的结构，从而将多功能元件安装在单个芯片上。 该方法包括以下步骤：在生长在半导体衬底（11）上的第一外延层（12）上沉积介电层（13），蚀刻所述层（12,13）的所需部分以形成台面结构（12a， 在其上重新生长第二外延层（14），并通过剥离工艺去除形成在层（13a）上的电介质层（13a）和第二外延层（14a），从而形成两个不同的外延层（ 12a，14）。
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Patent Agency Ranking
公开(公告)号：KR1019920007336B1
公开(公告)日：1992-08-31
申请号：KR1019890012681
申请日：1989-09-01
Applicant: 한국전자통신연구원
IPC: H01L21/20
Abstract: The method for using a silicon mask to form the epitaxial layers with different growth layer structures on one substrate by using a molecular beam epitaxy technique comprises the steps of forming a first epitaxial layer (16) by using a silicon mask (12) to deposit an Al layer (17) thereon, removing the silicon mask (12) to grow a second epitaxial layer (18) and lifting-off the Al and epitaxial layer (17,18) by etching the Al layer (17) by using a chemical method, thereby obtaining the epitaxial layers with different structures to reduce the manufacturing time.
Abstract translation: 通过使用分子束外延技术在一个衬底上使用硅掩模来形成具有不同生长层结构的外延层的方法包括以下步骤：通过使用硅掩模（12）形成第一外延层（16）以沉积 Al层（17），通过使用化学方法蚀刻Al层（17），去除硅掩模（12）以生长第二外延层（18）并提升Al和外延层（17,18） 从而获得具有不同结构的外延层以减少制造时间。
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公开(公告)号：KR1019920004365B1
公开(公告)日：1992-06-04
申请号：KR1019890012680
申请日：1989-09-01
Applicant: 한국전자통신연구원
IPC: H01L27/04
Abstract: The method for forming an ohmic contact with buried type to manufacture a modulated doping FET (MODFET) comprises etching the source and drain region to the two dimensional electron gas channel layer (12a) to form a large spacer (20) and depositing a metallic film thereon to form a buried ohmic contact (15), thereby the layer (12a) and the contact (15) being connected directly. The method need not control the complex reaction mechanism between the metal of the contact and the layer made of different materials. The method controls the length of a channel exactly.
Abstract translation: 用于形成具有掩埋型的欧姆接触以制造调制掺杂FET（MODFET）的方法包括将源极和漏极区域蚀刻到二维电子气体沟道层（12a）以形成大的间隔物（20）并沉积金属膜 在其上形成埋入的欧姆接触（15），由此层（12a）和触点（15）直接连接。 该方法不需要控制接触金属与不同材料层之间的复杂反应机理。 该方法精确地控制通道的长度。
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公开(公告)号：KR1019920001914B1
公开(公告)日：1992-03-06
申请号：KR1019890012068
申请日：1989-08-24
Applicant: 한국전자통신연구원
Abstract: The metal wiring for a semiconductor element is formed by (A) forming a photosensitive film on the semiconductor substrate, (B) enhancing the stength of photosensitive film by low-temperature treating, (C) dipping the photosensitive film in monochlorobenzene, (D) recovering the strength of photosensitive film, (E) selectively exposing the photosensitive film, (F) high-temperature treating the film after developing, (G) depositing a metal layer on the upper side of the film, and (H) reproducing disired metal wiring by the lifting-off process.
Abstract translation: （A）在半导体基板上形成感光膜，（B）通过低温处理提高感光膜的长度，（C）将感光膜浸渍在一氯苯中，形成（D） 回收感光膜的强度，（E）选择性地曝光感光膜，（F）显影后对膜进行高温处理，（G）在膜的上侧沉积金属层，和（H）再现无色金属 通过起吊过程进行接线。
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