中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

24 records (took 0.018 seconds)

    Radiation hardened transistors based on graphene and carbon nanotubes
    12.
    发明专利
    Radiation hardened transistors based on graphene and carbon nanotubes 未知

    公开(公告)号：GB2515948A

    公开(公告)日：2015-01-07

    申请号：GB201418568

    申请日：2012-01-10

    Applicant: IBM

    Inventor： LIN YU-MING ,  YAU JENG-BANG

    IPC: H01L29/786

    Abstract: A radiation hard substrate comprising a silicon wafer coated with a layer of SiC, CaF2 or fluorinated silicon oxide is provided. A carbon-based material of graphene or carbon nanotubes is formed on the substrate, which serves as the actve material used to fabricate the transistor. Contacts are formed to the portions of the carbon-based material that serve as the source and drain regions of the transistor. A gate dielectric is deposited over the portion of the carbon based material that serves as the channel region of the transistor. A top-gate contact is formed on the gate dielectric.

    Selbstausgerichteter Graphentransistor
    13.
    发明专利
    Selbstausgerichteter Graphentransistor 未知

    公开(公告)号：DE112010004367B4

    公开(公告)日：2014-08-07

    申请号：DE112010004367

    申请日：2010-08-31

    Applicant: IBM

    Inventor： LIN YU-MING ,  JENKINS KEITH AELWYN ,  VALDES GARCIA ALBERTO

    IPC: H01L29/786 ,  H01L29/49

    Abstract: Graphen-Feldeffekttransistor, welcher das Folgende umfasst: einen Gate-Stapel, wobei der Gate-Stapel eine Keimschicht (504), ein über der Keimschicht ausgebildetes Gate-Oxid (502) und ein über dem Gate-Oxid ausgebildetes Gate-Metall (402) umfasst; eine isolierende Schicht (104); und eine Graphenschicht (106), welche zwischen der Keimschicht und der isolierenden Schicht angeordnet ist; und einen Abstandhalter (602), der auf einer oberen Seite und auf beiden Seiten des Gate-Stapels ausgebildet ist.

    Graphene channel-based devices and methods for fabrication thereof
    14.
    发明专利
    Graphene channel-based devices and methods for fabrication thereof 未知

    公开(公告)号：GB2493238A

    公开(公告)日：2013-01-30

    申请号：GB201208558

    申请日：2011-04-26

    Applicant: IBM

    Inventor： CHEN KUAN-NENG ,  LIN YU-MING ,  AVOURIS PHAEDON ,  FARMER DAMON BROOKS

    IPC: H01L21/822 ,  B82Y10/00 ,  H01L27/06 ,  H01L27/12 ,  H01L29/16 ,  H01L29/786

    Abstract: Graphene-channel based devices and techniques for the fabrication thereof are provided. In one aspect, a semiconductor device includes a first wafer having at least one graphene channel formed on a first substrate, a first oxide layer surrounding the graphene channel and source and drain contacts to the graphene channel that extend through the first oxide layer; and a second wafer having a CMOS device layer formed in a second substrate, a second oxide layer surrounding the CMOS device layer and a plurality of contacts to the CMOS device layer that extend through the second oxide layer, the wafers being bonded together by way of an oxide-to-oxide bond between the oxide layers. One or more of the contacts to the CMOS device layer are in contact with the source and drain contacts. One or more other of the contacts to the CMOS device layer are gate contacts for the graphene channel.

    Graphene channel-based devices and methods for fabrication thereof
    15.
    发明专利
    Graphene channel-based devices and methods for fabrication thereof 未知

    公开(公告)号：GB2507686B

    公开(公告)日：2014-07-16

    申请号：GB201402301

    申请日：2011-04-26

    Applicant: IBM

    Inventor： CHEN KUAN-NENG ,  LIN YU-MING ,  AVOURIS PHAEDON ,  FARMER DAMON BROOKS

    IPC: H01L29/16 ,  H01L21/822

    Abstract: Graphene-channel based devices and techniques for the fabrication thereof are provided. In one aspect, a semiconductor device includes a first wafer having at least one graphene channel formed on a first substrate, a first oxide layer surrounding the graphene channel and source and drain contacts to the graphene channel that extend through the first oxide layer; and a second wafer having a CMOS device layer formed in a second substrate, a second oxide layer surrounding the CMOS device layer and a plurality of contacts to the CMOS device layer that extend through the second oxide layer, the wafers being bonded together by way of an oxide-to-oxide bond between the oxide layers. One or more of the contacts to the CMOS device layer are in contact with the source and drain contacts. One or more other of the contacts to the CMOS device layer are gate contacts for the graphene channel.

    Partially exposed doped graphene channel based transistor
    16.
    发明专利
    Partially exposed doped graphene channel based transistor 未知

    公开(公告)号：GB2507686A

    公开(公告)日：2014-05-07

    申请号：GB201402301

    申请日：2011-04-26

    Applicant: IBM

    Inventor： CHEN KUAN-NENG ,  LIN YU-MING ,  AVOURIS PHAEDON ,  FARMER DAMON BROOKS

    IPC: H01L29/16 ,  H01L21/822

    Abstract: Graphene-channel based transistor comprising a substrate with a source and a drain contact 2102, and a graphene channel 2502 formed on the substrate 1704 which connects the contacts. A gate contact 2902 over the graphene channel, separated from the channel with a dielectric. The gate contact is positioned in a non-overlapping position with the source and drain contacts; this leaves exposed sections 3102 of the graphene channel, which can then be doped with an n-type or p-type dopant 3302. A capping layer may be provided over the source, drain and gate contacts, as well as the exposed sections of the graphene channel. The substrate may comprise an insulating layer on the channel. The substrate may comprise an insulating wafer or a wafer having an insulating over layer or a silicon carbide layer. The capping layer may comprise an oxide or a nitride material. There may be more than one layer of graphene on the substrate and this may be deposited using exfoliation or by silicon sublimation with epitaxy.

    GRAPHENE CHANNEL-BASED DEVICES AND METHODS FOR FABRICATION THEREOF
    18.
    发明专利
    GRAPHENE CHANNEL-BASED DEVICES AND METHODS FOR FABRICATION THEREOF 未知

    公开(公告)号：SG184823A1

    公开(公告)日：2012-11-29

    申请号：SG2012075578

    申请日：2011-04-26

    Applicant: IBM

    Inventor： CHEN KUAN-NENG ,  LIN YU-MING ,  AVOURIS PHAEDON ,  FARMER DAMON BROOKS

    Abstract: Graphene-channel based devices and techniques for the fabrication thereof are provided. In one aspect, a semiconductor device includes a first wafer having at least one graphene channel formed on a first substrate, a first oxide layer surrounding the graphene channel and source and drain contacts to the graphene channel that extend through the first oxide layer; and a second wafer having a CMOS device layer formed in a second substrate, a second oxide layer surrounding the CMOS device layer and a plurality of contacts to the CMOS device layer that extend through the second oxide layer, the wafers being bonded together by way of an oxide-to-oxide bond between the oxide layers. One or more of the contacts to the CMOS device layer are in contact with the source and drain contacts. One or more other of the contacts to the CMOS device layer are gate contacts for the graphene channel.

Patent Agency Ranking