公开(公告)号：DE10232788A1

公开(公告)日：2003-02-06

申请号：DE10232788

申请日：2002-07-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BEER GOTTFRIED ,  BERGMANN ROBERT ,  HONG HENG WAN JENNY

IPC: H01L23/433 ,  H01L23/495 ,  H01L23/06 ,  H01L23/50 ,  H01L23/34 ,  H01L23/057 ,  H01L21/50

Abstract: The device has at least one semiconducting chip, flat conductors, a heat conducting block for a system carrier and a housing of a synthetic material, whereby the chip is mounted on the heat conducting block by its passive rear side. Inner flat conductor ends are arranged in the block region to overlap and the electronic component has an organoceramic insulation, adhesive and heat conducting coating between the ends and the block in the overlap region. The device has at least one semiconducting chip, flat conductors, a heat conducting block for a system carrier and a housing of a synthetic material, whereby the chip is mounted on the heat conducting block by its passive rear side. Inner flat conductor ends are arranged in the block region to overlap and the electronic component has an organoceramic insulation, adhesive and heat conducting coating (6) between the ends and the block in the overlap region. Independent claims are also included for the following: (a) a system carrier (b) a method of manufacturing a system carrier (c) and a method of manufacturing an inventive electronic component with semiconducting chip.

公开(公告)号：DE102009040632B4

公开(公告)日：2017-11-16

申请号：DE102009040632

申请日：2009-09-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RIEDL EDMUND ,  NIKITIN IVAN ,  LODERMEYER JOHANNES ,  BERGMANN ROBERT ,  GUTH KARSTEN

IPC: H01L21/58 ,  H01L21/60 ,  H01L23/48

Abstract: Verfahren zum Herstellen eines Halbleiter-Bauelements, umfassend: Bereitstellen eines Metallträgers (1); Bereitstellen eines Halbleiterchips (2); Aussetzen mindestens eines des Metallträgers (1) und des Halbleiterchips (2) einer metallionenhaltigen Flüssigkeit und somit Herstellen einer porösen Schicht (3) an einer Oberfläche mindestens eines des Metallträgers (1) und des Halbleiterchips (2); Anlegen einer Spannung zwischen der metallionenhaltigen Flüssigkeit und mindestens eines des Metallträgers (1) und Halbleiterchips (2); Platzieren des Halbleiterchips (2) auf dem Metallträger (1), so dass die poröse Schicht (3) eine Zwischenschicht zwischen dem Metallträger (1) und dem Halbleiterchip (2) bildet und mit beiden direkt verbunden ist; und Erhitzen des Metallträgers (1) und des Halbleiterchips (2), bis der Halbleiterchip (2) an dem Metallträger (1) angebracht ist.

公开(公告)号：DE102009040632A1

公开(公告)日：2010-04-01

申请号：DE102009040632

申请日：2009-09-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RIEDL EDMUND ,  NIKITIN IVAN ,  LODERMEYER JOHANNES ,  BERGMANN ROBERT ,  GUTH KARSTEN

IPC: H01L21/58 ,  H01L21/60 ,  H01L23/48

Abstract: A method of fabricating a semiconductor device. One embodiment provides a metal carrier. A semiconductor chip is provided. A porous layer is produced at a surface of at least one of the carrier and the semiconductor chip. The semiconductor chip is placed on the carrier. The resulting structure is heated until the semiconductor chip is attached to the carrier.

公开(公告)号：DE102006012007A1

公开(公告)日：2006-09-28

申请号：DE102006012007

申请日：2006-03-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： EWE HENRIK ,  LANDAU STEFAN ,  SCHIESS KLAUS ,  BERGMANN ROBERT

IPC: H01L23/488 ,  H01L21/58 ,  H01L23/498 ,  H01L29/78

Abstract: The module has a power semiconductor chip (6) with a drain contact surface fixed on upper sides (10) of flat outer contacts. An insulation layer (14) covers upper and edge sides of the chip, and an inner housing section under release of source and gate contact surfaces of the chip and contact terminal surfaces on upper sides of source and gate outer contacts. The layer bridges an intermediate space between the contacts in the section. Independent claims are also included for the following: (1) a method of producing a power semiconductor module with surface mountable flat outer contacts (2) an application of a method for producing a power semiconductor module with surface mountable flat outer contacts in a plastic thin dual small outline non leaded package (P-TDSON)-housings and/or modifications of these type of housings and plastic very thin profile quad flat non leaded package (P-VQFN)-housings and/or modifications of these type of housings.

公开(公告)号：DE10349477A1

公开(公告)日：2005-02-24

申请号：DE10349477

申请日：2003-10-21

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHIES KLAUS ,  MAHLER JOACHIM ,  BERGMANN ROBERT

IPC: H01L21/60 ,  H01L23/31 ,  H01L23/488 ,  H01L23/495 ,  H01L23/48

Abstract: A semiconductor component comprises housing (2) and chip (3) with a large surface contact between contact metal (5) on the chip and external contacts (6). Many small chip electrodes (7) are shorted to the contact metal and a transition layer (9) has contact bumps (11) surrounded by electrically conductive adhesive (12) on the contact metal.

公开(公告)号：DE10147789B4

公开(公告)日：2004-04-15

申请号：DE10147789

申请日：2001-09-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HUEBNER HOLGER ,  BERGMANN ROBERT

IPC: B23K1/00 ,  B23K1/005 ,  B23K1/008 ,  B23K1/012 ,  B23K3/08 ,  F24C7/00 ,  F26B19/00 ,  H01L21/00 ,  H01L21/58 ,  H01L21/60 ,  H01L21/603 ,  H05K3/34 ,  H05K13/04

公开(公告)号：DE10124141A1

公开(公告)日：2002-04-11

申请号：DE10124141

申请日：2001-05-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BERGMANN ROBERT ,  LARIK JOOST ,  OTREMBA RALF ,  SCHLOEGEL XAVER ,  SCHREDL JUERGEN

IPC: H01L23/482 ,  H01L23/495 ,  H01L23/50

Abstract: The aim of the invention is to take up the smallest amount of space possible while effecting the thermomechanical release in tension at the junction between a circuit unit (2) and contact device (4) of a circuit (1), said junction being provided by means of the connecting device (10). To this end, the connecting device (10) is essentially provided as a prefabricated metallic or alloy region in the area of the circuit unit (2) and in the area of the contact device (4) while avoiding, to the greatest possible extent, the use of adhesive elements and solder elements.