11.
    发明专利
    未知

    公开(公告)号:DE10051134A1

    公开(公告)日:2002-05-02

    申请号:DE10051134

    申请日:2000-10-16

    Abstract: A method for eliminating phase conflicts that occur in the layout of a phase mask in a localized and automated manner. The method includes a first step in which a set of phase conflicts is completely determined exclusively by using the technical requirements of the design. The first step is an optimum starting point for the following second step for automatically handling and eliminating such conflicts.

    16.
    发明专利
    未知

    公开(公告)号:DE19957542A1

    公开(公告)日:2001-07-05

    申请号:DE19957542

    申请日:1999-11-30

    Abstract: An alternating phase mask having a branched structure containing two opaque segments is described. Two transparent surface segments are disposed on both sides of the segments or the components thereof, respectively. The surface segments are provided with phases that are displaced by 180°±Delta alpha, whereby Delta alpha a is not more than 25°. The surface segments are separated by at least one transparent surface boundary segment whose phase is situated between the phases of the adjacent surface segments.

    17.
    发明专利
    未知

    公开(公告)号:DE19941400A1

    公开(公告)日:2001-03-08

    申请号:DE19941400

    申请日:1999-08-31

    Abstract: Data pertaining to a layout is described in a hierarchical form by cells and cell instances and is located in a first grid structure. Data for the mask is generated in a second grid structure. For each cell instance, the context is determined in the second grid structure. Cell variants are determined for cell instances with different contexts by rounding and scaling. Said cell variants contain the data for the mask in the second grid structure whereby rounding and scaling are context-dependent.

    20.
    发明专利
    未知

    公开(公告)号:DE59812336D1

    公开(公告)日:2005-01-05

    申请号:DE59812336

    申请日:1998-05-11

    Abstract: A doped region is provided on a substrate. A plane with conductive useful structures and a conductive filler structure is arranged at the surface of the substrate. The conductive filler structure is conductively connected to the doped region. In this way, charging of the conductive filler structure, which is provided for improving the planarity of the circuit arrangement and has no circuit-oriented function, is avoided.

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