公开(公告)号：DE102008061165A1

公开(公告)日：2009-07-30

申请号：DE102008061165

申请日：2008-12-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MIO HANNES ,  GROENINGER HORST ,  VILSMEIER HERMANN

IPC: H01L21/78 ,  H01L21/58 ,  H01L21/673 ,  H01L23/02

Abstract: A method for manufacturing a semiconductor device including covering a portion of at least one semiconductor device with a foil, including covering at least one target region of the semiconductor device, and illuminating the foil with a laser to singulate from the foil a portion covering the at least one target region of the at least one semiconductor device.

公开(公告)号：DE102004049654B3

公开(公告)日：2006-04-13

申请号：DE102004049654

申请日：2004-10-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUER MICHAEL ,  BACHMAIER ULRICH ,  HAGEN ROBERT ,  POHL JENS ,  STEINER RAINER ,  STROBEL PETER ,  VILSMEIER HERMANN ,  WOERNER HOLGER ,  ZUHR BERNHARD

IPC: H01L23/50 ,  H01L23/055 ,  H01L25/10

Abstract: A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing; upper outer contact surfaces arranged on a top side of the housing that is opposite the underside; and outer interconnects electrically connecting the lower outer contact surfaces to the upper outer contact surfaces, the outer interconnects including a layer of solder arranged on conduction paths along an outer contour of the housing.

公开(公告)号：DE10360708A1

公开(公告)日：2005-07-28

申请号：DE10360708

申请日：2003-12-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POHL JENS ,  ROEMER BERND ,  SCHAETZLER BERNHARD ,  VILSMEIER HERMANN ,  WOERNER HOLGER ,  ZUHR BERNHARD ,  STUEMPFL CHRISTIAN

IPC: H01L23/12 ,  H01L21/56 ,  H01L23/00 ,  H01L23/04 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H01L25/065 ,  H01L23/50 ,  H01L23/16 ,  H01L21/50

Abstract: An electronic semiconductor module component with a semiconductor stack includes semiconductor components arranged in a vertically stacked relationship. A basic semiconductor component includes a lower interposing unit, on which lower external contact pads are arranged. The basic semiconductor component further includes an upper interposing unit, on which upper external contact pads are arranged. The two interposing units are electrically connected to one another via bonding connections disposed at their edge areas. The basic semiconductor component is a compact component on which different, customer-specific semiconductor components can be stacked.

公开(公告)号：DE10352946A1

公开(公告)日：2005-06-16

申请号：DE10352946

申请日：2003-11-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FUERGUT EDWARD ,  WOERNER HOLGER ,  VILSMEIER HERMANN

IPC: H01L21/56 ,  H01L21/68 ,  H01L21/98 ,  H01L23/498 ,  H01L25/065 ,  H01L23/50 ,  H01L21/60

Abstract: The invention relates to a semiconductor device with a semiconductor chip and a rewiring layer, the semiconductor chip being embedded in a housing plastics composition by its rear side contact. The active top side of the semiconductor chip forms a coplanar overall top side with the top side of the housing plastics composition. The rear side contact is led to the overall top side via a flat conductor sheet tape, so that the rear side contact of the semiconductor chip can be accessed from the overall top side.

公开(公告)号：DE10340902A1

公开(公告)日：2005-02-03

申请号：DE10340902

申请日：2003-09-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BEER GOTTFRIED ,  FUERGUT EDWARD ,  BAUER MICHAEL ,  BEMMERL THOMAS ,  FINK MARKUS ,  JEREBIC SIMON ,  STROBEL PETER ,  VILSMEIER HERMANN

IPC: B01L3/00 ,  C12M1/34 ,  C12M1/38

Abstract: The biochip (4) side surfaces (7) interlock and/or are interference-fitted into the inner walls (3) of the sample chamber (2). Biochip and sample chamber form a transverse pressure- or shrink connection. The connection is alternatively a snap fit. The biochip is circular or rectangular in shape. Chip edges and/or the chamber have seals. The chip is square with rounded corners. The sample chamber is a cuvette. The biochip has a plastic substrate.

公开(公告)号：DE102008061165B4

公开(公告)日：2016-07-14

申请号：DE102008061165

申请日：2008-12-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MIO HANNES ,  GROENINGER HORST ,  VILSMEIER HERMANN

IPC: H01L21/78 ,  H01L21/58 ,  H01L21/673 ,  H01L23/02

Abstract: Verfahren zum Herstellen eines Halbleiterbauelements (34), umfassend: – Bedecken eines Abschnitts mindestens eines Halbleiterbauelements (34), der mindestens ein Zielgebiet des Halbleiterbauelements (34) enthält, mit einer Folie (32); und danach – Beleuchten der Folie (32) mit einem Laser (44), um ein das mindestens eine Zielgebiet des mindestens einen Halbleiterbauelements (34) bedeckendes Stück der Folie (32) zu vereinzeln; wobei das Bedecken ein Drücken der Folie (32) gegen das Halbleiterbauelement (34), so dass die Folie (32) daran haftet, umfasst.

公开(公告)号：DE10333465B4

公开(公告)日：2008-07-24

申请号：DE10333465

申请日：2003-07-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER BERND ,  VILSMEIER HERMANN

IPC: H01L23/50 ,  H01L21/60 ,  H01L23/485

公开(公告)号：DE10352946B4

公开(公告)日：2007-04-05

申请号：DE10352946

申请日：2003-11-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FUERGUT EDWARD ,  WOERNER HOLGER ,  VILSMEIER HERMANN

IPC: H01L23/50 ,  H01L21/56 ,  H01L21/60 ,  H01L21/68 ,  H01L21/98 ,  H01L23/498 ,  H01L25/065

Abstract: The invention relates to a semiconductor device with a semiconductor chip and a rewiring layer, the semiconductor chip being embedded in a housing plastics composition by its rear side contact. The active top side of the semiconductor chip forms a coplanar overall top side with the top side of the housing plastics composition. The rear side contact is led to the overall top side via a flat conductor sheet tape, so that the rear side contact of the semiconductor chip can be accessed from the overall top side.

公开(公告)号：DE102004036909B4

公开(公告)日：2007-04-05

申请号：DE102004036909

申请日：2004-07-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POHL JENS ,  WOERNER HOLGER ,  STEINER RAINER ,  VILSMEIER HERMANN ,  BAUER MICHAEL ,  ZUHR BERNHARD ,  BACHMAIER ULRICH ,  HAGEN ROBERT

IPC: H01L23/50 ,  H01L21/50 ,  H01L21/60 ,  H01L25/065

Abstract: A semiconductor stack and a semiconductor base device with a wiring substrate and an intermediate wiring board for a semiconductor device stack is disclosed. In one embodiment, a semiconductor chip is arranged between the intermediate wiring board and the wiring substrate, which is electrically connected by way of the wiring substrate on the one hand to external contacts on the underside of the wiring substrate and on the other hand to contact terminal areas in the edge regions of the wiring substrate. The intermediate wiring board has angled-away external flat conductors, which are electrically connected in the contact terminal areas of the wiring board. Furthermore, on the upper side of the intermediate wiring board, arranged on the free ends of the internal flat conductors are external contact terminal areas, which correspond in size and arrangement to external contacts of a semiconductor device to be stacked.

公开(公告)号：DE102005007486A1

公开(公告)日：2006-08-31

申请号：DE102005007486

申请日：2005-02-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： JEREBIC SIMON ,  BAUER MICHAEL ,  FUERGUT EDWARD ,  VILSMEIER HERMANN

IPC: H01L23/488 ,  H01L21/48 ,  H05K13/04

Abstract: A semiconductor component including a surface-mount housing and a method for producing the same are described herein. The semiconductor component includes lead pieces embedded into a plastic housing composition and arranged on an underside of the housing. External contact areas of the lead pieces are free of the plastic housing composition. A structured solderable coating is arranged on the external contact areas that have been kept free of the plastic housing composition, the coating includes a plurality of electrically conductive and mechanically elastic contact elements.