公开(公告)号：DE102012112332A1

公开(公告)日：2013-06-20

申请号：DE102012112332

申请日：2012-12-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WEYERS JOACHIM ,  MAUDER ANTON ,  HIRLER FRANZ ,  MEISER ANDREAS ,  GLASER ULRICH

IPC: H01L29/861 ,  H01L29/872

Abstract: Ein Ausführungsbeispiel einer integrierten Schaltung umfasst einen Halbleiterkörper. In dem Halbleiterkörper erstreckt sich ein erster Trenchbereich (104) in den Halbleiterkörper von einer ersten Oberfläche (105) aus. Die integrierte Schaltung umfasst weiterhin eine Diode (100) mit einem Anodenbereich (106) und einem Kathodenbereich (102). Ein Bereich aus dem Anodenbereich (106) und dem Kathodenbereich (102) ist wenigstens teilweise in dem ersten Trenchbereich (104) angeordnet. Der andere Bereich aus dem Anodenbereich (106) und dem Kathodenbereich (102) umfasst einen ersten Halbleiterbereich, der an den einen Bereich aus dem Anodenbereich (106) und dem Kathodenbereich (102) von der Außenseite des ersten Trenchbereiches (104) angrenzt.

公开(公告)号：DE102008051259A1

公开(公告)日：2009-05-20

申请号：DE102008051259

申请日：2008-10-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HIRLER FRANZ ,  SCHULZE HANS-JOACHIM

IPC: H01L29/739 ,  H01L21/331

公开(公告)号：DE10245249B4

公开(公告)日：2008-05-08

申请号：DE10245249

申请日：2002-09-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HENNINGER RALF ,  HIRLER FRANZ

IPC: H01L21/336 ,  H01L21/225 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/78

Abstract: An insulating layer (4) projects over the spacer along the surface of the semiconductor region (9), serving as a dopant source for the semiconductor zone (11) and a channel zone in the semiconductor region (9) runs along the insulating layer (4). An Independent claim is included for the corresponding manufacture.

公开(公告)号：DE102004057235B4

公开(公告)日：2007-12-27

申请号：DE102004057235

申请日：2004-11-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HIRLER FRANZ ,  WERNER WOLFGANG ,  KRUMREY JOACHIM

IPC: H01L29/78 ,  H01L21/336

Abstract: The transistor has transistor cells with source regions (6), body regions (7), gate electrode (9) and contact holes. The contact holes are designed for contacting the source and body regions, where borders of the holes adjoin at a drift region. Body contact regions are arranged between the body regions and the contact holes. The dimensions and designs of the body regions or body contact regions are selected. An independent claim is also included for a method for manufacturing body regions and accordingly body contact regions in a vertical trench transistor.

公开(公告)号：DE102007010884A1

公开(公告)日：2007-09-20

申请号：DE102007010884

申请日：2007-03-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ZUNDEL MARKUS ,  HIRLER FRANZ ,  KRISCHKE NORBERT

IPC: H01L21/334 ,  H01L29/78

Abstract: The method involves arranging trenches (11) in a semiconductor body (100), and providing a gate electrode in the trenches. Electrode structures with an electrode are arranged in the trenches. Trenches of a transistor structure and the trenches of the electrode structures are produced by a common procedure. The electrode of the electrode structures and the gate electrode of the transistor structure are produced by the common procedure. An independent claim is also included for a semiconductor component circuit provided with a semiconductor body.

公开(公告)号：DE102005055838A1

公开(公告)日：2007-05-31

申请号：DE102005055838

申请日：2005-11-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ZUNDEL MARKUS ,  ZELSACHER RUDOLF ,  HIRLER FRANZ

IPC: H01L21/28 ,  H01L21/8234 ,  H01L27/088

Abstract: Production of a contact site in a surface region of a semiconductor structure comprises forming a recess (50) in the surface region up to a prescribed recess depth, implanting a dopant (52) in a recess floor at the recess depth, tempering the structure to diffuse out the dopant and deepening the recess to the required depth. An independent claim is also included for a semiconductor structure having a contact site formed in its surface region.

公开(公告)号：DE102005047056B3

公开(公告)日：2007-01-18

申请号：DE102005047056

申请日：2005-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HIRLER FRANZ ,  RUEB MICHAEL

IPC: H01L29/06 ,  H01L21/329 ,  H01L21/336 ,  H01L29/78 ,  H01L29/861

Abstract: A power semiconductor element comprises a semiconductor body (100) with a drift zone (11) and a transition (16) from this to a further component zone (12) that forms a space charge on applying a blocking voltage. There is a field electrode structure (40) comprising at least two adjacent first field electrodes (41) in a second direction isolated and separated from the drift zone and from one another by a dielectric (33,61) and at least one second field electrode (42) in a second direction neighboring and overlapping the first and isolated from it. Independent claims are also included for the following: (A) Production processes for a field electrode structure;and (B) A production process for a structured layer.

公开(公告)号：DE10361135B4

公开(公告)日：2006-07-27

申请号：DE10361135

申请日：2003-12-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HIRLER FRANZ ,  PFIRSCH FRANK

IPC: H01L21/336 ,  H01L21/265 ,  H01L29/08 ,  H01L29/78

Abstract: A production process for a trench transistor comprises forming an epilayer (11), trench (14), gate dielectric (15) and gate electrode (16) with the transistor in an n-substrate (10) and with a p-body region (20) by the trench and an n-source (13). An n-drift drain (12) is formed by high-energy implant and the base of the trench projects into this region. An independent claim is also included for a trench transistor formed as above.

公开(公告)号：DE102004052678B3

公开(公告)日：2006-06-14

申请号：DE102004052678

申请日：2004-10-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HIRLER FRANZ ,  WERNER WOLFGANG ,  ZUNDEL MARKUS ,  PFIRSCH FRANK

IPC: H01L29/06 ,  H01L29/78

Abstract: A power trench transistor comprises a semiconductor body in which a cell array and an edge region surrounding the cell array are formed. First edge trenches are formed within the edge region. The first edge trenches contain field electrodes and the longitudinal orientations of the first edge trenches run from the cell array towards the edge of the trench transistor.

公开(公告)号：DE102004024661B4

公开(公告)日：2006-04-13

申请号：DE102004024661

申请日：2004-05-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POELZL MARTIN ,  HIRLER FRANZ ,  HAEBERLEN OLIVER

IPC: H01L21/336 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/78

Abstract: The method involves back-forming a first layer (DOX) in the upper trench region (30o), the filing (40) serving as a mask. The semiconductor material (20) on the side walls of the trench in the upper region of the trench are back-formed, with the first layer serving as a mask. A new semiconductor material (20n) of defined doping (p) is formed on the back-formed trench side walls near the upper trench region, forming a channel region of defined doping (p).