公开(公告)号：DE10010821A1

公开(公告)日：2001-09-13

申请号：DE10010821

申请日：2000-02-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUF ALEXANDER ,  KEGEL WILHELM ,  KARCHER WOLFRAM ,  SCHREMS MARTIN

IPC: H01L21/02 ,  H01L21/316 ,  H01L21/334 ,  H01L21/8242 ,  H01L27/108

Abstract: Increasing the capacity in a storage trench comprises depositing a first silicon oxide layer (4) in the trench; depositing a silicon layer (5) over the first layer to sufficiently cover the wall of the trench; and depositing a layer (6) containing an oxidizable metal. The silicon layer and the oxidizable metal layer are oxidized to form a layer containing a metal oxide and silicon oxide. An independent claim is also included for a trench capacitor comprising an inner wall covered with a silicon oxide layer which is covered with a metal oxide layer followed by a further silicon oxide layer. The remainder of the trench is filled with silicon. Preferred Features: Deposition is carried out by CVD or atomic layer deposition. The oxidizable metal is Ti, TiN, W, WN, Ta, TaN, WSi, TiSi or TaSi. Oxidation is carried out in an oxygen-containing atmosphere.

公开(公告)号：DE19926108C2

公开(公告)日：2001-06-28

申请号：DE19926108

申请日：1999-06-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LUDWIG CHRISTOPH ,  SCHREMS MARTIN

IPC: H01L21/28 ,  H01L21/8247 ,  H01L27/11521 ,  H01L27/115

Abstract: A non-volatile semiconductor memory cell and an associated method are disclosed, in which a conventional dielectric ONO layer (10) is replaced by a very thin metal oxide layer (6) of WOx and/or TiO2. The high relative dielectric constant of these materials further improves the integration density and the control voltages required for the semiconductor memory cell.

公开(公告)号：DE19958203A1

公开(公告)日：2001-06-13

申请号：DE19958203

申请日：1999-12-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WURZER HELMUT ,  SCHREMS MARTIN ,  POMPL THOMAS ,  KRASEMANN ANKE

IPC: H01L21/02 ,  H01L21/8242

Abstract: Production of an oxidation-resistant electrode comprises forming a metal oxide layer (3) on a substrate (1); applying an oxidation blocking layer (4) impermeable for oxygen atoms on the metal oxide layer; and applying an electrode (5) on the blocking layer. Preferred Features: A metal barrier layer (2) is formed between the metal oxide layer and the substrate. The metal oxide layer is made of tantalum pentoxide or aluminum oxide. The metal barrier layer is made of silicon dioxide or silicon nitride.

公开(公告)号：DE19946719A1

公开(公告)日：2001-04-19

申请号：DE19946719

申请日：1999-09-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GERNHARD STEFAN ,  MORHARD KLAUS-DIETER ,  SCHREMS MARTIN

IPC: H01L21/8242 ,  H01L27/108

Abstract: A conducting contact layer (420) is located between the substrate (101) and the conducting trench filling (161) in the trench (108) above the insulating collar (168). Trench capacitor comprises a trench (108) formed in a substrate (101) and having a upper region (109) and a lower region (111); an insulating collar (168) formed in the upper region of the trench; a trenched sink (170) in the substrate; a trenched plate (165) as outer capacitor electrode forming the lower region of the trench; a dielectric layer (164) as capacitor dielectric for lining the lower region of the trench and the insulating collar; and a conducting trench filling (161) for filling the trench. An Independent claim is also included for a process for the production of a trench capacitor. Preferred Features: The conducting contact layer is made of tungsten nitride, titanium nitride or tantalum nitride.

公开(公告)号：DE19941147A1

公开(公告)日：2001-03-22

申请号：DE19941147

申请日：1999-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TEMMLER DIETMAR ,  BENZINGER HERBERT ,  KARCHER WOLFRAM ,  PUSCH CATHARINA ,  SCHREMS MARTIN ,  FAUL JUERGEN

IPC: H01L21/20 ,  H01L21/8242 ,  H01L27/108

Abstract: Production of an epitaxial layer comprises: preparing substrate (105) having a single crystalline region (107) and an electrically insulated region (108); growing epitaxial layer (245) on the single crystalline region; and partially removing the epitaxial layer. Production of an epitaxial layer comprises: preparing substrate (105) having a single crystalline region (107) and an electrically insulated region (108); growing epitaxial layer (245) on the single crystalline region, in which the electrically insulated region is partially grown laterally by the epitaxial layer and forms an epitaxial closing joint (275); and partially removing the epitaxial layer above the electrically insulated region so that the epitaxial closing joint is partially removed. Preferred Features: The epitaxial layer is removed by anisotropic etching. The single crystalline region consists of silicon and the electrically insulated region consists of silicon oxide.

公开(公告)号：DE50009732D1

公开(公告)日：2005-04-14

申请号：DE50009732

申请日：2000-06-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LUDWIG CHRISTOPH ,  SCHREMS MARTIN

IPC: H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/788

公开(公告)号：DE10123770A1

公开(公告)日：2002-12-05

申请号：DE10123770

申请日：2001-05-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WICH-GLASEN ANDREAS ,  TEMMLER DIETMAR ,  SCHREMS MARTIN

IPC: H01L21/60 ,  H01L21/8242 ,  H01L27/108

Abstract: The instant invention is a method for fabricating a trench contact to a deep trench capacitor with a polysilicon filling in a trench hole formed in a silicon substrate. An epitaxy process is performed to selectively grow silicon above the polysilicon filling in the trench hole. An opening leading to the polysilicon filling is anisotropically etched into the epitaxially grown silicon. The opening has lateral dimensions that are smaller than those of the polysilicon filling, and the opening is filled with polysilicon.

公开(公告)号：DE10113252A1

公开(公告)日：2002-10-02

申请号：DE10113252

申请日：2001-03-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHREMS MARTIN ,  KOEHLER DANIEL

IPC: H01L21/334 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/94

Abstract: Production of a trench comprises: etching a semiconductor substrate (2) to form a trench (4); lining the trench with an insulating layer (12) and a mask layer (14) to form an insulating collar; filling the trench with a filling material (18) in its lower region; modifying the region of the mask layer not covered with the filling material so that the non-modified region of the mask layer can be selectively etched to form the modified region; removing the filling material from the trench; removing the mask layer by etching using the modified region of the mask layer as mask so that a mask located in the upper region of the trench is produced from the mask layer; and etching the insulating layer using the mask to form an insulating collar in the upper region of the trench. Preferred Features: The mask layer is only modified close to the surface and the modified surface is removed by etching the insulating layer. The lower region of the trench is lined with a dielectric, preferably made from an oxide-nitride-oxide layer, a nitride-oxide layer, an Al2O3 layer, a Ta2O5 layer, HfO2 or a layer containing Al2O3.

公开(公告)号：DE10045694A1

公开(公告)日：2002-04-04

申请号：DE10045694

申请日：2000-09-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHREMS MARTIN

IPC: H01L21/8242 ,  H01L27/108

Abstract: The invention relates to a semiconductor memory cell (1), which is formed in a substrate (2) and comprises a trench capacitor (3) and a select transistor (4). The trench capacitor (3) comprises a capacitor dielectric (8) and a conductive trench fill material (10). A diffusion barrier (19) is located on the conductive trench fill material (10) and an epitaxial layer (24) is formed on top of said barrier. The select transistor (4) is a planar transistor, positioned above the trench capacitor (3), whereby a drain doping region (13) of said select transistor (4) is located in the epitaxial layer (24).

公开(公告)号：DE10014920C1

公开(公告)日：2001-07-26

申请号：DE10014920

申请日：2000-03-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAUPT MORITZ ,  SACHSE JENS-UWE ,  BECKMANN GUSTAV ,  LAMPRECHT ALEXANDRA ,  OTTENWAELDER DIETMAR ,  KRASEMANN ANKE ,  SCHREMS MARTIN

IPC: H01L21/223 ,  H01L21/8242

Abstract: Production of a trench capacitor comprises forming a trench (108) in a substrate (101); filling a lower region of the trench with a first filler (152); forming an insulating collar in an upper region of the trench; removing the first filler; forming a trenched plate (165) in the substrate in the surrounding of the lower region of the trench as first capacitor plate using low pressure gas phase doping; forming a dielectric layer to line the lower region of the trench and the inner side of the collar as capacitor dielectric and filling the trench with a conducting second filler as second capacitor plate. Preferred Features: Formation of the trenched plate uses AsH3 or PH3 as doping gas and H2 or He as carrier gas.