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    Flip substrate for chip mount
    31.
    发明公开
    Flip substrate for chip mount 失效
    Umgekipptes Chip-Substrat。

    公开(公告)号：EP0329133A2

    公开(公告)日：1989-08-23

    申请号：EP89102675.9

    申请日：1989-02-16

    Applicant: Microelectronics and Computer Technology Corporation

    Inventor： Carey, Davis Harrison

    IPC: H01L23/52

    CPC classification number: H01L23/5384 ,  H01L23/5383 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/73253 ,  H01L2924/01014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15312 ,  H05K1/112

    Abstract: A substrate (30) for attaching electrical devices (42) having an interconnect wiring structure (34) and a support (32) for the interconnect, the support having a number of vias (38), or throughholes, extending therethrough and electrically connected to the interconnect. The substrate allows for attachment of the electrical devices on the side of the support opposite the interconnect at the vias, rather than on the interconnect itself. By so doing, the chips can be packed more densely since the area between the chips normally reserved for engineering change pads, test pads and the like is not required, these functions being performed on the interconnect on the opposite side of the substrate.

    Abstract translation: 一种用于附接具有互连布线结构（34）的电气设备（42）和用于互连的支撑件（32）的基板（30），所述支撑件具有多个通孔（38）或贯穿孔，并且电连接到 互连。 衬底允许电气器件在与通孔处的互连件相对的一侧上而不是在互连本身上附接。 通过这样做，芯片可以更密集地堆积，因为不需要通常保留用于工程变换焊盘，测试焊盘等的芯片之间的区域，这些功能在基板的相对侧上的互连上执行。

    Customizable circuitry
    32.
    发明公开
    Customizable circuitry 失效
    Kundengebundene Schaltung。

    公开(公告)号：EP0329018A2

    公开(公告)日：1989-08-23

    申请号：EP89102243.6

    申请日：1989-02-09

    Applicant: Microelectronics and Computer Technology Corporation

    Inventor： Smith, Lawrence Norman

    IPC: H05K7/06

    CPC classification number: H05K7/06 ,  H01L2924/0002 ,  H05K1/0289 ,  H01L2924/00

    Abstract: A customizable circuit using a programmable interconnect and a compatible tape design for tape automated bonding of chips to the circuitry. The programmable interconnect comprises layers of wires, with one layer of wires forming overlap regions with the adjacent layer of wires. The wires can be selectively linked later to form the desired interconnect. The selective linkage represents the customization of an otherwise undedicated interconnect. The TAB chip bonding design uses a carrier tape to bond the integrated circuit chips to the programmable interconnect. Also disclosed is a method for forming the interconnect.

    Abstract translation: 使用可编程互连的可定制电路和兼容的磁带设计，用于将芯片自动绑定到电路。 可编程互连包括导线层，其中一层导线与相邻的导线层形成重叠区域。 电线可以随后选择性地连接以形成期望的互连。 选择性连接代表了另一种无形互连的定制。 TAB芯片接合设计使用载带将集成电路芯片连接到可编程互连。 还公开了一种用于形成互连的方法。

    Thin film capacitor
    34.
    发明公开
    Thin film capacitor 失效
    Dünnfilmkondensator。

    公开(公告)号：EP0285854A1

    公开(公告)日：1988-10-12

    申请号：EP88103915.0

    申请日：1988-03-11

    Applicant: Microelectronics and Computer Technology Corporation

    Inventor： Smith, Lawrence Norman

    IPC: H01L29/92

    CPC classification number: H01L28/40 ,  Y10T29/435

    Abstract: A thin film capacitor having a top, middle and bottom plate forming two capacitors in series in which the middle plate is a plurality of isolated plates thereby forming a structure of a plurality of two capacitors in series which are all connected in parallel. The capacitor may be integrated into an electronic substrate. The capacitor may be formed by depositing films of the metal conductors and dielectrics and may be formed as an integral part of a semiconductor chip or interconnect substrate.

    Abstract translation: 一种薄膜电容器，其具有形成串联的两个电容器的顶部，中间和底部平板，其中中间板是多个隔离板，从而形成串联连接的多个串联的两个电容器的结构。 电容器可以集成到电子基板中。 电容器可以通过沉积金属导体和电介质的膜而形成，并且可以形成为半导体芯片或互连基板的组成部分。

    Method of providing a planarized polymer coating on a substrate wafer
    35.
    发明公开
    Method of providing a planarized polymer coating on a substrate wafer 失效
    Verfahren zur Herstellung einer planaren聚合物Bedeckung auf einem Substrat。

    公开(公告)号：EP0268116A1

    公开(公告)日：1988-05-25

    申请号：EP87115855.6

    申请日：1987-10-28

    Applicant: Microelectronics and Computer Technology Corporation

    Inventor： Potter, Curtis Nathan

    IPC: G03F7/16 ,  H01L21/312

    CPC classification number: H01L21/02282 ,  G03F7/168 ,  H01L21/02118 ,  H01L21/312

    Abstract: Applying a photoresist layer containing a solvent to the top of an electronic wafer by spin coating. Before the layer dries the wafer is heated in an oven while controlling the solvent loss from the coating by maintaining the pressure of the solvent vapor and providing a slow solvent loss for planarizing the top surface of the polymer. The device is removed from the first oven and the bake cycle is completed in a standard convection bake oven.

    Abstract translation: 通过旋涂将含有溶剂的光致抗蚀剂层施加到电子晶片的顶部。 在层干燥之前，晶片在烘箱中加热，同时通过维持溶剂蒸汽的压力并提供缓慢的溶剂损失来平坦化聚合物的顶表面，从而控制溶剂从涂层中的损失。 将设备从第一烘箱中取出，烘烤循环在标准对流烤箱中完成。

    Fluid heat exchanger for an electronic component
    37.
    发明公开
    Fluid heat exchanger for an electronic component 失效
    液化石油气公司。

    公开(公告)号：EP0445309A1

    公开(公告)日：1991-09-11

    申请号：EP90102499.2

    申请日：1990-02-08

    Applicant: Microelectronics and Computer Technology Corporation

    Inventor： Nelson, Richard Douglas ,  Gupta, Omkarnath Ramnath ,  Herrell, Dennis J.

    IPC: H01L23/473 ,  H01L23/467

    CPC classification number: H01L23/467 ,  H01L23/4336 ,  H01L2924/0002 ,  Y10S165/908 ,  H01L2924/00

    Abstract: A high performance fluid heat exchanger (10) for cooling an electronic component (16) which includes housing (12) having a base (14), a plurality of parallel fins (22) in the housing (12), and a center fed inlet (30) connected to the housing (12) opposite the base (14) for supplying cooling fluid towards the base (14) and toward the ends of the fins (28). A plate (36) is positioned between the tops (24) and bottom (26) of the fins (22) and extends generally parallel to the base (14) and extends towards, but is spaced from, the ends of the fins (28) for providing a double cooling pass against the fins.

    Abstract translation: 一种用于冷却电子部件（16）的高性能流体热交换器（10），其包括具有基座（14）的壳体（12），以及壳体（12）中的多个平行散热片（22） （30），其连接到与所述基座（14）相对的所述壳体（12），用于朝向所述基座（14）并朝向所述翅片（28）的端部供应冷却流体。 板（36）定位在翅片（22）的顶部（24）和底部（26）之间，并且大致平行于基部（14）延伸并且延伸到翅片（28）的端部但是与翅片 ），用于提供对散热片的双重冷却通道。

    An end fed liquid heat exchanger for an electronic component
    38.
    发明公开
    An end fed liquid heat exchanger for an electronic component 失效
    Baälement。

    公开(公告)号：EP0353437A1

    公开(公告)日：1990-02-07

    申请号：EP89111006.6

    申请日：1989-06-16

    Applicant: Microelectronics and Computer Technology Corporation

    Inventor： Nelson, Richard Douglas ,  Gupta, Omkarnath Ramnath

    IPC: H01L23/473

    CPC classification number: H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A body (12) having a bottom (14) and first (16) and second (18) ends and a cavity (26) therein. A plurality of substantially parallel spaced fins (30a-30h) are positioned in the cavity. A liquid inlet (32) is centrally positioned in the first end of the body and a liquid outlet (34) is centrally positioned in the second end of the body where flowing cooling liquid between the fins from the first end to the second end with higher fluid flow between the fins in the center for preferentially cooling the center of the heat exchanger. A cross-sectional area of the liquid path in the body minimize pressure drops and avoids abrupt direction changes and cross-sectional changes. The width, height and spacing of the fins may be varied to control the temperature of the areas in the bottom.

    Abstract translation: 具有底部（14）和第一（16）和第二（18）端部的主体（12）和其中的空腔（26）。 多个基本上平行的间隔开的翅片（30a-30h）定位在空腔中。 液体入口（32）位于主体的第一端中央并且液体出口（34）居中地位于主体的第二端，其中翅片之间的冷却液体从第一端到第二端以较高的速度流动 在中心的翅片之间的流体流动优先冷却热交换器的中心。 体内的液体通道的横截面积使压力下降最小化，避免突然的方向变化和横截面变化。 翅片的宽度，高度和间距可以改变，以控制底部区域的温度。

    Electrical interconnect support system with low dielectric constant
    40.
    发明公开
    Electrical interconnect support system with low dielectric constant 失效
    电子邮件系统管理软件Konstante。

    公开(公告)号：EP0268971A2

    公开(公告)日：1988-06-01

    申请号：EP87116898.5

    申请日：1987-11-16

    Applicant: Microelectronics and Computer Technology Corporation

    Inventor： Potter, Curtis Nathan

    IPC: H01L21/48 ,  H01L23/14

    CPC classification number: H05K3/4685 ,  H01L21/4857 ,  H01L23/5381 ,  H01L2924/0002 ,  H05K3/205 ,  H01L2924/00

    Abstract: A method of fabricating an anodic aluminum support system having an air bridge for metallic conductors. The method includes providing two or more metal layers separated by a coating of aluminum creating a multiple layer electrical interconnect system. The method includes the step of anodizing the aluminum and applying a photoresist mask to spaced portions of the top of the system. Thereafter, an etching solution is applied to the top of the system for removing the anodized aluminum, except for the portions covered by the mask, thereby providing a multilayer conductor system supported by pillars of anodic aluminum surrounded by low dielectric air.

    Abstract translation: 一种制造具有用于金属导体的空气桥的阳极铝支撑系统的方法。 该方法包括提供由铝涂层隔开的两个或多个金属层，形成多层电互连系统。 该方法包括阳极氧化铝并将光致抗蚀剂掩模施加到系统顶部的间隔部分的步骤。 此后，除了由掩模覆盖的部分之外，将蚀刻溶液施加到除去阳极氧化铝的系统顶部，由此提供由低介电空气包围的阳极铝柱支撑的多层导体系统。

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