公开(公告)号：DE602007013472D1

公开(公告)日：2011-05-05

申请号：DE602007013472

申请日：2007-12-04

Applicant: IBM

Inventor： GAIDIS MICHAEL C ,  CLEVENGER LAWRENCE A ,  DALTON TIMOTHY J ,  DEBROSSE JOHN K ,  HSU LOUIS L ,  RADENS CARL ,  WONG KEITH K ,  YANG CHIH-CHAO

IPC: G11C19/08 ,  G11B5/008

公开(公告)号：CA2571065C

公开(公告)日：2011-01-04

申请号：CA2571065

申请日：2005-06-14

Applicant: IBM

Inventor： XU HUIHAO ,  SELANDER KARL D ,  SORNA MICHAEL A ,  STEPHENS JEREMY ,  HSU LOUIS L

IPC: H04B3/00 ,  H04L25/00 ,  H04L25/03

Abstract: A data communication system (900) includes a transmitter unit (100) and a receiver unit (200). The transmitter unit (100) has a transmission characteristic that is adjustable in accordance with equalization information. The transmitter unit (100) is operable to transmit a predetermined signal and the receiver unit (200) is operable to receive the predetermined signal. The receiver unit (200) is further operable to generate the equalization information by examining the eye opening of the received signal, and transmit the equalization information to the transmitter unit (100).

公开(公告)号：AU2002361847A1

公开(公告)日：2004-07-22

申请号：AU2002361847

申请日：2002-12-20

Applicant: IBM

Inventor： WANG LI-KONG ,  HSU LOUIS L ,  SHI LEATHEN

IPC: H01L21/336 ,  H01L21/86 ,  H01L27/12 ,  H01L29/786 ,  H01L23/14 ,  H01L29/12

公开(公告)号：DE69332917T2

公开(公告)日：2003-12-24

申请号：DE69332917

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR M ,  HSU LOUIS L

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  C23C14/04

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：SG44450A1

公开(公告)日：1997-12-19

申请号：SG1996000500

申请日：1993-02-01

Applicant: IBM

Inventor： JOSHI RAJIV V ,  CUOMO JEROME J ,  DALAL HORMAZDYAR DALAL M ,  HSU LOUIS L

IPC: H01L21/28 ,  H01L21/312 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485 ,  H01L21/60

Abstract: Capping a low resistivity metal conductor line or via with a refractory metal allows for effectively using chemical-mechanical polishing techniques because the hard, reduced wear, properties of the refractory metal do not scratch, corrode, or smear during chemical-mechanical polishing. Superior conductive lines and vias are created using a combination of both physical vapor deposition (e.g., evaporation or collimated sputtering) of a low resistivity metal or alloy followed by chemical vapor deposition (CVD) of a refractory metal and subsequent planarization. Altering a ratio of SiH 4 to WF 6 during application of the refractory metal cap by CVD allows for controlled incorporation of silicon into the tungsten capping layer. Collimated sputtering allows for creating a refractory metal liner in an opening in a dielectric which is suitable as a diffusion barrier to copper based metallizations as well as CVD tungsten. Ideally, for faster diffusing metals like copper, liners are created by a two step collimated sputtering process wherein a first layer is deposited under relatively low vacuum pressure where directional deposition dominates (e.g., below 1mTorr) and a second layer is deposited under relatively high vacuum pressure where scattering deposition dominates (e.g., above 1mTorr). For refractory metals like CVD tungsten, the liner can be created in one step using collimated sputtering at higher vacuum pressures.

公开(公告)号：CA2131668A1

公开(公告)日：1995-06-24

申请号：CA2131668

申请日：1994-09-08

Applicant: IBM

Inventor： GALLI CAROL ,  HSU LOUIS L ,  OGURA SEIKI ,  SHEPARD JOSEPH F

IPC: H01L21/76 ,  H01L21/316 ,  H01L21/762 ,  H01L27/08 ,  H01L21/31

Abstract: A shallow trench isolation structure is formed by a process having a reduced number of steps and thermal budget by filling trenches by liquid phase deposition of an insulating semiconductor oxide and heat treating the deposit to form a layer of high quality thermal oxide at an interface between the deposited oxide and the body of semiconductor material (e.g. substrate) into which the trench extends. This process yields an isolation structure with reduced stress and reduced tendency to develop charge leakage. First, a trench (18) is formed in a silicon substrate (12) having a thin blanket layer (14) of a hard polish-stop material and a photo resist layer (16) (used to pattern the structure) formed thereon. A channel stop region (20) is formed as standard in the trench. Next, the trench is filled with SiO2 using liquid phase oxide deposition above the level of said thin layer. Then the photo resist layer is removed and the SiO2 fill (22) is planarized. Finally, the SiO2 fill is densified and during the thermal cycle, a thin layer (30) of thermal oxide is formed at the fill-substrate interface. The structure can be readily and easily planarized, and voids contamination of the deposited oxide are substantially eliminated by self-aligned deposition above the trench in the volume of apertures on the resist used to form the trench.