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    ENHANCED VISUAL EXPERIENCE FOR A PARTICIPANT IN A STREAMING EVENT
    32.
    发明申请
    ENHANCED VISUAL EXPERIENCE FOR A PARTICIPANT IN A STREAMING EVENT 审中-公开
    在流动事件中加强参与者的视觉体验

    公开(公告)号：WO2010117583A2

    公开(公告)日：2010-10-14

    申请号：PCT/US2010027745

    申请日：2010-03-18

    Applicant: MOTOROLA INC ,  TAYLOR BRENT A ,  CROSWELL ROBERT T ,  DUNN GREGORY J

    Inventor： TAYLOR BRENT A ,  CROSWELL ROBERT T ,  DUNN GREGORY J

    IPC: G06Q50/00

    CPC classification number: H04N7/163 ,  H04N21/44012 ,  H04N21/458

    Abstract: A method of presenting content from a remote device is provided. Limited bandwidth content, transmitted from a remote device, is received at a local device. The limited bandwidth content is superimposed on enhanced content retrieved by the local device. The limited bandwidth content overlaps with the enhanced content such that the limited bandwidth content is a subset of what is represented by the enhanced content. The limited bandwidth or enhanced content may either be still images or video that is stitched together and displayed at the local device.

    Abstract translation: 提供了一种从远程设备呈现内容的方法。 在本地设备接收到从远程设备发送的有限带宽内容。 有限带宽内容叠加在由本地设备检索的增强内容上。 有限带宽内容与增强内容重叠，使得有限带宽内容是由增强内容表示的内容的子集。 有限带宽或增强内容可以是拼接在一起并显示在本地设备上的静止图像或视频。

    COUNTERMEASURES AGAINST ORIGINAL BACKGROUND RETRIEVAL
    33.
    发明申请
    COUNTERMEASURES AGAINST ORIGINAL BACKGROUND RETRIEVAL 审中-公开
    对原始背景检索的对策

    公开(公告)号：WO2010033312A4

    公开(公告)日：2010-06-17

    申请号：PCT/US2009052634

    申请日：2009-08-04

    Applicant: MOTOROLA INC ,  DUNN GREGORY J ,  SUPER BOAZ J

    Inventor： DUNN GREGORY J ,  SUPER BOAZ J

    IPC: H04N5/262 ,  G06T1/00 ,  G06T11/40

    CPC classification number: G06T11/001 ,  G06T7/11 ,  G06T7/194

    Abstract: A device and method of modifying an image containing a foreground and an original or substitute background are disclosed. Boundary pixels contain only the original background or the original background and the foreground. The original background is replaced by a predetermined or random color or by a color corresponding to the substitute background. The entire boundary pixel can be replaced by the replacement color. Alternatively, the ratio of the foreground to the original background can be estimated from the neighboring pixels and only the original background replaced by the replacement color. Once some or all of the boundary pixels are replaced, the image can be transmitted or otherwise transferred to other devices or viewers. Some or all of the images in a video can be modified.

    Abstract translation: 公开了一种修改包含前景和原始或替代背景的图像的设备和方法。 边界像素仅包含原始背景或原始背景和前景。 原始背景由预定的或随机的颜色或与替代背景对应的颜色替换。 整个边界像素可以被替换颜色替换。 或者，可以从相邻像素估计前景与原始背景的比率，并且只有替换颜色替换原始背景。 一旦更换了部分或全部边界像素，就可以将图像传输或以其他方式传输至其他设备或观看者。 视频中的部分或全部图像可以修改。

    HIGH IMPEDANCE ELECTROMAGNETIC SURFACE AND METHOD
    34.
    发明申请
    HIGH IMPEDANCE ELECTROMAGNETIC SURFACE AND METHOD 审中-公开
    高阻抗电磁表面和方法

    公开(公告)号：WO2007075713A3

    公开(公告)日：2008-10-02

    申请号：PCT/US2006048471

    申请日：2006-12-19

    Applicant: MOTOROLA INC ,  DUNN GREGORY J ,  CROSWELL ROBERT T ,  KUMPF GEORGE H ,  SVIGELJ JOHN A

    Inventor： DUNN GREGORY J ,  CROSWELL ROBERT T ,  KUMPF GEORGE H ,  SVIGELJ JOHN A

    IPC: H05K1/16 ,  H01L29/76

    CPC classification number: H01Q15/006 ,  H05K1/116 ,  H05K1/162 ,  H05K1/165 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/0715 ,  H05K2201/09509 ,  H05K2201/09609

    Abstract: A high impedance surface (300) has a printed circuit board (302) with a first surface (314) and a second surface (316), and a continuous electrically conductive plate (319) disposed on the second surface (316) of the printed circuit board (302). A plurality of electrically conductive plates (318) is disposed on the first surface (314) of the printed circuit board (302), while a plurality of elements are also provided. Each element comprises at least one of (1) at least one multi-layer inductor (330, 331) electrically coupled between at least two of the electrically conductive plates (318) and embedded within the printed circuit board (302), and (2) at least one capacitor (320) electrically coupled between two of the electrically conductive plates (318). The capacitor (320) comprises at least one of (a) a dielectric material (328) disposed between adjacent electrically conductive plates, and (b) a mezzanine capacitor embedded within the printed circuit board (302).

    Abstract translation: 高阻抗表面（300）具有带有第一表面（314）和第二表面（316）的印刷电路板（302）和设置在印刷的第二表面（316）上的连续导电板（319） 电路板（302）。 多个导电板（318）设置在印刷电路板（302）的第一表面（314）上，同时还提供多个元件。 每个元件包括（1）至少一个电耦合在至少两个导电板（318）之间并嵌入印刷电路板（302）内的多层电感器（330,331）中的至少一个，和（2 ）电耦合在两个导电板（318）之间的至少一个电容器（320）。 电容器（320）包括设置在相邻导电板之间的（a）介电材料（328）和（b）嵌入印刷电路板（302）内的夹层电容器中的至少一个。

    METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD
    35.
    发明申请
    METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD 审中-公开
    在印刷电路板上制造封闭VIAS的方法

    公开(公告)号：WO2008057717A3

    公开(公告)日：2008-07-31

    申请号：PCT/US2007081343

    申请日：2007-10-15

    Applicant: MOTOROLA INC ,  MAGERA JAROSLAW A ,  DUNN GREGORY J ,  LEGANSKI KATHY D

    Inventor： MAGERA JAROSLAW A ,  DUNN GREGORY J ,  LEGANSKI KATHY D

    IPC: H01R12/04 ,  H05K1/11

    CPC classification number: H05K3/427 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0047 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0394 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/097 ,  H05K2201/09845 ,  H05K2203/1476 ,  Y10T29/49165

    Abstract: A method for forming closed vies In a mgtfflayßr printed circuit board. A dielectric layer Is laminated to one side of a central. core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vtas In the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that Is much smaller In diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hols. Approximately one half of the closed vlas are situated such that the closed aperture faces one dielectric layer and a remainder of the dosed vias are situated such that the closed aperture faces the other dielectric layer.

    Abstract translation: 一种在mgtfflayßr印刷电路板上形成闭合点的方法。 电介质层被层压到中央的一侧。 核心在每侧具有金属层。 第二介电层被层压到中央芯的另一侧。 在中央核心已形成部分穿过，但不是完全穿透中央核心，然后完成通孔从另一侧有一个小得多的直径，以形成完全穿透中央核心的通道 从一边到另一边。 然后通孔镀上金属以基本上封闭较小的玻璃管。 大约一半的封闭瓦片的位置使得封闭孔隙面向一个介电层并且其余的配料过孔的位置使得封闭孔隙面向另一个介电层。

    MODULATION OF BACKGROUND SUBSTITUTION BASED ON CAMERA ATTITUDE AND MOTION
    37.
    发明申请
    MODULATION OF BACKGROUND SUBSTITUTION BASED ON CAMERA ATTITUDE AND MOTION 审中-公开
    基于摄像机姿态和运动的背景替代调制

    公开(公告)号：WO2009155204A3

    公开(公告)日：2010-03-04

    申请号：PCT/US2009047079

    申请日：2009-06-11

    Applicant: MOTOROLA INC ,  DUNN GREGORY J ,  BLAKE TERANCE B

    Inventor： DUNN GREGORY J ,  BLAKE TERANCE B

    IPC: G06T5/00 ,  H04N5/225

    CPC classification number: H04N5/272 ,  G06T11/60 ,  H04M1/72544 ,  H04M2250/12 ,  H04M2250/52 ,  H04M2250/62 ,  H04N5/232 ,  H04N5/2621 ,  H04N2007/145

    Abstract: A device and method of background substitution are disclosed. One or more cameras in a mobile device obtain a depth image. A processor in or external to the device segments the foreground from the background of the image. The original background is removed and a stored background image or video is substituted in place of the original background. The substituted background is altered dependent on the attitude and motion of the device, which is sensed by one or more sensors in the device. A portion of the stored background selected as the substitute background varies in correspondence with the device movement.

    Abstract translation: 公开了背景替换的装置和方法。 移动设备中的一个或多个摄像机获得深度图像。 设备中或外部的处理器从图像的背景分割前景。 原始背景被删除，存储的背景图像或视频代替原始背景。 取代的背景取决于装置的姿态和运动，其由装置中的一个或多个传感器感测到。 选择作为替代背景的存储背景的一部分根据设备移动而变化。

    METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD
    38.
    发明申请
    METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD 审中-公开
    在印刷电路板上制作封闭VIAS的方法

    公开(公告)号：WO2008057717B1

    公开(公告)日：2008-09-18

    申请号：PCT/US2007081343

    申请日：2007-10-15

    Applicant: MOTOROLA INC ,  MAGERA JAROSLAW A ,  DUNN GREGORY J ,  LEGANSKI KATHY D

    Inventor： MAGERA JAROSLAW A ,  DUNN GREGORY J ,  LEGANSKI KATHY D

    IPC: H01R12/04 ,  H05K1/11

    CPC classification number: H05K3/427 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0047 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0394 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/097 ,  H05K2201/09845 ,  H05K2203/1476 ,  Y10T29/49165

    Abstract: A method for forming closed vies In a mgtfflayßr printed circuit board. A dielectric layer Is laminated to one side of a central. core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vtas In the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that Is much smaller In diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hols. Approximately one half of the closed vlas are situated such that the closed aperture faces one dielectric layer and a remainder of the dosed vias are situated such that the closed aperture faces the other dielectric layer.

    Abstract translation: 一种形成封闭的威胁的方法在一个mgtfflayßr印刷电路板中。 介电层被层压到中心的一侧。 芯在每侧具有金属层。 第二电介质层被层压到中心芯的另一侧。 封闭的Vtas中心芯是通过部分穿过但不完全穿透中心芯而形成的，然后从相对侧完成通孔，该孔的直径要小得多，以形成完全穿透中心芯的通道 从一边到另一边。 然后通孔用金属镀以基本上封闭较小的霍尔。 大约一半的闭合孔被定位成使得闭合孔面对一个电介质层，并且其余的经过定型的通孔被设置成使得闭合孔面对另一介电层。

    CAPACITANCE LAMINATE AND PRINTED CIRCUIT BOARD APPARATUS AND METHOD
    40.
    发明申请
    CAPACITANCE LAMINATE AND PRINTED CIRCUIT BOARD APPARATUS AND METHOD 审中-公开
    电容层压板和印刷电路板装置及方法

    公开(公告)号：WO2007078947A2

    公开(公告)日：2007-07-12

    申请号：PCT/US2006048473

    申请日：2006-12-19

    Applicant: MOTOROLA INC ,  DUNN GREGORY J ,  MAGERA JAROSLAW A ,  SAVIC JOVICA

    Inventor： DUNN GREGORY J ,  MAGERA JAROSLAW A ,  SAVIC JOVICA

    IPC: H05K1/11 ,  H01R12/04

    CPC classification number: H05K1/162 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09718

    Abstract: A method is for fabricating an embedded capacitance printed circuit board assembly (400, 1100). The embedded capacitance printed circuit board assembly includes two embedded capacitance structures (110). Each capacitance structure (110) includes a crystallized dielectric oxide layer (115) sandwiched between an outer electrode layer (120) and an inner electrode layer (125) in which the two inner electrode layers are electrically connected together. A rivet via (1315) and a stacked via (1110) formed from a button via (910) and a stacked blind via (1111) may be used to electrically connect the two inner electrode layers together. A spindle via (525) may be formed through the inner and outer layers. The multi-layer printed circuit board may be formed from a capacitive laminate (100) that includes two capacitance structures.

    Abstract translation: 一种用于制造嵌入式电容印刷电路板组件（400,1100）的方法。 嵌入式电容印刷电路板组件包括两个嵌入的电容结构（110）。 每个电容结构（110）包括夹在两个内部电极层电连接在一起的外部电极层（120）和内部电极层（125）之间的结晶化电介质氧化物层（115）。 可以使用铆钉通孔（1315）和由按钮通孔（910）和堆叠的通孔（1111）形成的堆叠通孔（1110）将两个内部电极层电连接在一起。 主轴通孔（525）可以通过内层和外层形成。 多层印刷电路板可以由包括两个电容结构的电容层压板（100）形成。

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