Abstract:
The invention provides a spacer for soldering comprising an elongate body having one end provided with a tapped hole and an opposite end provided with a transverse bearing surface having a smooth centering peg projecting therefrom, the peg has a longitudinal outer passage extending over at least a fraction of its length as far as the transverse bearing surface to enable molten solder to penetrate by capillarity as far as the transverse bearing surface. The invention also provides a module including such a spacer.
Abstract:
A main body of an electronic part has multiple electrodes, to which multiple terminals are respectively connected. The terminals include a fuse terminal and a normal terminal, each of which extends from the main body to a printed board so that the main body is supported at a position above and separated from a board surface of the printed board. The fuse terminal has an intermediate portion between an electrode-connected portion and a land-connected portion. The intermediate portion has a cut-off portion having a smaller width than other portions of the fuse terminal, so that the cut-off portion is melted down when excess current flows in the fuse terminal. The intermediate portion extends in a direction parallel to the board surface or in a direction inclined to the board surface at an angle smaller than 90 degrees.
Abstract:
A packaged surface-mount semiconductor device has the outer, un-encapsulated lead segments structured in five adjoining portions: The first portion protrudes from the encapsulation about horizontally; the second portion forms a convex bend downwardly; the third portion is approximately straight downwardly; the fourth portion forms a concave bend upwardly; and the fifth portion is straight horizontally. Each segment has across the width a first groove in the third portion, either on the bottom surface or on the top surface. Preferably, the groove is about 2 leadframe thicknesses vertically over the bottom surface of the fifth lead portion. When stamped, the groove may have an angular outline about 5 and 50 μm deep; when etched, the groove may have an approximately semicircular outline about 50 to 125 μm deep. A second groove may be located in the second segment portion; a third groove may be located in the transition region from the third to the fourth segment portions.
Abstract:
A lead (10) for a semiconductor device (12) comprising a strip portion (14) comprising a first substantially horizontal portion (18) connected to the semiconductor device (12), a substantially vertical portion (20) connected to the first substantially horizontal portion (18), and a second substantially horizontal portion (22) connected to the substantially vertical portion (20) with at least one hole (16) disposed in the strip portion (14). A method of providing an electrical contact for connecting a semiconductor device (12) to a surface (24) comprising the steps of extending at least one lead (10) from the semiconductor device (12) and slotting the lead (10).
Abstract:
A surface mounting stress relief system for mounting a surface mount package such as a leadless ceramic chip carrier on a printed circuit board includes a printed circuit board having a top layer attached to a bottom layer. The top layer includes cavities for exposing top surface portion of the bottom layer which carry a plurality of solder pads. The surface mount package is positioned on the printed circuit board for placing the package bottom surface on a top surface of the printed circuit board between the cavities while positioning package contact pads in spaced relation above corresponding preselected solder pads. A solder column extends between each of the plurality of corresponding solder pads and the selected contact pads for providing an electrical connection. The solder column is formed by applying a solder paste to the solder pads on the printed circuit board, screening a low temperature solder paste onto each of the contact pads of the surface mount package, placing a solder ball onto each pad, and attaching the solder ball to each of the contact pads of the package by passing the package through a reflow oven for reflowing the low temperature solder paste without reflowing the high temperature solder ball.
Abstract:
A method for forming an interconnect for making a temporary or permanent electrical connection to a semiconductor dice is provided. The method includes forming a substrate with an insulating layer and a pattern of conductors thereon. The conductors are formed as a bi-metal stack including a barrier layer formed of an inert metal and a conductive layer formed of a highly conductive metal. Microbumps are formed on the conductors by deposition through a mask using an electroplating, electroless plating, screen printing or evaporation process. The interconnect can be used to provide a temporary electrical connection for testing bare semiconductor dice. Alternately the interconnect can be used for flip chip mounting dice for fabricating multi chip modules and other electronic devices.
Abstract:
A method for forming an interconnect for making a temporary or permanent electrical connection to a semiconductor dice is provided. The method includes forming a substrate with an insulating layer and a pattern of conductors thereon. The conductors are formed as a bi-metal stack including a barrier layer formed of an inert metal and a conductive layer formed of a highly conductive metal. Microbumps are formed on the conductors by deposition through a mask using an electroplating, electroless plating, screen printing or evaporation process. The interconnect can be used to provide a temporary electrical connection for testing bare semiconductor dice. Alternately the interconnect can be used for flip chip mounting dice for fabricating multi chip modules and other electronic devices.
Abstract:
A compliant lead for electromechanically surface mounting an integrated circuit chip package to a substrate. The compliant lead extends from the package and includes at least two regions of different lead thickness. In a first region, a standard lead thickness is employed to ensure the applicability of existing package fabrication techniques. A second region, having a reduced thickness, then extends from the first region and is predefined to encompass an area of the lead expected to undergo greatest stress during thermal cycling. Compliancy is further guaranteed by providing a solder dam within the region of reduced thickness to limit wicking of solder when the package is solder mounted to the substrate. Lead frame fabrication is also discussed.
Abstract:
An improved edge clip terminal having a first diamond-shaped transition region connecting a plurality of tines, that clip over the edge of a substrate, to a first lead section and having a second diamond-shaped transition region connecting the first lead section to a second lead section. In an assembly, the second lead sections of a plurality of terminals are located in holes in a PC board with the second transition regions resting on the surface of the circuit board. The first lead sections are more narrow than the transition regions and of lengths that are sufficient for preventing solder wicking up them and into the areas of the tines during wave soldering of a circuit board so that a leaded substrate soldered into the circuit board may be tilted without damaging it. In an alternate embodiment of this invention, the lead portion of an edge clip terminal on a substrate has a pair of spaced apart transition regions in it. A first transition region and first length of lead space tines away from a second transition region in a hole in a circuit board for preventing solder wicking up the lead and tines during wave soldering so that the leaded substrate may be tilted without damaging it.
Abstract:
A connector post or pin is disclosed which is particularly suitable for use with printed circuit board assemblies. The post includes a coined portion which is designed to permit the pin to be easily inserted into holes of a predetermined size in printed circuit boards, and to increase the quality of a solder joint between the post and the printed circuit board. A solder stripe is placed on each post in the coined region to facilitate soldering of the posts to conductive portions of the printed circuit board. The posts are attached in groups to break-away carrier strips to aid in the rapid assembly of large numbers of posts to printed circuit boards. The posts may also include provisions for coupling them to multilayered printed circuit assemblies. A method of fabricating the coined post is also disclosed which converts a post with normally an interference fit in a printed circuit board aperture to a post which is freely received in the aperture together with masses of solder adhered to said post.