公开(公告)号：DE10341544A1

公开(公告)日：2005-04-07

申请号：DE10341544

申请日：2003-09-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  PAMLER WERNER ,  GABRIC ZVONIMIR ,  UNGER EUGEN

IPC: H01L21/768 ,  H01L23/522

Abstract: Strip conductor arrangement comprises a strip conductor arranged in a substrate (102), additional strip conductors arranged next to each other over the substrate, a covering layer completely covering the additional strip conductors, a hollow chamber (112) arranged between the additional strip conductors and extending laterally to the additional strip conductors and to the covering layer, wall layers (100) delimiting the hollow chamber laterally to the additional strip conductors and to the covering layer, plugs (111) arranged over the hollow chamber and between the wall layers, a first layer arranged between the substrate and the additional strip conductors and the wall layers, and a second layer arranged on the plugs and the wall layers in the covering layer. An independent claim is also included for a process for the production of the strip conductor arrangement.

公开(公告)号：DE10009762B4

公开(公告)日：2004-06-03

申请号：DE10009762

申请日：2000-03-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HANEDER THOMAS ,  BACHHOFER HARALD ,  HOENLEIN WOLFGANG ,  SCHINDLER GUENTHER ,  HARTNER WALTER

IPC: H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L21/8239

Abstract: Production of a storage capacitor comprises preparing a first electrode layer (1); applying a 1 nm thick CeO2 layer (2) on the electrode layer; applying an amorphous dielectric layer (3) made from SrBi2Ta2O9 (SBT) or SrBi2(TaNb)2O9 (SBTN) on the CeO2 layer; heating at 590-620[deg] C to crystallize the dielectric layer; and applying a second electrode layer (4) on the dielectric layer. An independent claim is also included for a process for the production of a semiconductor component comprising forming a switching transistor on a semiconductor substrate; and forming the storage capacitor on the transistor. Preferred Features: The electrode layers are made from platinum, a conducting oxide of a platinum or an inert and conducting oxide. The dielectric layer is 20-200 nm thick.

公开(公告)号：DE10232386A1

公开(公告)日：2004-01-29

申请号：DE10232386

申请日：2002-07-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ZYBILL CHRISTIAN ERICH ,  SCHINDLER GUENTHER ,  VOGEL MARKUS

IPC: G11B9/00 ,  G11B9/02 ,  G11B11/00 ,  G11B11/16 ,  G11C11/22

Abstract: To store information in a ferroelectric material, a sample probe is used to bring about mechanical action on individual domains and thereby to cause a reversal of polarization in the individual domains, with electrodes situated below the ferroelectric material being able to have a bias applied to them to stabilize the change/reversal of polarization. The reversal of polarization causes an alteration in the surface topography of the ferroelectric material, and this alteration can be used to read the information. The stored information is therefore obtained by ascertaining the surface topography of the ferroelectric material. The information is written and read using an AFM tip, with the tip being able to be operated in contact or tapping mode for the purpose of writing, and additionally in noncontact mode for the purpose of reading.

公开(公告)号：DE10121657A1

公开(公告)日：2002-11-28

申请号：DE10121657

申请日：2001-05-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HARTNER WALTER ,  GABRIC ZVONIMIR ,  KROENKE MATTHIAS ,  SCHINDLER GUENTHER

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L23/00 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L27/11502 ,  H01L21/314

Abstract: The invention relates to a microelectronic structure which provides improved protection of a hydrogen-sensitive dielectric against hydrogen contamination. According to the invention, the hydrogen sensitive dielectric ( 14 ) is covered at lest by an intermediate oxide ( 18 ), where material thickness is at lest five times the thickness of the hydrogen-sensitive dielectric. The intermediate oxide ( 18 ) simultaneously acts as an internal dielectric and is metabolized on its surface for this purpose. The intermediate oxide ( 18 ), which has a sufficient thickness absorbers the hydrogen that may be released during the deposition of a hydrogen barrier layer ( 22, 26 ), thus protecting the hydrogen-sensitive dielectric ( 14 ).

公开(公告)号：DE10121495A1

公开(公告)日：2002-11-14

申请号：DE10121495

申请日：2001-05-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ENGELHARDT MANFRED ,  SCHINDLER GUENTHER

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: Conductor strip arrangement comprises a first layer (101) made from a first insulating material; a conductor strip (104) arranged on the first layer and made from an electrically conducting material; and a second layer (107) arranged on the exposed strip conductor surface. The second layer encloses the conductor strip on the exposed strip conductor surface and is made from a second material which is harder than the first material. An Independent claim is also included for a process for the production of an encapsulated conductor strip. Preferred Features: An intermediate layer is arranged between the first layer and the conductor strip. The intermediate layer is made from a third material which is harder than the first material. The first insulating material is made from silicon dioxide or borophosphosilicate glass. The second material is made from an organic material.

公开(公告)号：DE10109877A1

公开(公告)日：2002-09-19

申请号：DE10109877

申请日：2001-03-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  ENGELHARDT MANFRED

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A conductor track arrangement (100) comprises, on a first layer (101), a first layer surface (102) and at least two conductor tracks (104), which are arranged on the first layer surface and which have a second layer surface (105) that is essentially parallel to the first layer surface (102). A second layer (106) is arranged on the second layer surface of each conductor track (104), whereby the second layers (106) of adjacent conductor tracks overlap areas located between the adjacent conductor tracks (104). A third layer (107) is arranged on said second layer and completely occludes the areas located between the adjacent conductor tracks (104) by overlapping the same.

公开(公告)号：DE19919110C2

公开(公告)日：2002-06-27

申请号：DE19919110

申请日：1999-04-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WEINRICH VOLKER ,  SCHINDLER GUENTHER ,  MAZURE-ESPEJO CARLOS

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/06 ,  H01L27/105 ,  H01L21/321 ,  H01L27/108

Abstract: In a method for fabricating a high-epsilon dielectric/ferroelectric capacitor, a patterning layer with a central base layer zone and a Si-filled trench laterally surrounding the latter is produced. Above that, a metal layer is deposited and is silicided above the Si-filled trench. Through oxidation of the silicided metal layer section the latter migrates into the trench and a base electrode is formed above the base layer zone.

公开(公告)号：DE19854418C2

公开(公告)日：2002-04-25

申请号：DE19854418

申请日：1998-11-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  HARTNER WALTER

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/105 ,  G11C11/22 ,  H01L27/08

公开(公告)号：DE10042235A1

公开(公告)日：2002-04-18

申请号：DE10042235

申请日：2000-08-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  HASLER BARBARA ,  SCHNABEL R FLORIAN ,  WEINRICH VOLKER

IPC: H01L23/522 ,  H01L21/02 ,  H01L21/28 ,  H01L21/768 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/283

Abstract: Process for forming an electrically conducting connection between a diffusion region and an electrode (70). Process comprises: (i) preparing a semiconductor substrate with an insulating layer; (ii) applying a mask (65) to the surface of the insulating layer; (iii) isotropically etching; (iv) anisotropically etching until the lower side of the insulating layer is reached and forming a contact hole (6); (v) removing the mask; (vi) filling the hole with a first conducting material; (vii) back etching the conducting material; and (viii) filling the contact hole with as second conducting material. Preferred Features: The ratio of the contact hole surface in the isotropically etched region to the contact hole surface in the anisotropically etched region is 1.5-4, preferably 2-3. An adhesion promoting layer (62) made of titanium, titanium nitride, titanium silicide, tantalum nitride or tantalum silicon nitride is produced between the two conducting layers.

公开(公告)号：DE10022655A1

公开(公告)日：2001-11-22

申请号：DE10022655

申请日：2000-04-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHINDLER GUENTHER ,  HARTNER WALTER ,  SCHNABEL RAINER-FLORIAN

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01G4/33 ,  H01G4/40

Abstract: The invention relates to a method for producing at least one capacitor structure, comprising the following steps: providing a substrate, producing a first electrode on said substrate, producing a mask, whereby the first electrode is disposed in an opening of said mask, and applying at least one dielectric layer and at least one conductive layer for a second eletrode. The surface of the part of the conductive layer that is applied in the opening of the mask is substantially disposed below the surface of the mask. The conductive layer and the dielectric layer are structured by polishing so that a capacitor structure is produced.