公开(公告)号：US20020142587A1

公开(公告)日：2002-10-03

申请号：US09871200

申请日：2001-05-31

Inventor： Mark G. Allen ,  Cros Florent ,  Jin-Woo Park ,  Kim Kieun

IPC: H01L021/4763

CPC classification number: B81C99/009 ,  B81C2201/0188

Abstract: Methods for creating one or more structures in a micromachined device. In one arrangement, the methods include the steps of providing a substrate, forming upstanding nonconductive mold walls on the substrate so that first and second wells are formed, the second well being wider than the first well. The method further includes applying a first material to the surface of the wells so that the first well fills with the first material before the second well, and removing the first material from the second well while leaving a portion in the first well.

Abstract translation: 在微加工设备中创建一个或多个结构的方法。 在一种布置中，所述方法包括提供基底的步骤，在基底上形成直立的非导电模壁，使得形成第一和第二孔，第二阱比第一孔更宽。 该方法还包括将第一材料施加到孔的表面，使得第一阱在第二阱之前填充第一材料，以及在第一阱中留下一部分的同时从第二阱中移除第一材料。

公开(公告)号：US20180148319A1

公开(公告)日：2018-05-31

申请号：US15879212

申请日：2018-01-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： John Charles Ehmke ,  Virgil Cotoco Ararao

IPC: B81B7/00

CPC classification number: B81B7/0038 ,  B81B2203/0315 ,  B81C1/00269 ,  B81C1/00285 ,  B81C1/00293 ,  B81C2201/0108 ,  B81C2201/013 ,  B81C2201/0188 ,  B81C2201/0198 ,  B81C2201/053 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/035 ,  B82Y30/00 ,  G02B6/4204 ,  G02B6/4208 ,  G02B6/4248 ,  G02B26/001 ,  G02B26/0833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/039 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05109 ,  H01L2224/05123 ,  H01L2224/05138 ,  H01L2224/05163 ,  H01L2224/05166 ,  H01L2224/0517 ,  H01L2224/05562 ,  H01L2224/27462 ,  H01L2224/2747 ,  H01L2224/279 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/29109 ,  H01L2224/29144 ,  H01L2224/32058 ,  H01L2224/32227 ,  H01L2224/83121 ,  H01L2224/83193 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/94 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01074 ,  H01L2924/1461 ,  H01L2924/164 ,  H01L2924/00014 ,  H01L2924/01049 ,  H01L2224/03 ,  H01L2924/01042 ,  H01L2924/01072 ,  H01L2924/01004 ,  H01L2224/83 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03462

Abstract: In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.

公开(公告)号：US20170278605A1

公开(公告)日：2017-09-28

申请号：US15621122

申请日：2017-06-13

Applicant: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.

Inventor： Thomas LISEC ,  Hans-Joachim QUENZER ,  Tim REIMER

IPC: H01F1/06 ,  H01F41/16 ,  G01R33/38 ,  H01F41/32 ,  H01F10/08

CPC classification number: H01F1/06 ,  B81B2201/034 ,  B81B2201/042 ,  B81C1/00126 ,  B81C2201/0188 ,  G01R33/38 ,  G01R33/3802 ,  G02B26/085 ,  G02B26/101 ,  H01F10/08 ,  H01F21/06 ,  H01F41/046 ,  H01F41/16 ,  H01F41/301 ,  H01F41/32 ,  H01F2007/068 ,  H02K15/02 ,  H02K33/16

Abstract: A method for manufacturing a device having a three-dimensional magnetic structure includes applying or introducing magnetic particles onto or into a carrier element. A plurality of at least partly interconnected cavities are formed between the magnetic particles, which contact one another at points of contact, by coating the arrangement of magnetic particles and the carrier. The cavities are penetrated at least partly by the layer generated when coating, resulting in the three-dimensional magnetic structure. A conductor loop arrangement is provided on the carrier or a further carrier. When a current flows through the conductor loop, an inductance of the conductor loop is changed by the three-dimensional magnetic structure, or a force acts on the three-dimensional magnetic structure or the conductor loop by a magnetic field caused by the current flow, or when the position of the three-dimensional magnetic structure is changed, a current flow is induced through the conductor loop.

公开(公告)号：US20170152136A1

公开(公告)日：2017-06-01

申请号：US15429636

申请日：2017-02-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： John Charles Ehmke ,  Virgil Cotoco Ararao

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0038 ,  B81B2203/0315 ,  B81C1/00269 ,  B81C1/00285 ,  B81C1/00293 ,  B81C2201/0108 ,  B81C2201/013 ,  B81C2201/0188 ,  B81C2201/0198 ,  B81C2201/053 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/035 ,  B82Y30/00 ,  G02B6/4204 ,  G02B6/4208 ,  G02B6/4248 ,  G02B26/001 ,  G02B26/0833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/039 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05109 ,  H01L2224/05123 ,  H01L2224/05138 ,  H01L2224/05163 ,  H01L2224/05166 ,  H01L2224/0517 ,  H01L2224/05562 ,  H01L2224/27462 ,  H01L2224/2747 ,  H01L2224/279 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/29109 ,  H01L2224/29144 ,  H01L2224/32058 ,  H01L2224/32227 ,  H01L2224/83121 ,  H01L2224/83193 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/94 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01074 ,  H01L2924/1461 ,  H01L2924/164 ,  H01L2924/00014 ,  H01L2924/01049 ,  H01L2224/03 ,  H01L2924/01042 ,  H01L2924/01072 ,  H01L2924/01004 ,  H01L2224/83 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03462

Abstract: In described examples, a hermetic package of a microelectromechanical system (MEMS) structure includes a substrate having a surface with a MEMS structure of a first height. The substrate is hermetically sealed to a cap forming a cavity over the MEMS structure. The cap is attached to the substrate surface by a vertical stack of metal layers adhering to the substrate surface and to the cap. The stack has a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance. The stack has: a first bottom metal seed film adhering to the substrate and a second bottom metal seed film adhering to the first bottom metal seed film; and a first top metal seed film adhering to the cap and a second top metal seed film adhering to the first top metal seed film.

公开(公告)号：US20170015548A1

公开(公告)日：2017-01-19

申请号：US14963362

申请日：2015-12-09

Applicant: Texas Instruments Incorporated

Inventor： Jie Mao ,  Hau Nguyen ,  Luu Nguyen ,  Anindya Poddar

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00873 ,  B81B7/007 ,  B81B2201/0214 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0278 ,  B81B2201/0292 ,  B81B2201/047 ,  B81B2207/07 ,  B81B2207/098 ,  B81C1/00333 ,  B81C2201/0125 ,  B81C2201/0132 ,  B81C2201/0159 ,  B81C2201/0181 ,  B81C2201/0188 ,  B81C2203/0136 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/3121 ,  H01L24/19 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/96 ,  H01L2924/3511

Abstract: A method for fabricating packaged semiconductor devices (100) with an open cavity (110a) in panel format; placing (process 201) on an adhesive carrier tape a panel-sized grid of metallic pieces having a flat pad (230) and symmetrically placed vertical pillars (231); attaching (process 202) semiconductor chips (101) with sensor systems face-down onto the tape; laminating (process 203) and thinning (process 204) low CTE insulating material (234) to fill gaps between chips and grid; turning over (process 205) assembly to remove tape; plasma-cleaning assembly front side, sputtering and patterning (process 206) uniform metal layer across assembly and optionally plating (process 209) metal layer to form rerouting traces and extended contact pads for assembly; laminating (process 212) insulating stiffener across panel; opening (process 213) cavities in stiffener to access the sensor system; and singulating (process 214) packaged devices by cutting metallic pieces.

Abstract translation: 一种以面板格式制造具有开口腔（110a）的封装半导体器件（100）的方法; 将具有平垫（230）和对称放置的垂直柱（231）的金属片的面板尺寸网格放置（处理201）在粘合剂载带上。 将具有传感器系统的半导体芯片（工艺202）面朝下地附接到带上; 层压（工艺203）和减薄（工艺204）低CTE绝缘材料（234）以填充芯片和网格之间的间隙; 翻转（过程205）组装以去除胶带; 等离子体清洁组件正面，溅射和图案化（工艺206）跨组合均匀的金属层和任选的电镀（工艺209）金属层以形成重新布线迹线和扩展的接触垫用于组装; 层压（工艺212）跨板的绝缘加强件; 在加强件中打开（过程213）空腔以接近传感器系统; 并通过切割金属片来分割（处理214）包装的装置。

公开(公告)号：US20160376147A1

公开(公告)日：2016-12-29

申请号：US15171002

申请日：2016-06-02

Applicant: Nivarox-FAR S.A.

Inventor： Alex Gandelhman ,  Andre Pin

IPC: B81C1/00 ,  G04D99/00

CPC classification number: B81C1/00619 ,  B81B2201/035 ,  B81B2203/0384 ,  B81C1/00103 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/0138 ,  B81C2201/014 ,  B81C2201/0188 ,  B81C2201/0198 ,  G04B13/02 ,  G04B13/026 ,  G04B13/027 ,  G04D99/00

Abstract: The invention relates to a silicon-based component with at least one reduced contact surface which, formed from a method combining at least one oblique side wall etching step with a “Bosch” etch of vertical side walls, improves, in particular, the tribology of components formed by micromachining a silicon-based wafer.

Abstract translation: 本发明涉及具有至少一个还原接触表面的硅基组分，其由至少一个倾斜侧壁蚀刻步骤与垂直侧壁的“博世”蚀刻法组合的方法形成，特别是改进了摩擦学 通过微加工硅基晶片形成的部件。

公开(公告)号：US09466464B1

公开(公告)日：2016-10-11

申请号：US14694710

申请日：2015-04-23

Applicant: Multibeam Corporation

Inventor： David K. Lam ,  Kevin M. Monahan ,  Michael C. Smayling ,  Theodore A. Prescop

IPC: H01J37/30 ,  H01J37/305 ,  H01J37/22 ,  H01J37/05 ,  H01J37/304 ,  H01J37/317

CPC classification number: H01L21/3065 ,  B81C1/00373 ,  B81C2201/0143 ,  B81C2201/0188 ,  C23C14/48 ,  C23C16/047 ,  C23C16/48 ,  C23C16/486 ,  C23C16/487 ,  H01J37/05 ,  H01J37/06 ,  H01J37/08 ,  H01J37/228 ,  H01J37/244 ,  H01J37/30 ,  H01J37/304 ,  H01J37/305 ,  H01J37/3053 ,  H01J37/3056 ,  H01J37/3172 ,  H01J37/3174 ,  H01J37/3177 ,  H01J37/3178 ,  H01J2237/004 ,  H01J2237/0635 ,  H01J2237/1501 ,  H01J2237/24592 ,  H01J2237/30466 ,  H01J2237/30472 ,  H01J2237/31708 ,  H01J2237/31732 ,  H01J2237/31735 ,  H01J2237/31737 ,  H01J2237/3174 ,  H01J2237/31749 ,  H01L21/0228 ,  H01L21/0262 ,  H01L21/26 ,  H01L21/308 ,  H01L21/3085 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26

Abstract: Methods, devices and systems for patterning of substrates using charged particle beams without photomasks and without a resist layer. Material can be removed from a substrate, as directed by a design layout database, localized to positions targeted by multiple, matched charged particle beams. Reducing the number of process steps, and eliminating lithography steps, in localized material removal has the dual benefit of reducing manufacturing cycle time and increasing yield by lowering the probability of defect introduction. Furthermore, highly localized, precision material removal allows for controlled variation of removal rate and enables creation of 3D structures or profiles. Local gas injectors and detectors, and local photon injectors and detectors, are local to corresponding ones of the columns, and can be used to facilitate rapid, accurate, targeted substrate processing.

Abstract translation: 用于使用没有光掩模并且没有抗蚀剂层的带电粒子束来图案化衬底的方法，装置和系统。 材料可以从设计布局数据库指导的基板上移除，该设计布局数据库被定位到由多个匹配的带电粒子束瞄准的位置。 在局部材料去除中减少工艺步骤的数量和消除光刻步骤具有减少制造周期时间并通过降低缺陷引入概率来提高产量的双重优点。 此外，高度局部化的精密材料去除允许控制的去除速率的变化，并且能够创建3D结构或轮廓。 本地气体注入器和检测器以及本地光子注入器和检测器对应于相应的列是局部的，并且可以用于促进快速，准确的靶向基板处理。

公开(公告)号：US09453281B1

公开(公告)日：2016-09-27

申请号：US14745463

申请日：2015-06-21

Applicant: Multibeam Corporation

Inventor： Theodore A. Prescop ,  Kevin M. Monahan ,  David K. Lam ,  Michael C. Smayling

IPC: C23C16/48 ,  H01J37/08 ,  H01J37/30 ,  H01J37/244 ,  H01J37/06

CPC classification number: H01L21/3065 ,  B81C1/00373 ,  B81C2201/0143 ,  B81C2201/0188 ,  C23C14/48 ,  C23C16/047 ,  C23C16/48 ,  C23C16/486 ,  C23C16/487 ,  H01J37/05 ,  H01J37/06 ,  H01J37/08 ,  H01J37/228 ,  H01J37/244 ,  H01J37/30 ,  H01J37/304 ,  H01J37/305 ,  H01J37/3053 ,  H01J37/3056 ,  H01J37/3172 ,  H01J37/3174 ,  H01J37/3177 ,  H01J37/3178 ,  H01J2237/004 ,  H01J2237/0635 ,  H01J2237/1501 ,  H01J2237/24592 ,  H01J2237/30466 ,  H01J2237/30472 ,  H01J2237/31708 ,  H01J2237/31732 ,  H01J2237/31735 ,  H01J2237/31737 ,  H01J2237/3174 ,  H01J2237/31749 ,  H01L21/0228 ,  H01L21/0262 ,  H01L21/26 ,  H01L21/308 ,  H01L21/3085 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26

Abstract: Methods, devices and systems for patterning of substrates using charged particle beams without photomasks and without a resist layer. Material can be deposited onto a substrate, as directed by a design layout database, localized to positions targeted by multiple, matched charged particle beam columns. Reducing the number of process steps, and eliminating lithography steps, in localized material addition has the dual benefit of reducing manufacturing cycle time and increasing yield by lowering the probability of defect introduction. Furthermore, highly localized, precision material deposition allows for controlled variation of deposition rate and enables creation of 3D structures. Local gas injectors and detectors, and local photon injectors and detectors, are local to corresponding ones of the columns, and can be used to facilitate rapid, accurate, targeted, highly configurable substrate processing, advantageously using large arrays of said beam columns.

Abstract translation: 用于使用没有光掩模并且没有抗蚀剂层的带电粒子束来图案化衬底的方法，装置和系统。 材料可以沉积到衬底上，如设计布局数据库所指示的那样，被定位到由多个匹配的带电粒子束柱靶向的位置上。 减少工艺步骤的数量和消除光刻步骤在局部化材料添加中具有减少制造周期时间并通过降低缺陷引入概率来提高产量的双重优点。 此外，高度局部化的精密材料沉积允许沉积速率的受控变化并且能够创建3D结构。 局部气体注入器和检测器以及本地光子注入器和检测器对于相应的列是局部的，并且可以用于促进快速，准确，有针对性的高度可配置的衬底处理，有利地使用所述束柱的大阵列。

公开(公告)号：US20130187169A1

公开(公告)日：2013-07-25

申请号：US13797549

申请日：2013-03-12

Applicant: The Aerospace Corporation

Inventor： David P. TAYLOR ,  Margaret H. ABRAHAM

IPC: H01L21/285

CPC classification number: H01L21/28506 ,  B81B2203/0109 ,  B81C1/00373 ,  B81C2201/0176 ,  B81C2201/0188 ,  C23C16/01 ,  C23C16/04 ,  C23C16/18 ,  C23C16/46 ,  C23C16/481 ,  C23C16/483 ,  G01J5/024 ,  G02B5/285 ,  H01L21/3065 ,  H01L27/13 ,  H01L28/40 ,  H01L28/87

Abstract: Embodiments of the present invention provide systems and methods for depositing materials on either side of a freestanding film using selectively thermally-assisted chemical vapor deposition (STA-CVD), and structures formed using same. A freestanding film, which is suspended over a cavity defined in a substrate, is exposed to a fluidic CVD precursor that reacts to form a solid material when exposed to heat. The freestanding film is then selectively heated in the presence of the precursor. The CVD precursor preferentially deposits on the surface(s) of the freestanding film.

Abstract translation: 本发明的实施例提供了使用选择性热辅助化学气相沉积（STA-CVD）在独立膜的任一侧上沉积材料的系统和方法，以及使用其形成的结构。 悬浮在限定在基底中的空腔上的独立膜暴露于当暴露于热时反应以形成固体材料的流化CVD前体。 然后在前体存在下选择性地加热独立的薄膜。 CVD前体优先沉积在独立膜的表面上。

公开(公告)号：US20130057557A1

公开(公告)日：2013-03-07

申请号：US13227246

申请日：2011-09-07

Applicant: Ravindra Vaman Shenoy ,  Philip Jason Stephanou ,  Ana Rangelova Londergan ,  Evgeni Petrovich Gousev

Inventor： Ravindra Vaman Shenoy ,  Philip Jason Stephanou ,  Ana Rangelova Londergan ,  Evgeni Petrovich Gousev

IPC: G06T1/00 ,  G06F1/16 ,  H01F27/30 ,  B32B15/00 ,  B32B3/00 ,  F28D15/04 ,  C23F1/02 ,  H01G4/30 ,  H01F5/00

CPC classification number: B81C1/0038 ,  B81B2203/0392 ,  B81C2201/0107 ,  B81C2201/0188 ,  B81C2201/038 ,  C23C18/1653 ,  C25D5/10 ,  C25D5/18 ,  C25D5/48 ,  C25D7/00 ,  Y02T50/6765 ,  Y10T428/12493 ,  Y10T428/24612

Abstract: This disclosure provides implementations of high surface area stacked layered metallic structures, devices, apparatus, systems, and related methods. A plurality of stacked layers on a substrate may be manufactured from a plating bath including a first metal and a second metal. A modulated plating current can deposit alternate first metal layers and alloy layers, the alloy layers including the first metal and the second metal. Gaps between the alloy layers can be formed by selectively etching some portions of the first metal layers to define a stacked layered structure. Stacked layered structures may be useful in applications to form capacitors, inductors, catalytic reactors, heat transfer tubes, non-linear springs, filters, batteries, and heavy metal purifiers.

Abstract translation: 本公开提供了高表面积堆叠层状金属结构，装置，装置，系统和相关方法的实施方式。 可以由包括第一金属和第二金属的电镀浴制造衬底上的多个层叠层。 调制的电镀电流可以沉积交替的第一金属层和合金层，合金层包括第一金属和第二金属。 可以通过选择性地蚀刻第一金属层的一些部分以限定堆叠的层状结构来形成合金层之间的间隙。 堆叠的分层结构可用于形成电容器，电感器，催化反应器，传热管，非线性弹簧，过滤器，电池和重金属净化器。