公开(公告)号：EP0575292B1

公开(公告)日：1996-03-13

申请号：EP93810414.8

申请日：1993-06-09

Applicant: DYCONEX PATENTE AG

Inventor： Schmidt, Walter, Dr. ,  Martinelli, Marco

IPC: H05K3/00 ,  H05K3/42

CPC classification number: H05K3/42 ,  H05K1/0287 ,  H05K1/0289 ,  H05K1/0393 ,  H05K1/05 ,  H05K1/115 ,  H05K3/0041 ,  H05K3/0061 ,  H05K3/0064 ,  H05K3/0097 ,  H05K3/386 ,  H05K3/4084 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/066 ,  H05K2201/0909 ,  H05K2201/09327 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09609 ,  H05K2201/09627 ,  H05K2201/09781 ,  H05K2201/09836 ,  H05K2201/09945 ,  H05K2201/10666 ,  H05K2203/0554 ,  H05K2203/0746 ,  H05K2203/1184 ,  H05K2203/1545 ,  H05K2203/1572

公开(公告)号：KR1020110009261A

公开(公告)日：2011-01-27

申请号：KR1020107028885

申请日：2007-02-20

Applicant: 이비덴 가부시키가이샤

Inventor： 이케다도모유키

IPC: H05K3/40 ,  H05K3/18

CPC classification number: H05K3/0026 ,  C25D5/02 ,  H05K1/119 ,  H05K3/0032 ,  H05K3/0094 ,  H05K3/422 ,  H05K3/423 ,  H05K3/427 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2203/1572 ,  Y10T29/49124 ,  Y10T29/49126

Abstract: 절연성 수지 기재에 형성한 관통공 내에 도금 충전하여 이루어지는 스루홀을 갖는 프린트 배선판에 있어서, 절연성 수지 기재의 표면 및 이면으로부터 노출되는 각 스루홀의 중심축의 위치를 서로 어긋나게 하여 배치시킴으로써, 보이드 등의 결함이나 크랙의 발생을 저감시켜, 기판의 접속 불량을 저감시키고, 또한 기판의 기계적 강도를 향상시키는 스루홀 구조를 갖는 프린트 배선판을 제공한다.

公开(公告)号：KR1020060078117A

公开(公告)日：2006-07-05

申请号：KR1020040116807

申请日：2004-12-30

Applicant: 삼성전기주식회사

Inventor： 김영우 ,  민병렬 ,  류창명 ,  채우림 ,  김한

IPC: H05K1/16

CPC classification number: H05K1/162 ,  H05K3/0047 ,  H05K3/427 ,  H05K2201/0187 ,  H05K2201/09645 ,  H05K2201/09836 ,  H05K2201/09981 ,  H05K2203/1476 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: 본 발명은 절연층내에 긴 길이의 내장형 커패시터를 형성함으로써, 고용량의 커패시턴스(capacitance)를 제공하고 커패시턴스의 용량 설계가 자유로운 커패시터 내장형 인쇄회로기판 및 그 제조방법에 관한 것이다.
커패시터 내장형 인쇄회로기판, 내장형 커패시터, 인쇄회로기판, PCB

Abstract translation: 本发明涉及一种长的长度，以提供高容量的电容（电容）和基板及其制造内置形成于绝缘层中的自由电容器印刷电路的电容的设计中的电容器的方法的一个嵌入的电容器。

公开(公告)号：EP2566298B1

公开(公告)日：2018-06-06

申请号：EP11775043.0

申请日：2011-04-27

Applicant: Lumiotec Inc.

Inventor： KAGOTANI Akihito ,  ARISAWA Makoto ,  KAMADA Hideki

IPC: H01L51/52 ,  H05B33/06 ,  H05B33/04 ,  B32B17/10 ,  F21V29/74 ,  H05K1/14 ,  H05K3/32 ,  H05K3/36

CPC classification number: H05B33/06 ,  B32B17/10036 ,  B32B17/10541 ,  F21V29/74 ,  F21V29/89 ,  F21Y2105/00 ,  F21Y2115/20 ,  H01L51/5203 ,  H01L51/524 ,  H01L51/5253 ,  H01L51/529 ,  H01L2251/5361 ,  H05B33/02 ,  H05B33/04 ,  H05K1/14 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/041 ,  H05K2201/09027 ,  H05K2201/09836 ,  H05K2201/10128

Abstract: Disclosed is an organic EL illumination device-which is provided with: an organic EL element (13) on a glass substrate (10); and a plurality of anode terminal electrodes (11) and cathode terminal electrodes (12) for evenly supplying current to the aforementioned organic EL element (13) on the aforementioned glass substrate (10)-wherein the organic EL illumination device is provided with a wiring board (1) to which a circuit having anode wiring (1a) corresponding to the position of each of the aforementioned anode terminal electrodes (11), and a circuit having cathode wiring (1b) corresponding to the position of each of the aforementioned cathode terminal electrodes (12) are formed.

公开(公告)号：EP2493273A4

公开(公告)日：2013-10-16

申请号：EP10824714

申请日：2010-08-04

Applicant: FUJIKURA LTD

Inventor： YAMAMOTO SATOSHI ,  HIRANO HIROYUKI ,  SUZUKI TAKANAO

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/40

CPC classification number: H01L21/486 ,  H01L23/3107 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/09701 ,  H01L2924/1461 ,  H05K1/113 ,  H05K3/101 ,  H05K2201/09263 ,  H05K2201/09836 ,  H05K2201/10545 ,  Y10T29/49165 ,  H01L2924/00

Abstract: Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface. Each of the through-hole interconnections includes a first conductive portion, provided at a position corresponding to the electrode of the first device, on the first main surface, and a second conductive portion, provided at a position corresponding to the electrode of the second device, on the second main surface, each electrode of the first device is electrically connected to the first conductive portion, each of the electrodes of the second device is electrically connected to the second conductive portion, and each of the through-hole interconnections includes a linear portion vertically extending from at least one of the first main surface and the second main surface.

公开(公告)号：EP1670075A3

公开(公告)日：2008-12-31

申请号：EP05026727.7

申请日：2005-12-07

Applicant: NGK SPARK PLUG CO., LTD

Inventor： Nagai, Makoto ,  Yada, Setsuo ,  Uchida, Atsushi

IPC: H01L33/00

CPC classification number: H05K1/183 ,  H01L33/486 ,  H01L33/60 ,  H01L33/62 ,  H01L2224/32225 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/246 ,  H05K3/4614 ,  H05K3/4629 ,  H05K3/4697 ,  H05K2201/0347 ,  H05K2201/09836 ,  H05K2201/09981 ,  H05K2201/10106 ,  H05K2203/061

Abstract: A wiring substrate for mounting a light emitting element, comprising: a substrate body comprising an insulating material and having a first surface and a back surface; and a cavity being opened into the first surface of said substrate body and having a mounting area for mounting a light emitting element at a bottom face of said cavity, wherein a metallized layer provided along a side face of said cavity and metallized layers provided in said substrate body are provided to continue to each other.

公开(公告)号：EP1796444A3

公开(公告)日：2008-11-05

申请号：EP06077045.0

申请日：2006-11-17

Applicant: Delphi Technologies, Inc.

Inventor： Fairchild, M. Ray ,  Djordjevic, Aleksandra ,  Ruiz, Javier

IPC: H05K1/02

CPC classification number: H05K1/0206 ,  H01L23/3677 ,  H01L24/33 ,  H01L2224/32225 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H05K3/0061 ,  H05K2201/09836 ,  H01L2924/00

Abstract: An electronics assembly (10) is provided including a circuit board substrate (20) having a top surface and a bottom surface and a plurality of thermal conductive vias (26) extending from the top surface to the bottom surface. At least one electronics package (12) is mounted to the top surface of the substrate (20). A heat sink device (30) is in thermal communication with the bottom surface of the substrate (20). Thermal conductive vias (26) are in thermal communication to pass thermal energy from the at least one electronics package (12) to the heat sink (30). At least some of the thermal conductive vias (26) are formed extending from the top surface to the bottom surface of the substrate (20) at an angle (θ).

公开(公告)号：EP0926931A4

公开(公告)日：2006-12-06

申请号：EP98914051

申请日：1998-04-16

Applicant: SHINKO ELECTRIC IND CO

Inventor： HORIUCHI MICHIO ,  SUYAMA TOSHIAKI ,  TOKITA MASAKUNI

IPC: H05K3/44 ,  H01L23/498 ,  H05K1/11 ,  H05K3/40 ,  H05K3/46

CPC classification number: H01L23/49827 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/15174 ,  H05K1/112 ,  H05K1/115 ,  H05K3/4038 ,  H05K2201/09836 ,  H05K2201/10287 ,  H05K2201/10977 ,  H05K2203/0235 ,  H01L2924/00

Abstract: A wiring board in which vias radially extending through the wiring board from one side to the other side in such a way that the interval between the vias on one side of the wiring board is smaller than those between the vias on the other side, characterized in that a plurality of vias (12, 12, ...) are radially arranged from one side (10a) of the wiring board (10) to the other side (10b) in such a way that the interval (Wa) between the vias on one side (10a) is smaller than the interval (Wa) between the vias on the other side (10b) in order to prevent electrical short-circuit even if the interval between the vias on one side of the wiring board is very small, and that a conductor forming a core portion (14) of each of the vias (12) is covered with a sheath portion (16) made of an insulator.

公开(公告)号：EP1162569A3

公开(公告)日：2003-11-12

申请号：EP01120744.6

申请日：1998-02-02

Applicant: Giesecke & Devrient GmbH

Inventor： Tarantino, Thomas ,  HaghiriTehrani, Yahya

IPC: G06K19/077

CPC classification number: G06K19/0775 ,  G06K19/07749 ,  H05K1/0268 ,  H05K1/183 ,  H05K3/0044 ,  H05K3/28 ,  H05K3/305 ,  H05K3/321 ,  H05K3/4007 ,  H05K2201/09836 ,  H05K2203/0207 ,  H05K2203/0228

Abstract: Die Erfindung betrifft ein Verfahren zur Herstellung eines Kartenförmigen Datenträgers (1), mit einer Antenne (3) sowie einem Chipmodul (2), das einen integrierten Schaltkreis (10) enthält und in einer Aussparung (5) des Kartenkörpers (1) eingesetzt ist. Die elektrische Verbindung zwischen der Antenne (3) und dem Chipmodul (2) erfolgt über Vertiefungen (11) in den Anschlüssen (4) der Antenne (3). Zur Herstellung des Datenträgers wird der Kartenkörper (1), in dem die Antenne (3) wenigstens teilweise eingebettet ist, mit einer Aussparung (5) versehen. Die Anschlüsse (4) der Antenne (3) werden durch Abtragen des darüberliegenden Kartenmaterials freigelegt, wobei auch ein Teil des die Anschlüsse (4) bildenden Materials abgetragen wird. In die Aussparung (5) wird das Chipmodul (2) eingesetzt und eine elektrische Verbindung zwischen dem Chipmodul (2) und der Antenne (3) beispielsweise mittels eines leitfähigen Klebers (7) hergestellt. Einfindungsgemäß wir der Materialabtrag über den Anschlüssen (4) der Antenne (3) sensorgesteuert vorgenommen, wobei ein Sensorsignal die Berührung zwischen dem verwendeten Werkzeug und den Anschlüssen angibt.

公开(公告)号：EP1162569A2

公开(公告)日：2001-12-12

申请号：EP01120744.6

申请日：1998-02-02

Applicant: Giesecke & Devrient GmbH

Inventor： Tarantino, Thomas ,  HaghiriTehrani, Yahya

IPC: G06K19/077

CPC classification number: G06K19/0775 ,  G06K19/07749 ,  H05K1/0268 ,  H05K1/183 ,  H05K3/0044 ,  H05K3/28 ,  H05K3/305 ,  H05K3/321 ,  H05K3/4007 ,  H05K2201/09836 ,  H05K2203/0207 ,  H05K2203/0228

Abstract: Die Erfindung betrifft ein Verfahren zur Herstellung eines Kartenförmigen Datenträgers (1), mit einer Antenne (3) sowie einem Chipmodul (2), das einen integrierten Schaltkreis (10) enthält und in einer Aussparung (5) des Kartenkörpers (1) eingesetzt ist. Die elektrische Verbindung zwischen der Antenne (3) und dem Chipmodul (2) erfolgt über Vertiefungen (11) in den Anschlüssen (4) der Antenne (3). Zur Herstellung des Datenträgers wird der Kartenkörper (1), in dem die Antenne (3) wenigstens teilweise eingebettet ist, mit einer Aussparung (5) versehen. Die Anschlüsse (4) der Antenne (3) werden durch Abtragen des darüberliegenden Kartenmaterials freigelegt, wobei auch ein Teil des die Anschlüsse (4) bildenden Materials abgetragen wird. In die Aussparung (5) wird das Chipmodul (2) eingesetzt und eine elektrische Verbindung zwischen dem Chipmodul (2) und der Antenne (3) beispielsweise mittels eines leitfähigen Klebers (7) hergestellt. Einfindungsgemäß wir der Materialabtrag über den Anschlüssen (4) der Antenne (3) sensorgesteuert vorgenommen, wobei ein Sensorsignal die Berührung zwischen dem verwendeten Werkzeug und den Anschlüssen angibt.

Abstract translation: 该方法包括准备具有至少部分地嵌入卡体内的天线（3）的卡体（1）。 准备了具有或由集成电路组成的芯片模块（2）。 通过去除材料在卡体中形成孔（5）。 天线连接（4）通过去除其上的卡材料而被暴露，由此形成连接的材料的一部分也被去除。