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Patent Agency Ranking
公开(公告)号：WO2015187972A1
公开(公告)日：2015-12-10
申请号：PCT/US2015/034233
申请日：2015-06-04
Applicant: APPLE INC.
Inventor： LEE, Meng Chi , PENNATHUR, Shankar , GOOCH, Scott, L. , PYPER, Dennis, R. , SALEHI, Amir
CPC classification number: H05K1/181 , H05K1/115 , H05K1/141 , H05K1/144 , H05K1/189 , H05K3/284 , H05K3/303 , H05K3/363 , H05K3/4015 , H05K2201/042 , H05K2201/10318 , H05K2201/10378 , H05K2203/1316 , Y10T29/49128
Abstract: Readily modifiable and customizable, low-area overhead interconnect structures for forming connections between a system-in-a-package module and other components in an electronic device. One example may provide an interposer (120 ) for providing an interconnection between a system-in-a-package module comprising a first board (110), electronic components (130, 132) and a molded portion (140), and other components (150) in an electronic device. Another may provide a plurality of conductive pins or contacts to form interconnect paths between a module and other components.
Abstract translation: 易于修改和可定制的低面积架空互连结构，用于在系统级封装模块和电子设备中的其他组件之间形成连接。 一个示例可以提供用于在包括第一板（110），电子部件（130,132）和模制部分（140）以及其它部件（140）的系统级封装模块之间提供互连的插入器（120） 150）在电子设备中。 另一个可以提供多个导电引脚或触点以在模块和其它部件之间形成互连路径。
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公开(公告)号：WO2014051848A1
公开(公告)日：2014-04-03
申请号：PCT/US2013/052389
申请日：2013-07-26
Applicant: APPLE INC.
Inventor： LI, Xingqun , RIBAS, Carlos , PYPER, Dennis, R. , FOSTER, James, H. , FISHER, Joseph, R., Jr. , MULLINS, Scott, P. , MAYO, Sean, A. , CHEN, Wyeman
CPC classification number: H05K1/181 , H01L2224/16235 , H01L2924/15159 , H01L2924/15192 , H01L2924/15311 , H01L2924/19103 , H05K1/0231 , H05K1/0233 , H05K1/11 , H05K1/115 , H05K1/183 , H05K1/185 , H05K3/284 , H05K3/303 , H05K3/4614 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/1006 , H05K2201/10378 , H05K2201/10454 , H05K2201/10515 , H05K2201/10522 , H05K2201/1053 , H05K2201/10537 , H05K2201/10636 , H05K2201/10734 , H05K2203/1316 , H05K2203/1327 , Y02P70/611 , Y10T29/49146
Abstract: Electronic devices may contain electrical systems in which electrical components are mounted on a substrate such as a printed circuit board. The electrical components may include surface mount technology components. Multiple surface mount technology components may be stacked on top of each other and beside each other to form an electrical component that minimizes the amount of area that is consumed on a printed circuit board. Noise suppression circuits and other circuits may be implemented using stacked surface mount technology components. Surface mount technology components placed on the printed circuit board may be pushed together and subsequently injection molded to form packed component groups. An integrated circuit may be mounted to the printed circuit board via an interposer and may cover components mounted to the printed circuit board. An integrated circuit may be mounted over a recessed portion of the printed circuit board on which components are mounted.
Abstract translation: 电子设备可以包含其中电气部件安装在诸如印刷电路板的基板上的电气系统。 电气部件可以包括表面贴装技术部件。 多个表面贴装技术部件可以堆叠在彼此的顶部并且彼此相邻以形成使得在印刷电路板上消耗的面积的量最小化的电气部件。 噪声抑制电路和其他电路可以使用堆叠的表面贴装技术部件来实现。 放置在印刷电路板上的表面贴装技术部件可以一起推入并随后注射成型以形成包装的部件组。 集成电路可以经由插入器安装到印刷电路板，并且可以覆盖安装到印刷电路板的部件。 集成电路可以安装在印刷电路板的安装组件的凹部上。
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公开(公告)号：WO2013066751A1
公开(公告)日：2013-05-10
申请号：PCT/US2012/062139
申请日：2012-10-26
Applicant: APPLE INC. , MERZ, Nicholas, G. , WANG, Hong , NIKKHOO, Michael, M. , PYPER, Dennis, R. , WERNER, Christopher, Matthew
Inventor： MERZ, Nicholas, G. , WANG, Hong , NIKKHOO, Michael, M. , PYPER, Dennis, R. , WERNER, Christopher, Matthew
CPC classification number: H05K1/0218 , H05K3/284 , H05K2201/0317 , H05K2201/09618 , H05K2201/09872 , H05K2201/09909 , H05K2201/10371 , H05K2201/2018 , Y10T29/4913 , Y10T29/49146
Abstract: Methods and apparatuses are disclosed for fabricating a printed circuit board (PCB) having electromagnetic interference (EMI) shielding and also having reduced volume over conventional frame-and-shield approaches. Some embodiments include fabricating the PCB by mounting an integrated circuit to the PCB, outlining an area corresponding to the integrated circuit with a number of grounded vias, selectively applying an insulating layer over the PCB such that at least one of the grounded vias are exposed, and selectively applying a conductive layer over the PCB such that the conductive layer covers at least a portion of the integrated circuit and such that the conductive layer is coupled to the at least one of the grounded vias that are exposed.
Abstract translation: 公开了用于制造具有电磁干扰（EMI）屏蔽的印刷电路板（PCB）的方法和装置，并且与传统的框架 - 屏蔽方法相比也具有减小的体积。 一些实施例包括通过将集成电路安装到PCB来制造PCB，通过多个接地通孔来概括对应于集成电路的区域，在PCB上选择性地施加绝缘层，使得接地通孔中的至少一个暴露， 以及选择性地在所述PCB上施加导电层，使得所述导电层覆盖所述集成电路的至少一部分，并且使得所述导电层耦合到暴露的所述接地通孔中的至少一个。
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4.发明公开LOW-AREA OVERHEAD CONNECTIVITY SOLUTIONS TO SIP MODULE 审中-公开KONNEKTIVITÄTSLÖSUNGENMITKLEINFLÄCHIGEMOVERHEAD AN EIN SIP-MODUL
公开(公告)号：EP3152986A1
公开(公告)日：2017-04-12
申请号：EP15730353.8
申请日：2015-06-04
Applicant: Apple Inc.
Inventor： LEE, Meng Chi , PENNATHUR, Shankar , GOOCH, Scott, L. , PYPER, Dennis, R. , SALEHI, Amir
CPC classification number: H05K1/181 , H05K1/115 , H05K1/141 , H05K1/144 , H05K1/189 , H05K3/284 , H05K3/303 , H05K3/363 , H05K3/4015 , H05K2201/042 , H05K2201/10318 , H05K2201/10378 , H05K2203/1316 , Y10T29/49128
Abstract: Readily modifiable and customizable, low-area overhead interconnect structures for forming connections between a system-in-a-package module and other components in an electronic device. One example may provide an interposer (120 ) for providing an interconnection between a system-in-a-package module comprising a first board (110), electronic components (130, 132) and a molded portion (140), and other components (150) in an electronic device. Another may provide a plurality of conductive pins or contacts to form interconnect paths between a module and other components.
Abstract translation: 易于修改和可定制的低面积架空互连结构，用于在系统级封装模块和电子设备中的其他组件之间形成连接。 一个示例可以提供用于在系统级封装模块和电子设备中的其它部件之间提供互连的插入器。 另一个可以提供多个导电引脚以在模块和其他部件之间形成互连路径。
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公开(公告)号：EP2749152B1
公开(公告)日：2019-05-08
申请号：EP12790724.4
申请日：2012-10-26
Applicant: Apple Inc.
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