公开(公告)号：EP2243155A4

公开(公告)日：2012-07-25

申请号：EP09705024

申请日：2009-01-22

Applicant: IBM

Inventor： YANG CHIH-CHAO ,  EDELSTEIN DANIEL C ,  MCFEELY FENTON R

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76826 ,  H01L21/76849 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：EP1842240A4

公开(公告)日：2009-10-14

申请号：EP05826022

申请日：2005-12-02

Applicant: IBM

Inventor： CALLEGARI ALESSANDRO C ,  GRIBELYUK MICHAEL A ,  LACEY DIANNE L ,  MCFEELY FENTON R ,  SAENGER KATHERINE L ,  ZAFAR SUFI

IPC: H01L21/28 ,  C23C14/06 ,  C23C14/34 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L29/4966 ,  C23C14/0036 ,  C23C14/0635 ,  H01L21/28088 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

公开(公告)号：EP1836732A4

公开(公告)日：2009-07-01

申请号：EP05826298

申请日：2005-12-02

Applicant: IBM

Inventor： CALLEGARI ALESSANDRO C ,  FRANK MARTIN M ,  JAMMY RAJARAO ,  LACEY DIANNE L ,  MCFEELY FENTON R ,  ZAFAR SUFI

IPC: H01L27/088 ,  H01L21/28 ,  H01L29/49

CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665 ,  H01L29/6659

Abstract: A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer. Furthermore, after annealing the stack of HfSiN/high k dielectric/interfacial layer at a high temperature (on the order of about 1000°C), there is a reduction of the interfacial layer, thus the gate stack produces a very small equivalent oxide thickness (12 Å classical), which cannot be achieved using TaSiN.

公开(公告)号：JPH11330006A

公开(公告)日：1999-11-30

申请号：JP11757899

申请日：1999-04-26

Applicant: IBM

Inventor： COHEN STEPHEN A ,  MCFEELY FENTON R ,  NOYAN CEVDET I ,  RODBELL KENNETH P ,  YURKAS JOHN J ,  ROSENBERG ROBERT

IPC: H01L23/52 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532

Abstract: PROBLEM TO BE SOLVED: To obtain a new barrier layer which fulfills all standards by forming an alpha phase tungsten barrier layer in a trench or a via, having a mutual bonding structure by using a chemical low temperature/low pressure air phase adhesion technology. SOLUTION: A dielectric 22 is formed on a semiconductor substrate 20 and a trench or a via having a mutual bonding structure is formed on the surface of the dielectric 22. An alpha phase tungsten barrier layer 24 is formed in the trench or the via through the use of chemical low temperature/low pressure air phase adhesion technology method and an arbitrarily selected metallic seed layer 26 is laminated and formed thereon. Additionally conductive material 28 is embedcred in the trench or the via and an alpha phase tungsten barrier layer 25, a dielectric 30 and an electrode 32 are successively formed thereon. In this case a barrier layer 36, made of such materials as alpha tungsten and so on which protects a contact of the conductor 28 with the dielectric 22, is formed.

公开(公告)号：JP2010010642A

公开(公告)日：2010-01-14

申请号：JP2008268013

申请日：2008-10-16

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： MCFEELY FENTON R ,  YANG CHIH-CHAO

IPC: H01L21/768 ,  C23C28/00 ,  H01L21/3065 ,  H01L21/3205 ,  H01L23/52

CPC classification number: H01L21/76843 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide an improved process for manufacturing a via applicable to a requirement in the latest scaling technique, and capable of manufacturing the appropriately operable via in a batch. SOLUTION: The via and its manufacturing technique are provided with the improved high aspect ratio. In one embodiment, the manufacturing method is provided for the copper-plated via of the improved high aspect ratio. The method includes a step of etching the via of the high aspect ratio into a dielectric layer, for depositing a diffusion barrier region in the via of the high aspect ratio and on one or a plurality of surfaces of the dielectric layer, for depositing a copper layer on the diffusion barrier layer, for depositing a ruthenium layer on the copper layer, and for filling the via of the high aspect ratio with the plated copper on the ruthenium layer. Also, the via of the high aspect ratio is provided as copper-plated according to the method. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于制造适用于最新缩放技术的要求的通路的改进方法，并且能够批量制造适当可操作的通孔。

解决方案：通孔及其制造技术具有改进的高纵横比。 在一个实施例中，为镀铜通孔提供改进的高纵横比的制造方法。 该方法包括将高纵横比的通孔蚀刻成电介质层的步骤，用于在高纵横比的通孔中以及介电层的一个或多个表面上沉积扩散阻挡区域，以沉积铜 层，用于在铜层上沉积钌层，并且用铀层上的镀铜填充高纵横比的通孔。 此外，根据该方法，通过镀铜，提供高纵横比的通孔。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：WO2006057709A2

公开(公告)日：2006-06-01

申请号：PCT/US2005035582

申请日：2005-10-03

Applicant: TOKYO ELECTRON LTD ,  IBM ,  SUZUKI KENJI ,  GUIDOTTI EMMANUEL ,  LEUSINK GERRIT J ,  MCFEELY FENTON R

Inventor： SUZUKI KENJI ,  GUIDOTTI EMMANUEL ,  LEUSINK GERRIT J ,  MCFEELY FENTON R

IPC: C23C16/16

CPC classification number: H01L21/76843 ,  C23C16/16 ,  H01L21/28556 ,  H01L21/76846 ,  H01L21/76873

Abstract: A method (300) for increasing deposition rates of metal layers from metal­carbonyl precursors (52, 152) by mixing a vapor of the metal-carbonyl precursor (52, 152) with CO gas. The method (300) includes providing a substrate (25, 125) in a process chamber (10, 110) of a deposition system (1, 100), forming a process gas containing a metal-carbonyl precursor vapor and a CO gas, and exposing the substrate (25, 125, 400, 402) to the process gas to deposit a metal layer (440, 460) on the substrate (25, 125, 400, 402) by a thermal chemical vapor deposition process.

Abstract translation: 一种用于通过将羰基金属前体（52,152）的蒸气与CO气体混合来提高金属层从金属羰基前体（52,152）的沉积速率的方法（300）。 方法（300）包括在沉积系统（1,100）的处理室（10,110）中提供衬底（25,125），形成含有羰基金属前体蒸气和CO气体的工艺气体，以及 将所述衬底（25,125,400,402）暴露于所述工艺气体，以通过热化学气相沉积工艺将金属层（440,460）沉积在所述衬底（25,125,400,402）上。

公开(公告)号：WO2006057709A8

公开(公告)日：2007-05-31

申请号：PCT/US2005035582

申请日：2005-10-03

Applicant: TOKYO ELECTRON LTD ,  IBM ,  SUZUKI KENJI ,  GUIDOTTI EMMANUEL ,  LEUSINK GERRIT J ,  MCFEELY FENTON R ,  MALHOTRA SANDRA G

Inventor： SUZUKI KENJI ,  GUIDOTTI EMMANUEL ,  LEUSINK GERRIT J ,  MCFEELY FENTON R ,  MALHOTRA SANDRA G

IPC: C23C16/16 ,  H01L21/768

CPC classification number: H01L21/76843 ,  C23C16/16 ,  H01L21/28556 ,  H01L21/76846 ,  H01L21/76873

Abstract: A method (300) for increasing deposition rates of metal layers from metal­carbonyl precursors (52, 152) by mixing a vapor of the metal-carbonyl precursor (52, 152) with CO gas. The method (300) includes providing a substrate (25, 125) in a process chamber (10, 110) of a deposition system (1, 100), forming a process gas containing a metal-carbonyl precursor vapor and a CO gas, and exposing the substrate (25, 125, 400, 402) to the process gas to deposit a metal layer (440, 460) on the substrate (25, 125, 400, 402) by a thermal chemical vapor deposition process.

Abstract translation: 一种用于通过将羰基金属前体（52,152）的蒸气与CO气体混合来提高金属层从金属羰基前体（52,152）的沉积速率的方法（300）。 方法（300）包括在沉积系统（1,100）的处理室（10,110）中提供衬底（25,125），形成含有羰基金属前体蒸气和CO气体的工艺气体，以及 将所述衬底（25,125,400,402）暴露于所述工艺气体，以通过热化学气相沉积工艺将金属层（440,460）沉积在所述衬底（25,125,400,402）上。

公开(公告)号：WO2005033357A3

公开(公告)日：2005-06-23

申请号：PCT/US2004028894

申请日：2004-09-07

Applicant: TOKYO ELECTRON LTD ,  IBM ,  YAMASAKI HIDEAKI ,  MATSUDA TSUKASA ,  GOMI ATSUSHI ,  HATANO TATSUO ,  SUGIURA MASAHITO ,  KAWANO YUMIKO ,  LEUSINK GERT J ,  MCFEELY FENTON R ,  MALHOTRA SANDRA G

Inventor： YAMASAKI HIDEAKI ,  MATSUDA TSUKASA ,  GOMI ATSUSHI ,  HATANO TATSUO ,  SUGIURA MASAHITO ,  KAWANO YUMIKO ,  LEUSINK GERT J ,  MCFEELY FENTON R ,  MALHOTRA SANDRA G

IPC: C23C16/16 ,  C23C16/44 ,  H01L21/285 ,  C23C16/455

CPC classification number: C23C16/16 ,  H01L21/28556

Abstract: A method for depositing metal layers on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process includes introducing a process gas containing a metal carbonyl precursor in a process chamber and depositing a metal layer on a substrate. The TCVD process utilizes a short residence time for the gaseous species in the processing zone above the substrate to form a low-resistivity metal layer. In one embodiment of the invention, the metal carbonyl precursor can be selected from at least one of W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12 precursors. In another embodiment of the invention, a method is provided for depositing low-resistivity W layers at substrate temperatures below about 500 C, by utilizing a residence time less than about 120 msec.

Abstract translation: 通过热化学气相沉积（TCVD）方法在金属层上沉积金属层的方法包括在处理室中引入含有羰基金属前驱体的工艺气体并在基底上沉积金属层。 TCVD工艺利用在衬底上方的处理区域中的气态物质的短暂停留时间以形成低电阻率金属层。 在本发明的一个实施方案中，金属羰基前体可以选自W（CO）6，Ni（CO）4，Mo（CO）6，Co 2（CO）8，Rh 4（CO）12，Re 2 （CO）10，Cr（CO）6和Ru 3（CO）12前体）。 在本发明的另一个实施例中，提供了一种通过利用小于约120毫秒的停留时间在低于约500℃的衬底温度下沉积低电阻W层的方法。

公开(公告)号：WO2006076086A3

公开(公告)日：2009-04-16

申请号：PCT/US2005043552

申请日：2005-12-02

Applicant: IBM ,  CALLEGARI ALESSANDRO C ,  GRIBELYUK MICHAEL A ,  LACEY DIANNE L ,  MCFEELY FENTON R ,  SAENGER KATHERINE L ,  ZAFAR SUFI

Inventor： CALLEGARI ALESSANDRO C ,  GRIBELYUK MICHAEL A ,  LACEY DIANNE L ,  MCFEELY FENTON R ,  SAENGER KATHERINE L ,  ZAFAR SUFI

IPC: H01L29/94 ,  H01L29/76 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L29/4966 ,  C23C14/0036 ,  C23C14/0635 ,  H01L21/28088 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

Abstract: A compound metal comprising TiC which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the TiC compound metal. Furthermore, the TiC metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000°C allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 Å in a p-metal oxide semiconductor (pMOS) device.

Abstract translation: 提供了包含TiC的复合金属，其是在包括高k电介质和界面层的栅极堆叠上具有约4.75至约5.3，优选约5e的功函数的功函数的热电稳定的p型金属，以及 制造TiC复合金属的方法。 此外，本发明的TiC金属化合物在1000℃下是非常有效的氧扩散阻挡层，在p-金属氧化物半导体（pMOS）器件中允许非常有侵蚀性的等效氧化物厚度（EOT）和低于14的反型层厚度标度。

公开(公告)号：WO2006076087A2

公开(公告)日：2006-07-20

申请号：PCT/US2005043555

申请日：2005-12-02

Applicant: IBM ,  CALLEGARI ALESSANDRO C ,  FRANK MARTIN M ,  JAMMY RAJARAO ,  LACEY DIANNE L ,  MCFEELY FENTON R ,  ZAFAR SUFI

Inventor： CALLEGARI ALESSANDRO C ,  FRANK MARTIN M ,  JAMMY RAJARAO ,  LACEY DIANNE L ,  MCFEELY FENTON R ,  ZAFAR SUFI

IPC: H01L29/94

CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665 ,  H01L29/6659

Abstract: A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer. Furthermore, after annealing the stack of HfSiN/high k dielectric/interfacial layer at a high temperature (on the order of about 1000°C), there is a reduction of the interfacial layer, thus the gate stack produces a very small equivalent oxide thickness (12 Å classical), which cannot be achieved using TaSiN.

Abstract translation: 包含HfSiN的复合金属，其是具有约4.0至约4.5，优选约4.3的功函数的n型金属，其在包含高k电介质和界面层的栅极堆叠上是热稳定的。 此外，在高温（约1000℃）的高温下退火HfSiN /高k电介质/界面层之后，界面层的减少，因此栅叠层产生非常小的等效氧化物厚度 （12经典），使用TaSiN无法实现。