公开(公告)号：EP2286444A4

公开(公告)日：2012-11-21

申请号：EP09747138

申请日：2009-04-28

Applicant: IBM

Inventor： ESHUN EBENEZER E ,  HE ZHONG-XIANG ,  RASSEL ROBERT M ,  COOLBAUGH DOUGLAS ,  GEBRESELASIE EPHREM G ,  WANG PING-CHUAN ,  KIM DEOK-KEE ,  KOTHANDARAMAN CHANDRASEKHARAN ,  ROBSON NORMAN W ,  MOY DAN ,  SAFRAN JOHN M ,  STEIN KENNETH J ,  HO HERBERT L ,  YAN HONGWEN

IPC: H01L23/525 ,  H01L27/06

CPC classification number: H01L27/0629 ,  H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：EP1920441A4

公开(公告)日：2009-04-29

申请号：EP06802479

申请日：2006-08-30

Applicant: IBM

Inventor： FREDEMAN GREGORY J ,  KIRIHATA TOSHIAKI ,  LESLIE ALAN J ,  SAFRAN JOHN M

IPC: G11C17/00 ,  G11C7/00 ,  G11C7/02

CPC classification number: G11C17/16 ,  G11C17/165 ,  G11C29/027

Abstract: A one-time-programmable-read-only-memory (OTPROM) is implemented in a two-dimensional array of aggressively scaled silicide migratable e-fuse. Word line (WL) selection is performed by decoding logic (140) at Vdd while the bit line drive is switched between Vdd and a higher voltage, Vp, for programming. The OTPROM is thus compatible with and can be integrated with other technologies without a cost adder and supports optimization of the high current patch for minimal voltage drop during fuse programming. A differential sense amplifier (120) with a programmable reference (130) is used for improved sense margins and can support an entire bit line rather than sense amplifiers (120) being provided for individual fuses.

公开(公告)号：WO2008109654A3

公开(公告)日：2008-11-06

申请号：PCT/US2008055875

申请日：2008-03-03

Applicant: IBM ,  CESTERO ALBERTO ,  PARK BYEONGJU ,  SAFRAN JOHN M

Inventor： CESTERO ALBERTO ,  PARK BYEONGJU ,  SAFRAN JOHN M

IPC: H01L21/82 ,  H01L21/326

CPC classification number: H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An antifuse (100) having a link (125) including a region (150) of unsilicided semiconductor material may be programmed at reduced voltage and current and with reduced generation of heat by electromigration of metal or silicide from a cathode (120) into the region of unsilicided semiconductor material to form an alloy having reduced bulk resistance. The cathode (120) and anode (110) are preferably shaped to control regions from which and to which material is electrically migrated After programming, additional electromigration of material can return the antifuse to a high resistance state. The process by which the antifuse is fabricated is completely compatible with fabrication of field effect transistors and the antifuse may be advantageously formed on isolation structures

Abstract translation: 具有包括非硅化半导体材料的区域（150）的链路（125）的反熔丝（100）可以以降低的电压和电流被编程，并且通过金属或硅化物从阴极（120）的电迁移到区域 的非硅化半导体材料以形成具有降低的体积电阻的合金。 阴极（120）和阳极（110）优选地被成形为控制从哪个材料和哪些材料电迁移的区域。在编程之后，材料的额外的电迁移可将反熔丝返回到高电阻状态。 反熔丝制造的过程与场效应晶体管的制造完全兼容，并且反熔丝可有利地形成在隔离结构上

公开(公告)号：WO2007027607A3

公开(公告)日：2007-08-16

申请号：PCT/US2006033536

申请日：2006-08-30

Applicant: IBM ,  FREDEMAN GREGORY J ,  KIRIHATA TOSHIAKI ,  LESLIE ALAN J ,  SAFRAN JOHN M

Inventor： FREDEMAN GREGORY J ,  KIRIHATA TOSHIAKI ,  LESLIE ALAN J ,  SAFRAN JOHN M

IPC: G11C17/00 ,  G11C7/00 ,  G11C7/02

CPC classification number: G11C17/16 ,  G11C17/165 ,  G11C29/027

Abstract: A one-time-programmable-read-only-memory (OTPROM) is implemented in a two-dimensional array of aggressively scaled silicide migratable e-fuse. Word line (WL) selection is performed by decoding logic (140) at Vdd while the bit line drive is switched between Vdd and a higher voltage, Vp, for programming. The OTPROM is thus compatible with and can be integrated with other technologies without a cost adder and supports optimization of the high current patch for minimal voltage drop during fuse programming. A differential sense amplifier (120) with a programmable reference (130) is used for improved sense margins and can support an entire bit line rather than sense amplifiers (120) being provided for individual fuses.

Abstract translation: 一次性可编程只读存储器（OTPROM）在二维阵列的大规模硅化物可迁移电子保险丝中实现。 通过在Vdd处的解码逻辑（140）来执行字线（WL）选择，同时位线驱动在Vdd和较高电压Vp之间切换用于编程。 因此，OTPROM与其他技术兼容，并且可以与其他技术集成而无需成本加法器，并支持在熔丝编程期间最小化电压降的高电流补丁的优化。 具有可编程参考（130）的差分读出放大器（120）用于改善感测余量，并且可以支持整个位线，而不是为各个保险丝提供感测放大器（120）。

公开(公告)号：WO2009140052A3

公开(公告)日：2010-01-21

申请号：PCT/US2009041861

申请日：2009-04-28

Applicant: IBM ,  ESHUN EBENEZER E ,  HE ZHONG-XIANG ,  RASSEL ROBERT M ,  COOLBAUGH DOUGLAS ,  GEBRESELASIE EPHREM G ,  WANG PING-CHUAN ,  KIM DEOK-KEE ,  KOTHANDARAMAN CHANDRASEKHARAN ,  ROBSON NORMAN W ,  MOY DAN ,  SAFRAN JOHN M ,  STEIN KENNETH J ,  HO HERBERT L ,  YAN HONGWEN

Inventor： ESHUN EBENEZER E ,  HE ZHONG-XIANG ,  RASSEL ROBERT M ,  COOLBAUGH DOUGLAS ,  GEBRESELASIE EPHREM G ,  WANG PING-CHUAN ,  KIM DEOK-KEE ,  KOTHANDARAMAN CHANDRASEKHARAN ,  ROBSON NORMAN W ,  MOY DAN ,  SAFRAN JOHN M ,  STEIN KENNETH J ,  HO HERBERT L ,  YAN HONGWEN

IPC: H01L21/335

CPC classification number: H01L27/0629 ,  H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.

Abstract translation: 半导体结构和半导体结构的制造方法提供一种场效应器件，其位于和形成在半导体衬底的有源区上，并且至少一个熔丝结构，抗熔丝结构和电阻结构中的至少一个至少位于并形成 部分地同时地在与半导体衬底内的有源区域横向分离的隔离区域上。 场效应器件包括包括高介电常数介电材料的栅极电介质和包括金属材料的栅电极。 熔丝结构，反熔丝结构和电阻器结构中的至少一个包括包括与栅极电介质相同的材料的焊盘电介质，以及可选地还包括熔断器，反熔丝或电阻器，其可以包括与所述栅极电介质相同的金属材料 栅电极。