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    LATERAL PIN DIODE AND METHOD FOR PRODUCING THE SAME
    1.
    发明申请
    LATERAL PIN DIODE AND METHOD FOR PRODUCING THE SAME 审中-公开
    横向PIN二极管和方法生产同样

    公开(公告)号：WO02101837A3

    公开(公告)日：2003-05-01

    申请号：PCT/EP0206018

    申请日：2002-05-31

    Applicant: INFINEON TECHNOLOGIES AG ,  PEICHL RAIMUND ,  SENG PHILIPP

    Inventor： PEICHL RAIMUND ,  SENG PHILIPP

    IPC: H01L29/868 ,  H01L21/329

    CPC classification number: H01L29/868

    Abstract: The invention relates to a PIN diode (10) comprising a first p region (16) on a first surface (12) of a substrate (14), an n region (18) on the first surface (12) of the substrate (14), and an intermediate region (20) on the first surface (12) of the substrate (14) between the p region (16) and the n region (18). A dopant concentration of the intermediate region (20) is lower than a dopant concentration of the p region (16) and lower than a dopant concentration of the n region (18). Said PIN diode also comprises a first electroconductive component (26) which is arranged on one of the sides of the p region, opposite the intermediate region (20), and a second electroconductive component (28) which is arranged on one of the sides of the n region (18), opposite the intermediate region (20). Preferably, the PIN diode (10) is separated from the substrate (14) by an insulating layer (22), is covered on its surface opposite the substrate (14) by another insulating layer (24), and is laterally surrounded by a trench (34) which is filled with an insulating material, in such a way that it is essentially fully encapsulated in an insulated manner.

    Abstract translation: 的PIN二极管（10）包括在所述基板（14）的第一表面（12）上的基板（14），正区域（18）的第一表面（12）的第一p型区域（16）和一个 p-区（16）和n型区域（18）之间的衬底（14）的第一表面（12），其中，所述中间区域（20）的掺杂浓度比所述p型区域的掺杂浓度低于中间区域（20） （16）和比所述n型区域（18）的掺杂浓度低。 此外，PIN二极管包括固定到中的一个的第一导电构件（26），被布置为从该中间区域中的一个（20）的面向远离所述p-区（16）的一侧，和第二导电构件（28） 从中间区域（20）背向所述n型区域（18）的侧布置。 PIN二极管（10）是最好由另一绝缘层（24）通过绝缘层（22），从基板背对（14）表面分离的衬底（14）的覆盖，并从一个侧向绝缘用 材料填充的沟槽（34）所环绕，使得它基本上被完全绝缘封装。

    VARAKTORDIODE, ELEKTRISCHES BAUELEMENT UND HERSTELLUNGSVERFAHREN
    2.
    发明专利
    VARAKTORDIODE, ELEKTRISCHES BAUELEMENT UND HERSTELLUNGSVERFAHREN 未知

    公开(公告)号：DE102013222224A1

    公开(公告)日：2014-05-08

    申请号：DE102013222224

    申请日：2013-10-31

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BETTINESCHI GABRIELE ,  PEICHL RAIMUND ,  DIETL JOSEF

    IPC: H01L29/93 ,  H01L21/328 ,  H01L29/06

    Abstract: Ein elektrisches Bauelement enthält ein Halbleitermaterial. Das Halbleitermaterial enthält ein erstes Gebiet des Halbleitermaterials, das einen ersten Leitungstyp aufweist, ein zweites Gebiet des Halbleitermaterials, das einen zweiten Leitungstyp aufweist, der komplementär zum ersten Leitungstyp ist, und ein Zwischengebiet des Halbleitermaterials zwischen dem ersten Gebiet und dem zweiten Gebiet. Das erste und das zweite Gebiet liegen über das Zwischengebiet einander benachbart, um so eine Diodenstruktur zu bilden. Eine Form des Zwischengebiets verjüngt sich vom ersten Gebiet zum zweiten Gebiet.

    7.
    发明专利
    未知

    公开(公告)号：DE10330838B4

    公开(公告)日：2005-08-25

    申请号：DE10330838

    申请日：2003-07-08

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： AHRENS CARSTEN ,  POMPL STEFAN ,  BARTL ULF ,  WERTHMANN HUBERT ,  HARTUNG WOLFGANG ,  PEICHL RAIMUND ,  EISENER BERND ,  HERZUM CHRISTIAN

    IPC: H01L21/329 ,  H01L29/417 ,  H01L29/872

    Abstract: An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer including a guard ring in those areas of the surface and of the active layer which are adjacent to the insulating layer, and a contacting layer arranged on an area of the active layer, the contact layer being adjacent to an area of the guard ring. The device may be produced by a process of three-fold self-alignment, to be precise utilizing a spacer process by means of which a diffusion source having a lateral extension far below the lithography limit is made possible.

    8.
    发明专利
    未知

    公开(公告)号：DE10330838A1

    公开(公告)日：2005-02-10

    申请号：DE10330838

    申请日：2003-07-08

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： AHRENS CARSTEN ,  POMPL STEFAN ,  BARTL ULF ,  WERTHMANN HUBERT ,  HARTUNG WOLFGANG ,  PEICHL RAIMUND ,  EISENER BERND ,  HERZUM CHRISTIAN

    IPC: H01L21/329 ,  H01L29/417 ,  H01L29/872

    Abstract: An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer including a guard ring in those areas of the surface and of the active layer which are adjacent to the insulating layer, and a contacting layer arranged on an area of the active layer, the contact layer being adjacent to an area of the guard ring. The device may be produced by a process of three-fold self-alignment, to be precise utilizing a spacer process by means of which a diffusion source having a lateral extension far below the lithography limit is made possible.

    9.
    发明专利
    未知

    公开(公告)号：DE50111852D1

    公开(公告)日：2007-02-22

    申请号：DE50111852

    申请日：2001-04-04

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： LOSEHAND REINHARD ,  PEICHL RAIMUND ,  ZIMMERMANN WALTER

    IPC: H01P1/15 ,  H03H5/12 ,  H03B5/08 ,  H03B5/12 ,  H03H5/00 ,  H03M1/00 ,  H03M1/78

    Abstract: The integrated component has an oscillation circuit with a capacitance value determined via a tuning diode, a second compensation diode used for compensating the deviation in the resonance frequency of the oscillation circuit, resulting from the manufacturing tolerances. The compensation diode is controlled by a compensation voltage obtained from a reference voltage via a D/A converter (12) in dependence on a digital value held in a memory (17).

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