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公开(公告)号：US10039192B1
公开(公告)日：2018-07-31
申请号：US15703174
申请日：2017-09-13
Applicant: WIESON TECHNOLOGIES CO., LTD.
Inventor： Qiang-Long Hu , Wen-Sheng Liu
CPC classification number: H05K1/189 , H01R12/59 , H01R12/61 , H01R12/778 , H01R13/6461 , H05K1/117 , H05K1/147 , H05K1/148 , H05K3/3447 , H05K3/3457 , H05K3/363 , H05K3/366 , H05K3/368 , H05K2201/09327 , H05K2201/10189 , H05K2201/2009
Abstract: The present disclosure illustrates an ultra-thin dual-channel flexible circuit bridge connector including a dual-channel flexible circuit board, a first connection interface and a second connection interface. The dual-channel flexible circuit board includes, in a sequential order, a first insulating layer, a first circuit layer, a second insulating layer, a ground layer, a third insulating layer, a second circuit layer and a fourth insulating layer. The first connection interface and the second connection interface can be used to link two extend interface cards spaced apart by various distances, thereby forming a bridge status. The ground layer between the first circuit layer and the second circuit layer can be served as a common reference plane for dual-channel high frequency signal transmission and provide shielding and isolating effect, so as to satisfy the requirement for working bandwidth to satisfy the requirement for characteristic impedance, reduce skin effect, reduce EMI and crosstalk interference.
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公开(公告)号：US20180014373A1
公开(公告)日：2018-01-11
申请号：US15587567
申请日：2017-05-05
Applicant: Lumileds LLC
Inventor： Zhihua Song , Wouter Soer , Ron Bonne , Yifeng Qiu
CPC classification number: H05B33/0845 , H01L25/167 , H01L25/50 , H01R13/6591 , H05B33/0809 , H05B33/0815 , H05B33/0884 , H05B33/0887 , H05K1/0203 , H05K1/0215 , H05K1/0224 , H05K1/024 , H05K1/0243 , H05K1/0251 , H05K1/0262 , H05K1/053 , H05K1/056 , H05K1/111 , H05K1/115 , H05K1/181 , H05K3/0061 , H05K3/107 , H05K3/146 , H05K3/16 , H05K3/181 , H05K3/303 , H05K3/4076 , H05K3/44 , H05K3/4608 , H05K3/4644 , H05K3/465 , H05K3/4661 , H05K3/467 , H05K3/4679 , H05K3/4688 , H05K9/0084 , H05K9/0088 , H05K13/00 , H05K2201/066 , H05K2201/0723 , H05K2201/093 , H05K2201/09327 , H05K2201/09563 , H05K2201/10106 , H05K2201/10166 , H05K2201/10522
Abstract: A multi-layer metal core printed circuit board (MCPCB) has mounted on it at least one or more heat-generating LEDs and one or more devices configured to provide current to the one or more LEDs. The one or more devices may include a device that carries a steep slope voltage waveform. Since there is typically a very thin dielectric between the patterned copper layer and the metal substrate, the steep slope voltage waveform may produce a current in the metal substrate due to AC coupling via parasitic capacitance. This AC-coupled current may produce electromagnetic interference (EMI). To reduce the EMI, a local shielding area may be formed between the metal substrate and the device carrying the steep slope voltage waveform. The local shielding area may be conductive and may be electrically connected, to a DC voltage node adjacent to the one or more devices.
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公开(公告)号：US20170118844A1
公开(公告)日：2017-04-27
申请号：US15175378
申请日：2016-06-07
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Bruce J. CHAMBERLIN , Andreas HUBER , Harald HUELS , Thomas STRACH , Thomas-Michael WINKEL
CPC classification number: H05K1/184 , B23K1/0016 , H05K1/0298 , H05K1/092 , H05K1/111 , H05K1/113 , H05K1/116 , H05K1/162 , H05K1/165 , H05K1/167 , H05K1/185 , H05K1/186 , H05K3/0047 , H05K3/3447 , H05K3/429 , H05K3/46 , H05K3/4644 , H05K3/4697 , H05K2201/093 , H05K2201/09309 , H05K2201/09327 , H05K2201/09345 , H05K2201/09381 , H05K2201/09518 , H05K2201/09545 , H05K2201/096 , H05K2201/09845 , H05K2201/10 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/1006 , H05K2201/10174
Abstract: Embedding a discrete electrical device in a printed circuit board (PCB) includes: providing a vertical via as a blind hole from a horizontal surface of the PCB to an electrically conductive structure in a first layer, the first layer being one layer of a first core section of a plurality of core sections vertically arranged above each other, each core section including lower and upper conductive layers, and a non-conductive layer in between; inserting the electrical device into the via, with the device extending within at least two of the core sections; establishing a first electrical connection between a first electrical device contact device and the electrically conductive structure in the first layer; and establishing a second electrical connection between a second electrical device contact and a second layer, the second layer being one of the electrically conductive layers of a second horizontal core section.
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104.发明申请公开(公告)号：US20170034913A1
公开(公告)日：2017-02-02
申请号：US14811325
申请日：2015-07-28
Applicant: Infineon Technologies AG
Inventor： Qianli Mu , Cristian Gozzi , Michael Simcoe , Guillaume Bigny
CPC classification number: H05K1/181 , H01L23/142 , H01L23/64 , H01L2224/49175 , H05K1/025 , H05K1/0298 , H05K1/111 , H05K1/115 , H05K1/144 , H05K1/182 , H05K3/421 , H05K3/429 , H05K2201/09236 , H05K2201/09327 , H05K2201/09336 , H05K2201/09481 , H05K2201/0959 , H05K2201/10166 , H05K2203/049
Abstract: A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.
Abstract translation: 半导体封装包括金属基板，具有附接到基板的参考端子的半导体管芯和远离基板的RF端子，以及多层电路板，其具有附接到基板的第一侧和远离基板的第二侧 底盘。 多层电路板包括多个交错信号和接地层。 信号层中的一个位于多层电路板的第二侧并电连接到半导体管芯的RF端子。 其中一个接地层位于多层电路板的第一侧并附着在金属底板上。 功率分配结构形成在多层电路板的第二侧的信号层中。 RF匹配结构形成在与功率分配结构不同的信号层中。
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公开(公告)号：US20160286639A1
公开(公告)日：2016-09-29
申请号：US15037266
申请日：2014-10-21
Applicant: ZF FRIEDRICHSHAFEN AG
Inventor： Wilfried LASSMANN , Michael SPERBER
IPC: H05K1/02 , H01L23/552 , H05K1/09 , H01L23/498
CPC classification number: H05K1/0265 , H01L23/49822 , H01L23/552 , H01L25/16 , H01L2924/0002 , H05K1/0218 , H05K1/0263 , H05K1/0298 , H05K1/09 , H05K2201/0723 , H05K2201/09254 , H05K2201/09327 , H05K2201/09736 , H05K2201/10053 , H05K2201/10166 , H01L2924/00
Abstract: A multi-functional high current circuit board comprises a current conduction layer having several strata for conduction of electric current, a switching layer comprising at least one power circuit breaker for switching an electric load, a control layer comprising at least one control element to control the at least one power circuit breaker, at least one shielding element for shielding the current conduction layer from the control layer and from the switching layer.
Abstract translation: 多功能高电流电路板包括具有用于传导电流的多个层的导电层，包括用于切换电负载的至少一个电源断路器的开关层，包括至少一个控制元件的控制层，以控制 至少一个电源断路器，用于屏蔽电流传导层与控制层和开关层的至少一个屏蔽元件。
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Patent Agency Ranking
公开(公告)号：US20150216033A1
公开(公告)日：2015-07-30
申请号：US14489555
申请日：2014-09-18
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiromichi KITAJIMA
CPC classification number: H05K1/0216 , H01P3/16 , H04M1/026 , H05K1/0218 , H05K1/024 , H05K1/0242 , H05K1/0243 , H05K1/181 , H05K2201/09327
Abstract: A high frequency module includes a ground mounting electrode connected to a ground terminal of a component, a first ground in-plane conductor in a multilayer substrate on a portion under the component and connected to the ground mounting electrode with a first ground interlayer connecting conductor, a signal mounting electrode connected to a signal terminal of the component, and a signal in-plane conductor provided in the multilayer substrate on a portion under the first ground in-plane conductor and connected to the specific signal mounting electrode with a signal interlayer connecting conductor. The first ground in-plane conductor is between the component and the signal in-plane conductor, and the signal interlayer connecting conductor is on an outer side portion of the first ground in-plane conductor when seen from above.
Abstract translation: 高频模块包括连接到部件的接地端子的接地安装电极，在部件下方的多个基板中的第一接地面内导体，并且与第一接地层间连接导体连接到接地安装电极， 连接到部件的信号端子的信号安装电极，以及设置在第一接地面内导体下的部分上的多层基板中的信号面内导体，并且与信号层间连接导体连接到特定信号安装电极 。 第一接地面内导体位于组件和信号面内导体之间，并且当从上方观察时，信号层间连接导体位于第一接地面内导体的外侧部分。
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107.发明申请MILLIMETER-WAVE BROADBAND TRANSITION OF MICROSTRIP LINE ON THIN TO THICK SUBSTRATES 审中-公开微米级波导宽带传输薄膜到厚基板公开(公告)号：US20150097634A1
公开(公告)日：2015-04-09
申请号：US14048742
申请日：2013-10-08
Applicant: BLACKBERRY LIMITED
Inventor： Nasser Ghassemi , Houssam Kanj , Christopher Andrew DeVries , Huanhuan Gu
CPC classification number: H01P5/028 , H01Q1/48 , H01Q13/206 , H05K1/024 , H05K1/0253 , H05K2201/0191 , H05K2201/09327 , H05K2201/09618 , H05K2201/09672 , H05K2201/10098 , Y10T29/49018
Abstract: Embodiments are directed to a structure comprising: a first substrate section having a first thickness, a second substrate section having a second thickness different from the first thickness, a plurality of vias configured to couple a first ground plane associated with the first substrate section and a second ground plane associated with the second substrate section, and a microstrip comprising: a first section associated with the first substrate section and having a first width, a second section associated with the second substrate section and having a second width different from the first width, and a taper between the first width and the second width.
Abstract translation: 实施例涉及一种结构，包括：具有第一厚度的第一基板部分，具有不同于第一厚度的第二厚度的第二基板部分，多个通孔，其被配置为将与第一基板部分相关联的第一接地平面和 与第二基板部分相关联的第二接地平面，以及微带，包括：与第一基板部分相关联并具有第一宽度的第一部分，与第二基板部分相关联并具有与第一宽度不同的第二宽度的第二部分， 以及第一宽度和第二宽度之间的锥度。
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公开(公告)号：US20140301125A1
公开(公告)日：2014-10-09
申请号：US14229483
申请日：2014-03-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： CHIL-NAM YOON , SEON-RYEONG KANG , HUI-CHONG SHIN
IPC: G11C5/06 , H05K1/11 , G11C11/401
CPC classification number: G11C5/06 , G11C7/109 , G11C11/4093 , G11C2207/105 , H05K1/0225 , H05K1/0253 , H05K2201/09327 , H05K2201/10159
Abstract: A memory module includes a plurality of semiconductor memory devices and a circuit board. The circuit board is electrically connected to the plurality of semiconductor memory devices, and a signal line is disposed in the outermost layer of the circuit board. An electrical reference for the signal line is provided in a layer of the circuit board that is not adjacent to the outermost layer. Accordingly, an impedance of the signal line may be increased, and signal integrity of a signal transmitted through the signal line may be improved.
Abstract translation: 存储器模块包括多个半导体存储器件和电路板。 电路板电连接到多个半导体存储器件，信号线设置在电路板的最外层中。 在不与最外层相邻的电路板的层中提供用于信号线的电参考。 因此，可以增加信号线的阻抗，并且可以提高通过信号线传输的信号的信号完整性。
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公开(公告)号：US20140176254A1
公开(公告)日：2014-06-26
申请号：US14191595
申请日：2014-02-27
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor： Kanto IIDA , Shigeru TAGO
CPC classification number: H01P3/08 , H03H7/38 , H05K1/0225 , H05K1/0253 , H05K2201/09327 , H05K2201/09618 , H05K2201/09672 , H05K2201/09727
Abstract: A high-frequency signal transmission line includes a dielectric body including a plurality of dielectric sheets. A signal line is provided in the dielectric body. A connector is mounted on a first main surface of the dielectric body and electrically connected to the signal line. A ground conductor is provided on a second main surface side of the dielectric body, compared with the signal line, and faces the signal line across the dielectric sheet. In the ground conductor, conductor-missing portions are provided in which no conductors are provided in at least portions of regions overlapping with the signal line in planar in connection portions. Adjustment conductors are provided in the second main surface of the dielectric body, and overlap with at least portions of the conductor-missing portions in the planar view.
Abstract translation: 高频信号传输线包括包括多个电介质片的电介体。 信号线设置在电介质体中。 连接器安装在电介质体的第一主表面上并电连接到信号线。 与信号线相比，在电介质体的第二主表面侧设置接地导体，并且面对跨越电介质片的信号线。 在接地导体中，提供导体缺失部分，其中在与连接部分中平面的信号线重叠的区域的至少部分中不设置导体。 调整导体设置在电介质体的第二主表面中，并且在俯视图中与导体缺失部分的至少一部分重叠。
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公开(公告)号：US20130228366A1
公开(公告)日：2013-09-05
申请号：US13410311
申请日：2012-03-02
Applicant: Fuk Ming LAM
Inventor： Fuk Ming LAM
IPC: H05K1/16
CPC classification number: H05K1/0245 , H05K1/0251 , H05K1/114 , H05K2201/09327
Abstract: A printed circuit board includes a first conductive layer that includes a first transmission line portion and two soldering pads, a first insulating layer disposed under the first conductive layer, a fourth conductive layer disposed under the first insulating layer and including a second transmission line portion, two through-hole vias respectively disposed across the first insulating layer, and two capacitors respectively connecting the first transmission line portion and the two soldering pads. The two through-hole vias are directly connected with the two soldering pads and extending the connection to the second transmission line portion respectively.
Abstract translation: 印刷电路板包括第一导电层，其包括第一传输线部分和两个焊盘，设置在第一导电层下的第一绝缘层，设置在第一绝缘层下方并包括第二传输线部分的第四导电层， 分别设置在第一绝缘层两侧的两个通孔通孔和分别连接第一传输线部分和两个焊盘的两个电容器。 两个通孔通孔与两个焊盘直接连接，并将连接分别延伸到第二传输线部分。
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