公开(公告)号：US20030221314A1

公开(公告)日：2003-12-04

申请号：US10358219

申请日：2003-02-05

Applicant: NITTO DENKO CORPORATION

Inventor： Toshiki Naito ,  Yoshifumi Shinogi ,  Daisuke Uenda

IPC: H05K003/10

CPC classification number: H05K1/0265 ,  H05K3/064 ,  H05K3/108 ,  H05K3/388 ,  H05K3/421 ,  H05K3/426 ,  H05K3/427 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0574 ,  H05K2203/0577 ,  H05K2203/1394 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T428/24917

Abstract: A method for manufacturing a double-sided circuit board from a board material having a first electric conductor layer and a first electrically insulating layer, including the steps of: making conduction holes in the board material so as to penetrate only the first electrically insulating layer or both the first electrically insulating layer and the first electric conductor layer; forming an electrically conductive thin-film layer on a surface of the first electrically insulating layer and wall surfaces of the conduction holes; forming a second electrically insulating layer on the electrically conductive thin-film layer; forming a first electric conductor wiring by electroplating on predetermined portions of the electrically conductive thin-film layer; covering the first electric conductor wiring with a chemical-resistant film; forming a second electric conductor wiring by chemically dissolving a predetermined portion of another surface of the first electric conductor layer; and removing the second electrically insulating layer and the film.

Abstract translation: 一种从具有第一导电体层和第一电绝缘层的基板材料制造双面电路板的方法，包括以下步骤：在基板材料中形成导电孔，以仅穿透第一电绝缘层或 第一电绝缘层和第一导电体层; 在第一电绝缘层的表面和导电孔的壁表面上形成导电薄膜层; 在所述导电薄膜层上形成第二电绝缘层; 通过电镀在导电薄膜层的预定部分上形成第一导电体布线; 用耐化学性膜覆盖第一导电线; 通过化学溶解所述第一导电体层的另一个表面的预定部分来形成第二导电体布线; 以及去除所述第二电绝缘层和所述膜。

公开(公告)号：US06641898B2

公开(公告)日：2003-11-04

申请号：US10024470

申请日：2001-12-21

Applicant: Yoshitaro Yazaki ,  Yoshihiko Shiraishi ,  Koji Kondo ,  Toshikazu Harada ,  Tomohiro Yokochi

Inventor： Yoshitaro Yazaki ,  Yoshihiko Shiraishi ,  Koji Kondo ,  Toshikazu Harada ,  Tomohiro Yokochi

IPC: B32B300

CPC classification number: H05K3/4632 ,  H05K1/095 ,  H05K3/4069 ,  H05K3/4617 ,  H05K2201/0129 ,  H05K2201/0272 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0425 ,  H05K2203/1131 ,  Y10T428/24917

Abstract: A heated and pressed printed wiring board is made by filling via holes formed in layers of insulating film of the wiring board with an interlayer conducting material. The insulating film is stacked with conductor patterns, and each conductor pattern closes a via hole. The interlayer conducting material forms a solid conducting material in the via holes after a heating a pressing procedure. The solid conducting material includes two types of conducting materials. The first type of conducting material includes a metal, and the second type of conductive material includes an alloy formed by the metal and conductor metal of the conductor patterns. The conductor patterns are electrically connected reliably without relying on mere mechanical contact.

公开(公告)号：US06640429B2

公开(公告)日：2003-11-04

申请号：US10074899

申请日：2002-02-12

Applicant: Masayuki Sasaki

Inventor： Masayuki Sasaki

IPC: H05K336

CPC classification number: H05K1/162 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/002 ,  H05K3/4644 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/0394 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49156 ,  H01L2924/00

Abstract: A multi-layer circuit board comprises: an insulating layer having upper and lower surfaces thereof, and wiring patterns arranged on the upper and lower surfaces of the insulating layer. A ferroelectric layer has a dielectric constant larger than that of the insulating layer and has upper and lower surfaces. The ferroelectric layer is arranged in the insulating layer in such a manner that the upper and lower surfaces of the ferroelectric layer coincide with the upper and lower surfaces of the insulating layer, respectively. A pair of electrode films are formed on the upper and lower surfaces of the ferroelectric layer, respectively, to define a capacitor incorporated in the multi-layer circuit board.

Abstract translation: 多层电路板包括：具有上表面和下表面的绝缘层和布置在绝缘层的上表面和下表面上的布线图案。 铁电层的介电常数大于绝缘层的介电常数，并具有上表面和下表面。 铁电层以绝缘层的上表面和下表面分别与铁电层的上表面和下表面一致的方式设置在绝缘层中。 分别在铁电层的上表面和下表面上形成一对电极膜，以限定并入多层电路板中的电容器。

公开(公告)号：US06636281B1

公开(公告)日：2003-10-21

申请号：US09613476

申请日：2000-07-11

Applicant: Tsutomu Kanatsu

Inventor： Tsutomu Kanatsu

IPC: G02F11333

CPC classification number: H05K1/028 ,  G02F1/13452 ,  H05K1/147 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/10681

Abstract: In a flat panel display device, in which a display panel 1 loosely fitted on a main surface of a chassis 4 and circuit substrates held in hook portions provided on side surfaces of the chassis are connected each other through TCP's by bending the latter TCP's, and a method for manufacturing the same device, a main slit for a rounded portion of each TCP is formed in a rounded portion of the TCP and an auxiliary sub slit is also formed adjacent to the main slit. In order to reduce the peeling force exerted on connecting/fixing portions between the TCP's and the display panel, the circuit substrate is pulled up by bending the main and sub slits and then returning the sub slit to a flat state to insert the circuit substrate into the hook portions.

Abstract translation: 在平板显示装置中，其中松散地装配在底盘4的主表面上的显示面板1和保持在设置在底盘的侧表面上的钩部中的电路基板通过TCP相互连接，通过弯曲后者TCP，并且 制造同一装置的方法中，每个TCP的圆形部分的主狭缝形成在TCP的圆形部分中，辅助副狭缝也形成在与主狭缝相邻的位置。 为了减少施加在TCP和显示面板之间的连接/固定部分上的剥离力，通过弯曲主和副狭缝将电路基板拉起，然后将副狭缝返回到平坦状态以将电路基板插入 钩部。

公开(公告)号：US20030178713A1

公开(公告)日：2003-09-25

申请号：US10348478

申请日：2003-01-21

Inventor： Akira Chinda ,  Akira Matsuura ,  Takayuki Yoshiwa ,  Mamoru Mita ,  Takashi Kageyama ,  Katsutoshi Taga

IPC: H01L023/02

CPC classification number: H05K3/403 ,  H01L2924/0002 ,  H01L2924/19107 ,  H05K3/0052 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/423 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2203/0733 ,  H01L2924/00

Abstract: A wiring board which can realize a small and thin passive component such as solid condenser, resistor, coil, transistor or so on is provided. A wiring board which forms an electronic component by mounting a passive element, comprising an insulating board provided with an opening having predetermined pattern, a wiring formed with predetermined pattern on said insulating board, and an external terminal filled to said opening, connected with said wiring by said filling, and exposed to a bottom of said insulating board where said wiring is formed.

Abstract translation: 本发明提供可实现固体冷凝器，电阻器，线圈，晶体管等小而薄的无源部件的布线基板。 一种通过安装无源元件形成电子部件的布线板，包括设置有具有预定图案的开口的绝缘板，在所述绝缘板上形成有预定图案的布线，以及填充到所述开口的外部端子，与所述布线连接 通过所述填充，并暴露于所述绝缘板的形成所述布线的底部。

公开(公告)号：US06619786B2

公开(公告)日：2003-09-16

申请号：US09876909

申请日：2001-06-08

Applicant: Brian Lee Cobb ,  Jeffrey Louis Sangalli

Inventor： Brian Lee Cobb ,  Jeffrey Louis Sangalli

IPC: B41J214

CPC classification number: B41J2/1753 ,  B41J2/14072 ,  H05K1/0269 ,  H05K1/182 ,  H05K3/28 ,  H05K3/328 ,  H05K3/3494 ,  H05K3/361 ,  H05K2201/0394 ,  H05K2201/09918 ,  H05K2201/10681 ,  H05K2203/0195 ,  H05K2203/166 ,  Y10T29/49144 ,  Y10T29/49401

Abstract: An improved TAB circuit is provided for use with ink jet printer cartridges, which carries electrical signals to an array of nozzles on a heater chip. The TAB circuit eliminates bent or broken electrical circuit traces before being bonded to the heater chip by creating a chip window that partially overlaps the edges of the heater chip, and by bringing the electrical circuit traces to the chip window and terminating these circuit traces at a PI (polyimide) edge, which defines the inner perimeter of the chip window. The circuit traces thus are not unsupported at their ends before being assembled to the heater chip, and are automatically correctly positioned to make contact with bond pads of the heater chip when the overall TAB circuit is in correct registration therewith. The TAB circuit also provides an improved tolerance for a covercoat placement that will tend to prevent corrosive ink from coming into contact with these metal traces. The chip window of the TAB circuit also allows for a separate nozzle plate to be assembled to the heater chip.

公开(公告)号：US06613599B2

公开(公告)日：2003-09-02

申请号：US09901480

申请日：2001-07-09

Applicant: Chiaki Imaeda

Inventor： Chiaki Imaeda

IPC: H01L2100

CPC classification number: H05K3/363 ,  G02F1/1333 ,  G02F1/13452 ,  H05K1/189 ,  H05K3/0058 ,  H05K3/3463 ,  H05K3/3494 ,  H05K3/4084 ,  H05K2201/0394 ,  H05K2201/062 ,  H05K2201/10477 ,  H05K2201/10681 ,  H05K2203/0195

Abstract: A method of manufacturing an electro-optical device is provided. The device includes an electro-optical panel, a first wiring substrate mounted to the electro-optical panel, a second wiring substrate connected to the first wiring substrate, and a frame arranged between the electro-optical panel and the second wiring substrate. The method comprises arranging a heat insulating layer between a connection region where the first wiring substrate is connected to the second wiring substrate and the frame, arranging a light; diffusing layer between the heat insulating layer and the frame, and applying heat to the connection region to conductively connect the first wiring substrate to the second wiring substrate.

Abstract translation: 提供一种制造电光装置的方法。 该装置包括电光面板，安装到电光面板的第一布线基板，连接到第一布线基板的第二布线基板和布置在电光面板和第二布线基板之间的框架。 该方法包括在第一布线基板与第二布线基板连接的连接区域和框架之间布置隔热层，布置光; 所述隔热层与所述框架之间的扩散层，并且向所述连接区域施加热量以将所述第一布线基板导电连接到所述第二布线基板。

公开(公告)号：US06612025B1

公开(公告)日：2003-09-02

申请号：US09656043

申请日：2000-09-06

Applicant: Zhong-You (Joe) Shi ,  Lakhi N. Goenka ,  Andrew Z. Glevatsky

Inventor： Zhong-You (Joe) Shi ,  Lakhi N. Goenka ,  Andrew Z. Glevatsky

IPC: H05K334

CPC classification number: H05K3/4038 ,  H05K3/062 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/0305 ,  H05K2201/0361 ,  H05K2201/0373 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09581 ,  H05K2203/1438 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49167

Abstract: A method for forming connections within a multi-layer electronic circuit board 10. The method includes forming an aperture within the circuit board and selectively coating the interior surface of the aperture with a polar solder mask material that is effective to bond with solder that is selectively inserted into the aperture, thereby retaining the solder within the aperture and improving the electrical connection provided by the solder.

Abstract translation: 一种用于在多层电子电路板10内形成连接的方法。该方法包括在电路板内形成孔，并用极性焊料掩模材料选择性地涂覆孔的内表面，极性焊料掩模材料有效地与选择性地焊接 插入到孔中，从而将焊料保持在孔内并改善由焊料提供的电连接。

公开(公告)号：US06603663B2

公开(公告)日：2003-08-05

申请号：US09960312

申请日：2001-09-24

Applicant: Matthias Burkhardt

Inventor： Matthias Burkhardt

IPC: H05K114

CPC classification number: H05B41/02 ,  H01L23/5384 ,  H01L2924/0002 ,  H05B41/282 ,  H05K1/0268 ,  H05K3/202 ,  H05K2201/0394 ,  H05K2201/09118 ,  Y02B20/183 ,  H01L2924/00

Abstract: The invention relates to an electronic unit having a mounting board (4) and electronic components (1-3) mounted on it, with the mounting board (4) having metal webs (41) which are embedded in an electrically insulating material (40), the metal webs (41) having a first side (411), which is in the form of a contact surface for making contact with the electronic components (1-3) and having a second side (412) facing away from this. According to the invention, cutout(s) are arranged in the electrically insulating material (40), via which the second side (412) of each metal web (41) is accessible for a voltage or current measurement apparatus.

公开(公告)号：US20030141108A1

公开(公告)日：2003-07-31

申请号：US10358933

申请日：2003-02-05

Applicant: IBIDEN CO., Ltd.

Inventor： Ryo Enomoto ,  Yasuji Hiramatsu

IPC: H05K001/11

CPC classification number: H05K3/4617 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/382 ,  H05K3/386 ,  H05K3/423 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/035 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/0733 ,  H05K2203/1189 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: Holes (40a) are formed with a laser beam through an insulating substrate (40) on which a metallic layer (42) is formed and via holes (36a) are formed by filling up the holes (40a) with a metal (46). After the via holes (36a) are formed, a conductor circuit (32a) is formed by etching the metallic layer (42) and a single-sided circuit board (30A) is formed by forming projecting conductors (38a) on the surfaces of the via holes (36a). The projecting conductors (38a) on the circuit board (30A) are put on the conductor circuit (32b) of another single-sided circuit board (30B) with adhesive layers (50) composed of an uncured resin in-between and heated and pressed against the circuit (32b). The projecting conductors (38a) get in the uncured resin by pushing aside the resin and are electrically connected to the circuit (32b). Since single-sided circuit boards (30A, 30B, 30C, and 30D) can be inspected for defective parts before the boards (30A, 30B, 30C, and 30D) are laminated upon one another, only defectless single-sided circuit can be used in the step of lamination.

Abstract translation: 孔（40a）通过其上形成有金属层（42）的绝缘基板（40）形成有激光束，并且通过用金属（46）填充孔（40a）形成通孔（36a）。 在形成通孔（36a）之后，通过蚀刻金属层（42）形成导体电路（32a），并且通过在其表面上形成突出导体（38a）形成单面电路板（30A） 通孔（36a）。 电路板（30A）上的突出导体（38a）被放置在另一单面电路板（30B）的导体电路（32b）上，其中粘合剂层（50）由未固化的树脂构成，并被加热和压制 抵靠电路（32b）。 突出导体（38a）通过推开树脂并与电路（32b）电连接而进入未固化树脂。 由于在板（30A，30B，30C和30D）彼此层叠之前可以检查单面电路板（30A，30B，30C和30D）中的缺陷部件，因此仅可以使用无缺陷的单面电路 在层压步骤中。