公开(公告)号：US20060027909A1

公开(公告)日：2006-02-09

申请号：US11194391

申请日：2005-08-01

Applicant: Tomonaga Kobayashi

Inventor： Tomonaga Kobayashi

IPC: H01L23/48

CPC classification number: G02F1/13452 ,  H01L2924/0002 ,  H05K3/361 ,  H05K3/363 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/09481 ,  H05K2201/09845 ,  H01L2924/00

Abstract: A connecting substrate includes a first conductive member; an insulating layer; and a second conductive member, the first conductive member and the second conductive member facing each other via the insulating layer, in which wherein an end portion of either one of the first conductive member and the second conductive member extends past an end portion of the other conductive member and past an end portion of the insulating layer.

Abstract translation: 连接基板包括第一导电部件; 绝缘层; 以及第二导电构件，所述第一导电构件和所述第二导电构件经由所述绝缘层彼此面对，其中所述第一导电构件和所述第二导电构件中的任一个的端部延伸超过所述另一导电构件的端部 导电构件并经过绝缘层的端部。

公开(公告)号：US20050274544A1

公开(公告)日：2005-12-15

申请号：US10863998

申请日：2004-06-09

Applicant: Lloyd Cosman ,  Farid Aziz ,  Craig Twardy ,  Simon Shearman ,  Edmund Gillespie ,  Joan Wang ,  Michael Tabatchnik ,  Marko Nicolici ,  Robert McDonald

Inventor： Lloyd Cosman ,  Farid Aziz ,  Craig Twardy ,  Simon Shearman ,  Edmund Gillespie ,  Joan Wang ,  Michael Tabatchnik ,  Marko Nicolici ,  Robert McDonald

IPC: H05K1/09 ,  H05K1/11 ,  H05K3/00 ,  H05K3/32 ,  H05K3/42

CPC classification number: H05K1/115 ,  H05K3/0047 ,  H05K3/325 ,  H05K3/429 ,  H05K2201/0314 ,  H05K2201/09036 ,  H05K2201/09845 ,  H05K2201/10371 ,  H05K2203/0207 ,  H05K2203/0242

Abstract: A method of electrical isolation for printed circuit board gasketing is disclosed for enabling gasketing to overlay plated through holes without shorting out thereto. The method of electrical isolation for printed circuit board gasketing includes counterboring at a controlled width to a controlled depth those plated through holes underlying the gasketing. The method provides the advantage of being able to overlay gasketing on both surfaces of a printed circuit board mid-plane. The method of electrical isolation for printed circuit board gasketing is particularly useful for overcoming the additional material requirements and processing steps of electrical isolation known in the art.

Abstract translation: 公开了一种用于印刷电路板垫圈的电绝缘方法，用于使得垫圈能够覆盖电镀通孔而不会短路。 用于印刷电路板垫圈的电隔离方法包括在受控的宽度到受压深度的对置，这些电镀通过垫圈下方的孔。 该方法提供了能够在印刷电路板中平面的两个表面上覆盖衬垫的优点。 印刷电路板垫圈的电隔离方法对于克服本领域已知的附加材料要求和电隔离的处理步骤是特别有用的。

公开(公告)号：US06972379B2

公开(公告)日：2005-12-06

申请号：US09814486

申请日：2001-03-20

Applicant: Delin Li

Inventor： Delin Li

IPC: H05K3/00 ,  H05K3/06 ,  H05K3/40 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K3/4685 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method 10 for making a multi-layer electronic circuit board 110 having electroplated apertures 18, 20 which may be selectively and electrically isolated from electrically grounded member 12 and further having selectively formed air bridges and/or crossover members 50 which are structurally supported by material 54, and further having certain exposed connection surfaces 112, selectively and electrically connected to certain electrically conductive members 34, 42, and 44.

Abstract translation: 一种用于制造具有电镀孔18,20的多层电子电路板110的方法10，其可以与电接地构件12选择性地和电隔离，并且还具有结构上由材料支撑的选择性地形成的空气桥和/或交叉构件50 并且还具有某些暴露的连接表面112，其选择性地和电连接到某些导电构件34,42和44。

公开(公告)号：US20050252681A1

公开(公告)日：2005-11-17

申请号：US10844065

申请日：2004-05-12

Applicant: Ronnie Runyon ,  Joanna Berndt ,  Gary Oberlin

Inventor： Ronnie Runyon ,  Joanna Berndt ,  Gary Oberlin

IPC: H01L21/60 ,  H01L23/373 ,  H01L23/52 ,  H01L29/06 ,  H05K1/11 ,  H05K1/16 ,  H05K3/34

CPC classification number: H01L24/83 ,  H01L23/3735 ,  H01L24/32 ,  H01L29/0657 ,  H01L2224/27013 ,  H01L2224/32014 ,  H01L2224/32057 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/15747 ,  H05K1/111 ,  H05K3/341 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2201/10166 ,  H05K2201/10969 ,  Y02P70/613 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A microelectronic assembly includes a component attached to a substrate by a variable thickness solder joint. The solder joint comprises a first thickness adjacent the central region of the component and a second, relatively greater thickness adjacent the perimeter region of the component. The variable thickness solder joint may be used for attaching a power die to a metal heat sink on a printed circuit board, so that the relatively thin central portion promoted thermal dissipation to maintain the die within a desired operating temperature range, and the relatively thick perimeter region distributes thermally induced stresses to enhance joint strength and reduce fatigue cracking.

Abstract translation: 微电子组件包括通过可变厚度焊接点附接到衬底的部件。 焊接接头包括邻近部件的中心区域的第一厚度和邻近部件的周边区域的第二相对较大的厚度。 可变厚度焊接点可用于将功率管芯附接到印刷电路板上的金属散热器，使得相对较薄的中心部分促进散热以将管芯保持在期望的工作温度范围内，并且相对较厚的周长 区域分布热诱导应力以增强接头强度并减少疲劳开裂。

公开(公告)号：US20050244621A1

公开(公告)日：2005-11-03

申请号：US11117505

申请日：2005-04-29

Applicant: Kunio Arai ,  Haruo Akahoshi

Inventor： Kunio Arai ,  Haruo Akahoshi

IPC: B32B3/00 ,  H05K1/02 ,  H05K3/00 ,  H05K3/06 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K3/4679 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/06 ,  H05K3/062 ,  H05K3/421 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0112 ,  H05K2201/09845 ,  H05K2201/09918 ,  H05K2203/0315 ,  H05K2203/0346 ,  H05K2203/0554 ,  Y10T428/24917

Abstract: The invention is to provide a printed circuit board in which advance of packaging density of the printed circuit board and reduction in production cost can be attained while processing quality can be made uniform, a method for processing the printed circuit board and a method for producing the printed circuit board. There is provided a printed circuit board including an alternate laminate of electric conductor layers and electrically insulating layers, wherein a coating layer capable of absorbing laser light but insoluble in an etching solution dissolving the electric conductor layers is provided on a front surface of a first one of the electric conductor layers. In this case, the coating layer may be provided on a front surface of a rear one of the electric conductor layers. Each of the electric conductor layers may contain Cu as a main component while the coating layer may contain CuO as a main component. The coating layer may have a thickness not thinner than 0.6 μm.

Abstract translation: 本发明提供一种印刷电路板，其中能够使加工质量均匀的印刷电路板的封装密度的提高和生产成本的降低，印刷电路板的处理方法和制造方法 印刷电路板。 提供了一种印刷电路板，其包括导电层和电绝缘层的交替叠层，其中在第一个的前表面上设置有能够吸收激光但不溶于溶解导电层的蚀刻溶液的涂层 的导电层。 在这种情况下，涂层可以设置在后导体层的前表面上。 每个导电体层可以包含Cu作为主要成分，而涂层可以包含CuO作为主要成分。 涂层可以具有不小于0.6μm的厚度。

公开(公告)号：US20050235490A1

公开(公告)日：2005-10-27

申请号：US10832321

申请日：2004-04-27

Applicant: Chih-Chung Chen

Inventor： Chih-Chung Chen

IPC: H05K1/00 ,  H05K1/02 ,  H05K3/00 ,  H05K3/22

CPC classification number: H05K3/0052 ,  H05K1/0269 ,  H05K3/225 ,  H05K2201/09145 ,  H05K2201/09845 ,  H05K2201/10204 ,  H05K2201/10598 ,  H05K2203/0143 ,  H05K2203/0191 ,  H05K2203/0228 ,  H05K2203/0278 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49135 ,  Y10T29/49718 ,  Y10T29/49721 ,  Y10T29/49723 ,  Y10T29/49725 ,  Y10T29/49726 ,  Y10T29/4973 ,  Y10T29/49732 ,  Y10T29/49734 ,  Y10T29/4975

Abstract: A printed circuit board defective area transplant repair method in which printed circuit boards that are determined to be defective undergo a series of reworking procedures comprised of plotting the printed circuit board area block plan, selecting the printed circuit boards, cutting out the area blocks, cutting the selected area blocks, applying the adhesive and fitting area blocks, adjusting the area block alignment, roller tamping the plastic band, curing the adhesive, and tearing off the plastic band. Following the reworking operations, defective printed circuit boards are restored into a good products capable of continuous use such that printed circuit board fabrication and production is even more economical and environmentally protective and, furthermore, printed circuit board manufacturing reaches maximum utilization rates, thereby effectively increasing practical production value.

Abstract translation: 一种印刷电路板缺陷区域移植修复方法，其中确定为有缺陷的印刷电路板经历一系列返工程序，其包括绘制印刷电路板区域块图，选择印刷电路板，切割区域块，切割 所选区域块，涂抹粘合剂和装配区域块，调整区域块对齐，辊夯塑料带，固化粘合剂，撕下塑料带。 在返工操作之后，有缺陷的印刷电路板被恢复成能够连续使用的良好产品，使得印刷电路板的制造和生产更加经济和环境保护，此外，印刷电路板制造达到最大利用率，从而有效地增加 实用生产价值。

公开(公告)号：US06926561B1

公开(公告)日：2005-08-09

申请号：US10139928

申请日：2002-05-07

Applicant: Martin R. Handforth ,  John J. Stankus

Inventor： Martin R. Handforth ,  John J. Stankus

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/11 ,  H01R24/00

CPC classification number: H05K1/117 ,  H05K1/0237 ,  H05K1/0298 ,  H05K2201/0919 ,  H05K2201/09845

Abstract: A connector assembly includes a substrate assembly and a receptacle. The substrate assembly includes a first substrate layer having a conductive trace that is accessible for direct electrical interconnection with a first conductor associated with another device. A second substrate layer on the assembly includes an electrical contact for electrical interconnection with a second conductor associated with the other device. The electrical contact on the second substrate layer is disposed such that when the substrate assembly is inserted into the receptacle, the electrical contact is electrically connected with the second conductor, a direct electrical interconnection between the conductive trace and the first conductor is maintained. The arrangement is advantageous in that the connector assembly is capable of transmitting low frequency signals through electrical connections that also serve to maintain a high frequency direct electrical interconnection.

Abstract translation: 连接器组件包括基板组件和插座。 衬底组件包括具有导电迹线的第一衬底层，该导电迹线可用于与与另一器件相关联的第一导体的直接电互连。 组件上的第二衬底层包括用于与与另一个器件相关联的第二导体的电互连的电接触件。 第二基板层上的电接触被布置成使得当基板组件插入插座时，电接触件与第二导体电连接，维持导电迹线和第一导体之间的直接电互连。 该装置的优点在于，连接器组件能够通过也用于维持高频直接电互连的电连接来传输低频信号。

公开(公告)号：US20050121800A1

公开(公告)日：2005-06-09

申请号：US11031859

申请日：2005-01-07

Applicant: Frank Egitto ,  Keith Miller ,  Manh-Quan Nguyen

Inventor： Frank Egitto ,  Keith Miller ,  Manh-Quan Nguyen

IPC: G01R1/067 ,  G01R1/073 ,  H05K3/20 ,  H05K3/40 ,  H05K3/42 ,  H01L21/8234 ,  H01L21/4763 ,  H01L21/8244 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: G01R1/06733 ,  G01R1/0735 ,  H01R12/52 ,  H01R12/7082 ,  H01R12/714 ,  H01R2201/20 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/423 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2201/09845 ,  H05K2201/10378 ,  H05K2203/0369 ,  H05K2203/0733 ,  Y10T29/4922

Abstract: A structure and method to establish an electrical connection between a tester and an electrical component. A flexible dielectric layer has a first side and a second side. A through via extends through the first side and the second side of the dielectric layer. A blind via is placed in a position that is offset from the through via and extends laterally in a first direction from a section of the first through via to a section of the flexible dielectric layer. The blind via extends in a second direction from the first side of the flexible dielectric layer to a section of the flexible dielectric layer that is between the first side and the second side of the dielectric layer. An electrically conductive member extends through the through via and extends into the blind via, thereby filling the through via and the blind via. The electrically conductive member has a first surface and a second surface. Any distance between the first surface and the second surface is greater than a distance between the first side of the dielectric layer and the second side of the dielectric layer.

Abstract translation: 一种在测试仪和电气部件之间建立电气连接的结构和方法。 柔性介电层具有第一面和第二面。 通孔延伸穿过电介质层的第一侧和第二侧。 盲通孔放置在从通孔偏移的位置，并且在从第一通孔的一部分到柔性介电层的一部分的第一方向上横向延伸。 盲孔从柔性介电层的第一侧沿第二方向延伸到介电层的第一侧和第二侧之间的柔性介电层的一部分。 导电构件延伸穿过通孔并延伸到盲孔中，从而填充通孔和盲孔。 导电构件具有第一表面和第二表面。 第一表面和第二表面之间的任何距离都大于电介质层的第一面和电介质层的第二面之间的距离。

公开(公告)号：US06903443B2

公开(公告)日：2005-06-07

申请号：US10316349

申请日：2002-12-11

Applicant: Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree

Inventor： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree

IPC: H01L21/48 ,  H01L21/60 ,  H01L21/768 ,  H01L23/13 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H05K1/03 ,  H05K1/11 ,  H05K3/00 ,  H01L29/40

CPC classification number: H01L21/486 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1005 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K1/112 ,  H05K3/0029 ,  H05K3/0032 ,  H05K2201/09472 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A method for fabricating semiconductor components and interconnects includes the steps of providing a substrate, such as a semiconductor die, forming external contacts on opposing sides of the substrate by laser drilling vias through the substrate, and forming conductive members in the vias. The conductive members include enlarged terminal portions that are covered with a non-oxidizing metal. The method can be used to fabricate stackable semiconductor packages having integrated circuits in electrical communication with the external contacts. The method can also be used to fabricate interconnects for electrically engaging packages, dice and wafers for testing or for constructing electronic assemblies.

Abstract translation: 一种用于制造半导体部件和互连的方法包括以下步骤：提供诸如半导体管芯的衬底，通过穿过衬底的激光钻孔通孔在衬底的相对侧上形成外部触点，以及在通孔中形成导电构件。 导电构件包括被非氧化金属覆盖的扩大端子部分。 该方法可用于制造具有与外部触点电连通的集成电路的可堆叠半导体封装。 该方法还可用于制造用于电接合封装，裸片和晶片用于测试或构建电子组件的互连。

公开(公告)号：US20050104205A1

公开(公告)日：2005-05-19

申请号：US10944808

申请日：2004-09-21

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L21/68 ,  H01L23/24 ,  H01L23/31 ,  H01L23/433 ,  H01L23/495 ,  H01L23/498 ,  H01L25/10 ,  H05K1/18 ,  H05K3/06 ,  H05K3/40 ,  H01L23/04

CPC classification number: H01L21/6835 ,  H01L23/24 ,  H01L23/3114 ,  H01L23/4334 ,  H01L23/4951 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/94 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19105 ,  H01L2924/3511 ,  H05K1/183 ,  H05K3/064 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/09645 ,  H05K2201/09845 ,  H05K2203/0369 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices and methods of manufacturing such substrate are disclosed. An embodiment for the substrate comprised of an insulator and a plurality of conductive elements, wherein the insulator having a recess. The conductive elements embedded in the insulator. The conductive elements extend from the insulator surface to the recess. There are two portions of the conductive elements for electrical connection respectively, wherein a portion of conductive element may protrude the insulator surface for electrical connection. In this manner, solder balls are not needed. Moreover, the substrate of the present invention may also comprise an adhesive mean, which is between the conductive elements and the insulator. In addition, the substrate may further comprise a submember such as a chip, heat spreader etc., and the present invention may be capable of affording a thinner electrical device thickness, enhanced reliability, and a decreased cost in production.

Abstract translation: 公开了用于电气装置的基板和制造这种基板的方法。 用于由绝缘体和多个导电元件组成的衬底的实施例，其中绝缘体具有凹部。 绝缘子中嵌入的导电元件。 导电元件从绝缘体表面延伸到凹槽。 用于电连接的导电元件分为两部分，其中导电元件的一部分可以突出绝缘体表面用于电连接。 以这种方式，不需要焊球。 此外，本发明的基底还可以包括位于导电元件和绝缘体之间的粘合剂。 此外，基板还可以包括诸如芯片，散热器等的子部件，并且本发明可以提供更薄的电气设备厚度，增强的可靠性和降低的生产成本。