公开(公告)号：US09768103B2

公开(公告)日：2017-09-19

申请号：US14990425

申请日：2016-01-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Hui Wang ,  Ying-Te Ou

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/538 ,  H01L23/00 ,  H05K1/18 ,  H05K3/42 ,  H05K3/46

CPC classification number: H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/185 ,  H05K1/188 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09536 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/4913 ,  Y10T29/49204 ,  Y10T29/49213

Abstract: An embedded chip substrate includes a first insulation layer, a core layer, a chip, a second insulation layer, a first circuit layer, and a second circuit layer. The core layer disposed on the first insulation layer has an opening that exposes a portion of the first insulation layer. The chip is adhered into a recess constructed by the opening and the first insulation layer. The second insulation layer is disposed on the core layer for covering the chip. The first circuit layer is disposed at the outer side of the first insulation layer located between the first circuit layer and the core layer. The second circuit layer is disposed at the outer side of the second insulation layer located between the second circuit layer and the core layer. The first circuit layer is electrically connected to the second circuit layer that is electrically connected to the chip.

公开(公告)号：US09763331B2

公开(公告)日：2017-09-12

申请号：US15066244

申请日：2016-03-10

Applicant: FUJITSU LIMITED

Inventor： Yoshiyuki Hiroshima ,  Naoki Nakamura ,  Akiko Matsui ,  Mitsuhiko Sugane ,  Takahide Mukoyama ,  Tetsuro Yamada ,  Kohei Choraku

IPC: H05K1/14 ,  H05K1/18 ,  H05K3/30 ,  H05K3/46

CPC classification number: H05K1/185 ,  H05K1/0216 ,  H05K1/115 ,  H05K1/162 ,  H05K3/306 ,  H05K3/4623 ,  H05K3/4644 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09627 ,  H05K2201/09809 ,  H05K2201/10015 ,  H05K2201/10287 ,  H05K2201/10295

Abstract: A printed circuit board includes: a first electrode made of a tubular electric conductor formed on an inner wall of a first hole formed in the printed circuit board; a dielectric body disposed inside the first electrode; and a second electrode made of a tubular electric conductor formed on an inner wall of a second hole extending through the dielectric body, the second electrode having a center axis concentric with the first electrode.

公开(公告)号：US20170208692A1

公开(公告)日：2017-07-20

申请号：US15328190

申请日：2015-07-24

Applicant: LG INNOTEK CO., LTD.

Inventor： Jae Hyun AHN ,  Min Wook YU

IPC: H05K1/18 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/184 ,  H01L33/486 ,  H01L33/62 ,  H05K1/0203 ,  H05K1/0206 ,  H05K1/115 ,  H05K1/185 ,  H05K3/007 ,  H05K3/421 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10106 ,  H05K2201/10151 ,  H05K2203/1563

Abstract: A printed circuit board includes an insulating layer and an element embedded in the insulating layer and exposed through a surface of the insulating layer.

公开(公告)号：US20170133152A1

公开(公告)日：2017-05-11

申请号：US15318472

申请日：2015-07-01

Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.

Inventor： Masahiko KOUCHI ,  Tetsuya SHIMOMURA

IPC: H01F38/14 ,  H05K1/14 ,  H02J7/02 ,  H05K1/11

CPC classification number: H01F38/14 ,  H01F27/2804 ,  H01F27/365 ,  H01F2027/2809 ,  H02J7/025 ,  H02J50/12 ,  H05K1/115 ,  H05K1/144 ,  H05K1/148 ,  H05K1/165 ,  H05K3/4635 ,  H05K2201/041 ,  H05K2201/09227 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/10098

Abstract: A printed circuit board according to an embodiment of the present invention includes, alternately, at least one insulating layer containing a synthetic resin as a main component; and a plurality of conductive layers including circuit patterns, wherein the plurality of circuit patterns of the plurality of conductive layers form a spiral pattern in plan view, and the plurality of circuit patterns are connected together via a plurality of through-holes so as to form a single closed loop in which a current flows counterclockwise or clockwise in an entirety of the spiral pattern. The conductive layers are preferably formed on both surfaces of the at least one insulating layer so as to form a pair. The spiral pattern includes a plurality of multi-row circuits arranged to form multi-rows, and a bridging circuit that connects an end portion of one multi-row circuit of one of the conductive layers to an end portion of another multi-row circuit of the other conductive layer, the other multi-row circuit being adjacent to the one multi-row circuit.

公开(公告)号：US09603236B2

公开(公告)日：2017-03-21

申请号：US14462331

申请日：2014-08-18

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Hyoung Kim

IPC: F28F7/00 ,  H05K1/02 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/0206 ,  H05K1/0209 ,  H05K3/429 ,  H05K3/4679 ,  H05K2201/0305 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09809

Abstract: There is provided a heat dissipating substrate including: a base substrate having a first through hole formed therein; a first substrate disposed on an upper end portion of the base substrate and including a second through hole having a diameter smaller than that of the first through hole; and a heat dissipating pad disposed on an upper end portion of the second through hole. In addition, a flow phenomenon of a thermal conduction member (lead) may be reduced using the thermal conduction member by forming a second through hole smaller than a first through hole.

公开(公告)号：US20160353569A1

公开(公告)日：2016-12-01

申请号：US15158777

申请日：2016-05-19

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Jun FURUICHI ,  Noriyoshi SHIMIZU

IPC: H05K1/02 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K1/0298 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H05K1/036 ,  H05K1/0366 ,  H05K1/115 ,  H05K3/0044 ,  H05K3/108 ,  H05K3/426 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4644 ,  H05K2201/0183 ,  H05K2201/0191 ,  H05K2201/0376 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0979 ,  H05K2203/025

Abstract: A wiring substrate includes a core layer having a penetrating hole, a first insulating layer disposed on a first surface of the core layer and having a first opening at a position of the penetrating hole, the first insulating layer containing no filler, a penetrating electrode disposed in the penetrating hole and in the first opening, and a first wiring layer laminated both on the first insulating layer at a first surface thereof facing away from the core layer and on an end face of the penetrating electrode, wherein the first surface of the first insulating layer and the end face of the penetrating electrode are planarized.

Abstract translation: 布线基板包括具有穿透孔的芯层，设置在芯层的第一表面上的第一绝缘层，并且在穿透孔的位置处具有第一开口，第一绝缘层不包含填料，设置穿透电极 在所述贯通孔和所述第一开口中的第一表面以及在所述第一绝缘层上层叠的第一布线层，所述第一布线层在其背离所述芯层的第一表面和所述穿透电极的端面上， 绝缘层和穿透电极的端面被平坦化。

公开(公告)号：US20160135289A1

公开(公告)日：2016-05-12

申请号：US14875241

申请日：2015-10-05

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Suk Hyeon CHO ,  Yoong OH ,  Young Gwan KO ,  Yong Ho BAEK ,  Young Kuk KO

IPC: H05K1/02 ,  H05K3/06 ,  H05K3/40 ,  H05K3/46 ,  H05K1/03 ,  H05K1/11

CPC classification number: H05K1/0271 ,  H01L2224/16227 ,  H01L2924/15313 ,  H01L2924/15788 ,  H05K1/038 ,  H05K1/115 ,  H05K1/181 ,  H05K3/002 ,  H05K3/0029 ,  H05K3/0047 ,  H05K3/0052 ,  H05K3/429 ,  H05K3/4605 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/0909 ,  H05K2201/09536 ,  H05K2201/09581 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10674

Abstract: There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board include a glass plate, an insulating member penetrating through the glass plate, insulating layers disposed on a first surface and a second surface of the glass plate, and a via through the insulating member.

Abstract translation: 提供了一种印刷电路板及其制造方法。 印刷电路板包括玻璃板，穿透玻璃板的绝缘构件，设置在玻璃板的第一表面和第二表面上的绝缘层，以及通过绝缘构件的通孔。

公开(公告)号：US09257310B2

公开(公告)日：2016-02-09

申请号：US13924705

申请日：2013-06-24

Applicant: HAESUNG DS CO., LTD.

Inventor： Sang-Min Lee

IPC: H01L21/52 ,  H05K3/46 ,  H01L23/14 ,  H01L23/498 ,  H01L25/065 ,  H05K3/00 ,  H01L23/053 ,  H01L23/00 ,  H01L23/538 ,  H05K1/03 ,  H05K3/42

CPC classification number: H01L21/52 ,  H01L23/053 ,  H01L23/145 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5383 ,  H01L23/5384 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/12042 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/002 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/09118 ,  H05K2201/09536 ,  H05K2201/09845 ,  H05K2203/0554 ,  H01L2224/45099 ,  H01L2924/00

Abstract: Provided is a method of manufacturing a circuit board. The method includes: preparing a base substrate including a core layer and a first conductive layer that is formed on at least one surface of the core layer and includes an internal circuit pattern; forming a build-up material to cover the first conductive layer; forming in the build-up material at least one cavity through which the core layer and the first conductive layer are exposed; forming a laminated body by curing the build-up material in which the at least one cavity is formed; and forming a second conductive layer including an external circuit pattern on an outer surface of the laminated body.

Abstract translation: 提供一种制造电路板的方法。 该方法包括：制备包括芯层的基底基板和形成在芯层的至少一个表面上并包括内部电路图案的第一导电层; 形成积层材料以覆盖所述第一导电层; 在堆积材料中形成芯层和第一导电层暴露的至少一个空腔; 通过固化形成所述至少一个腔的所述积聚材料来形成层压体; 以及在所述层叠体的外表面上形成包括外部电路图案的第二导电层。

公开(公告)号：US20150382469A1

公开(公告)日：2015-12-31

申请号：US14492716

申请日：2014-09-22

Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.

Inventor： Chu-Chin HU ,  Shih-Ping HSU ,  E-Tung CHOU

IPC: H05K1/18 ,  H05K3/40 ,  H05K3/28 ,  H05K1/14 ,  H05K3/34

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/00 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/115 ,  H05K1/187 ,  H05K1/188 ,  H05K3/0014 ,  H05K3/0017 ,  H05K3/007 ,  H05K3/16 ,  H05K3/181 ,  H05K3/284 ,  H05K3/421 ,  H05K2201/0162 ,  H05K2201/0209 ,  H05K2201/09118 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/09636 ,  H05K2201/09854 ,  H05K2203/025 ,  H05K2203/0369 ,  H05K2203/0723 ,  H05K2203/0733 ,  H05K2203/1316 ,  H05K2203/1461 ,  H05K2203/1469 ,  H01L2924/00012 ,  H01L2224/81

Abstract: A package apparatus comprises a first wiring layer, a first conductive pillar layer, a first molding compound layer, a second wiring layer, and a protection layer. The first wiring layer has a first surface and a second surface that are arranged opposite to each other. The first conductive pillar layer is disposed on the second surface of the first wiring layer, whereas the first conductive pillar layer is a non-circular conductive pillar layer. The first molding compound layer is disposed within a specific portion of the first wiring layer and the first conductive pillar layer. The second wiring layer is disposed on the first molding compound layer and one end of the first conductive pillar layer. The protection layer is disposed on the first molding compound layer and the second wiring layer.

Abstract translation: 包装装置包括第一布线层，第一导电柱层，第一模塑料层，第二布线层和保护层。 第一布线层具有彼此相对布置的第一表面和第二表面。 第一导电柱层设置在第一布线层的第二表面上，而第一导电柱层是非圆形导电柱层。 第一模塑料层设置在第一布线层和第一导电柱层的特定部分内。 第二布线层设置在第一模塑料层和第一导电柱层的一端。 保护层设置在第一模塑料层和第二布线层上。

公开(公告)号：US20150319852A1

公开(公告)日：2015-11-05

申请号：US14470011

申请日：2014-08-27

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Tae Hong MIN ,  Yi Hyun JUNG ,  Suk Hyeon CHO ,  Young Gwan KO

IPC: H05K1/03 ,  H05K1/02 ,  H05K3/00 ,  H05K1/14 ,  H05K3/42 ,  C03C15/02 ,  H05K1/11

CPC classification number: C03C15/02 ,  H01L2224/16227 ,  H01L2224/81192 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/3511 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/115 ,  H05K1/142 ,  H05K3/002 ,  H05K3/0029 ,  H05K3/0044 ,  H05K3/0052 ,  H05K3/42 ,  H05K3/4605 ,  H05K2201/09136 ,  H05K2201/09154 ,  H05K2201/09536 ,  H05K2203/1509 ,  H05K2203/1518 ,  H01L2224/81

Abstract: A printed circuit board and a manufacturing method thereof. According to one embodiment, a printed circuit board may include a core part; and a conductor pattern disposed on at least one surface of the core part, the core part includes a glass core having a side portion that is polished or thinner than a central portion of the core. According to another embodiment, a method of manufacturing the printed circuit board may include cutting a glass plate to form a glass core; and removing cracks from at least one side surface of the cut glass core.

Abstract translation: 印刷电路板及其制造方法。 根据一个实施例，印刷电路板可以包括芯部分; 以及设置在所述芯部的至少一个表面上的导体图案，所述芯部包括玻璃芯，所述玻璃芯具有被抛光或比所述芯的中心部更薄的侧部。 根据另一实施例，制造印刷电路板的方法可以包括切割玻璃板以形成玻璃芯; 并且从切割的玻璃芯的至少一个侧表面去除裂纹。