公开(公告)号：US09717150B2

公开(公告)日：2017-07-25

申请号：US14080549

申请日：2013-11-14

Applicant: Second Sight Medical Products, Inc.

Inventor： Jerry Ok ,  Robert J Greenberg

IPC: C03B29/00 ,  B32B37/00 ,  B29C65/00 ,  H05K3/46 ,  C04B35/10 ,  H05K3/12 ,  H05K3/00 ,  C04B37/00 ,  H05K3/40 ,  B32B37/14 ,  H05K1/03

CPC classification number: H05K3/4061 ,  B32B37/14 ,  C04B35/10 ,  C04B37/00 ,  C04B2237/064 ,  H05K1/0306 ,  H05K3/0044 ,  H05K3/0047 ,  H05K3/005 ,  H05K3/12 ,  H05K3/1225 ,  H05K3/1233 ,  H05K3/4614 ,  H05K3/4623 ,  H05K3/4629 ,  H05K2201/0376 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2203/1147 ,  H05K2203/308 ,  Y10T156/10

Abstract: A method for fabricating a biocompatible hermetic housing including electrical feedthroughs, the method comprises providing a ceramic sheet having an upper surface and a lower surface, forming at least one via hole in said ceramic sheet extending from said upper surface to said lower surface, inserting a conductive thick film paste into said via hole, laminating the ceramic sheet with paste filled via hole between an upper ceramic sheet and a lower ceramic sheet to form a laminated ceramic substrate, firing the laminated ceramic substrate to a temperature to sinter the laminated ceramic substrate and cause the paste filled via hole to form metalized via and cause the laminated ceramic substrate to form a hermetic seal around said metalized via, and removing the upper ceramic sheet and the lower ceramic sheet material from the fired laminated ceramic substrate to expose an upper and a lower surface of the metalized via.

公开(公告)号：US09648732B2

公开(公告)日：2017-05-09

申请号：US14455052

申请日：2014-08-08

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Youko Nakamura ,  Norihiro Nashida

IPC: H05K1/18 ,  H01L23/28 ,  H05K1/02 ,  H01L31/048 ,  H01L33/56 ,  H01L23/12 ,  H01L33/52 ,  H01L21/56 ,  H01L23/31 ,  H01L23/373 ,  H01L23/433 ,  H01L23/498 ,  H01L23/00 ,  H05K1/11 ,  H05K7/00 ,  H01L23/29 ,  H01L25/07

CPC classification number: H05K1/0296 ,  H01L21/56 ,  H01L21/563 ,  H01L23/12 ,  H01L23/28 ,  H01L23/3121 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/01 ,  H01L25/072 ,  H01L31/048 ,  H01L33/52 ,  H01L33/56 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K1/115 ,  H05K1/185 ,  H05K2201/09609 ,  H05K2201/09727 ,  H05K2201/098 ,  H01L2924/00

Abstract: A semiconductor device includes: a conductive-patterned insulating substrate; conductive blocks fixed to conductive patterns of the conductive-patterned insulating substrate; a semiconductor chip fixed to each conductive block; a printed circuit board that has a conductive post fixed to the semiconductor chip; and a resin. The semiconductor device is configured such that the average volume of a conductive film per unit area of each conductive pattern around a section thereof, to which the corresponding conductive block is fixed, is reduced from the conductive block toward the outside.

公开(公告)号：US09538633B2

公开(公告)日：2017-01-03

申请号：US13713395

申请日：2012-12-13

Applicant: NVIDIA Corporation

Inventor： Richard Washburn Clay

IPC: H05K7/20 ,  H05K1/02

CPC classification number: H05K1/0206 ,  H01L2224/16225 ,  H05K1/0207 ,  H05K1/0209 ,  H05K7/205 ,  H05K2201/066 ,  H05K2201/09609 ,  H05K2201/10371 ,  H05K2201/10734

Abstract: A passive cooling system is provided for dissipating heat from an electronic component. The system includes a printed circuit board including a first dielectric layer and a first conductive layer, an electronic component coupled to the printed circuit board via a plurality of electrical contacts, and a cooling component thermally coupled to the electronic component through the first conductive layer by a micro via thermal array.

Abstract translation: 提供了一种用于从电子部件散热的被动冷却系统。 该系统包括印刷电路板，该印刷电路板包括第一电介质层和第一导电层，经由多个电触头耦合到印刷电路板的电子部件以及通过第一导电层热耦合到电子部件的冷却部件 微通道热阵列。

公开(公告)号：US20160366759A1

公开(公告)日：2016-12-15

申请号：US14461900

申请日：2014-08-18

Applicant: Cray Inc.

Inventor： Hyunjun Kim ,  Jeffrey Scott Conger ,  Gregory Erwin Scott

IPC: H05K1/02 ,  H05K3/42 ,  H05K3/40 ,  H05K1/11

CPC classification number: H05K1/0225 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0245 ,  H05K1/0298 ,  H05K1/114 ,  H05K1/115 ,  H05K3/4007 ,  H05K3/42 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/09609 ,  H05K2201/09618 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A multi-layer printed circuit board has a number of landing pads that are configured to engage a connector secured thereto. Between the landing pads associated with different signals is at least one micro via that is electrically connected to a ground plane on an outer surface of the multi-layer printed circuit board, and a ground plane on an inner layer of the multi-layer printed circuit board.

公开(公告)号：US09510448B2

公开(公告)日：2016-11-29

申请号：US14473509

申请日：2014-08-29

Applicant: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.

Inventor： Eric R. Ao ,  Stephen J. Flint ,  Michael W. J. Hogan ,  Shannon D. McGale ,  Rodolfo B. Salinas

IPC: H05K7/00 ,  H05K1/16 ,  H05K1/11 ,  H05K7/10 ,  H01K3/10 ,  H05K1/18 ,  H05K3/34

CPC classification number: H05K1/113 ,  H05K1/111 ,  H05K1/116 ,  H05K1/181 ,  H05K3/3415 ,  H05K2201/0939 ,  H05K2201/09609 ,  Y02P70/611

Abstract: A circuit board has a first side and a second side opposite thereto. The board includes vias extending through the substrate from the first side to the second side, and via contact pads on the second side, each of which surrounds a corresponding via. The board includes a pair of surface mount contact pads on the second side. Each surface mount contact pad has a surface area and edges, each of which can have a shape to maximize the surface area while maintaining predetermined minimum separation distances. Each edge except one or more edges that are opposite another surface mount contact pad have a curved shape, and each edge opposite another surface mount contact pad have a linear shape. Curved edges adjacently opposite corresponding via contact pads can have curved shapes can have concave shapes, and curved edges not adjacently opposite via contact pads can have convex shapes.

Abstract translation: 电路板具有与其相对的第一侧和第二侧。 该板包括从第一侧延伸穿过基板的通孔到第二侧，以及通过第二侧上的接触焊盘，其中每一个围绕相应的通孔。 该板包括一对表面贴装接触垫在第二面。 每个表面安装接触垫具有表面积和边缘，每个表面区域和边缘可以具有使表面积最大化的形状，同时保持预定的最小间隔距离。 除了与另一表面安装接触垫相对的一个或多个边缘之外的每个边缘具有弯曲形状，并且与另一表面安装接触垫相对的每个边缘具有线性形状。 通过接触焊盘相对相对相对的弯曲边缘可以具有弯曲形状可以具有凹形形状，并且通过接触垫不相邻相对的弯曲边缘可以具有凸形形状。

公开(公告)号：US20160329273A1

公开(公告)日：2016-11-10

申请号：US15214532

申请日：2016-07-20

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165 ,  H01L2224/05647 ,  H01L2924/01024 ,  H01L2924/01079

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

公开(公告)号：US20160316562A1

公开(公告)日：2016-10-27

申请号：US14694759

申请日：2015-04-23

Applicant: Dell Products L.P.

Inventor： Kevin Warren Mundt ,  Sandor Farkas ,  Bhyrav Mutnury

IPC: H05K1/11 ,  G06F1/16 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/114 ,  G06F1/185 ,  G06F1/20 ,  H05K1/0222 ,  H05K1/0251 ,  H05K2201/09609 ,  H05K2201/09636

Abstract: A circuit board includes a board base with a first surface and a second surface that is located opposite the first surface. A plurality of first coupling pads are located on the first surface of the board base. A plurality of second coupling pads are located on the second surface of the board base. The first coupling pads and the second coupling pads define a coupling pad footprint. A breakout via system is included in the board base. The breakout via system includes a plurality of primary signal vias that are located in the board base and outside of the coupling pad footprint, a plurality of first primary signal via connections that extend between the primary signal vias and the plurality of first coupling pads, and a plurality of second primary signal via connections that extend between the primary signal vias and the plurality of second coupling pads.

Abstract translation: 电路板包括具有第一表面的板基座和与第一表面相对定位的第二表面。 多个第一耦合垫位于板基底的第一表面上。 多个第二耦合垫位于板基底的第二表面上。 第一耦合焊盘和第二耦合焊盘限定耦合焊盘覆盖区。 董事会成员包括一个突破性的系统。 突破通孔系统包括多个主要信号通孔，其位于板基底中并且位于耦合垫足迹外部，多个第一初级信号经由连接在第一信号通孔和多个第一耦合垫之间延伸，以及 经由连接的多个第二主信号，其在主信号通孔和多个第二耦合焊盘之间延伸。

公开(公告)号：US20160174419A1

公开(公告)日：2016-06-16

申请号：US14956751

申请日：2015-12-02

Applicant: University of Windsor

Inventor： Sazzadur CHOWDHURY

IPC: H05K9/00 ,  H05K3/46 ,  H05K3/00 ,  H05K1/03 ,  H05K1/11

CPC classification number: H05K3/4605 ,  H01L21/4857 ,  H01L23/15 ,  H01L23/552 ,  H01L23/66 ,  H01L2924/0002 ,  H05K1/0218 ,  H05K1/0306 ,  H05K1/115 ,  H05K2201/09609 ,  H01L2924/00

Abstract: An integrated circuit assembly which includes stacked printed ceramic substrate layers, and incorporates a shielding enclosure extending about the electrical conductor traces and interconnects which form the assembly circuitry. The shielding enclosure is configured to reduce electric and/or magnetic field leakage or interference with the traces and interconnects. The enclosure is provided as a cage about the assembly circuitry, and which is formed as arrays of ground conductors in electrical communication with ground plates.

Abstract translation: 一种集成电路组件，其包括堆叠的印刷陶瓷衬底层，并且包括围绕形成组装电路的电导体迹线和互连件延伸的屏蔽外壳。 屏蔽外壳被配置为减少电场和/或磁场泄漏或与迹线和互连的干扰。 外壳围绕组装电路提供为笼，并且其形成为与接地板电连通的接地导体的阵列。

公开(公告)号：US09332658B2

公开(公告)日：2016-05-03

申请号：US14459706

申请日：2014-08-14

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Yuji Kunimoto ,  Noriyoshi Shimizu

IPC: H05K1/09 ,  H05K3/46

CPC classification number: H05K3/4602 ,  H05K2201/09518 ,  H05K2201/09609

Abstract: A wiring board includes first and second insulating layers, first and second through holes, a via, a plane layer, and signal wirings. The first insulating layer covers a first wiring layer. The first through hole opens on a surface of the first insulating layer and exposes a surface of the first wiring layer. The via fills the first through hole. The plane layer is connected to the via and is stacked on the first insulating layer. The second through hole opens on a surface of the plane layer and exposes the surface of the first insulating layer. The second insulating layer at least partially fills the second through hole and covers the plane layer. The signal wirings are stacked on the second insulating layer. The first through hole overlaps the signal wirings in a plan view. The second through hole does not overlap the signal wirings in a plan view.

Abstract translation: 布线板包括第一和第二绝缘层，第一和第二通孔，通孔，平面层和信号布线。 第一绝缘层覆盖第一布线层。 第一贯通孔在第一绝缘层的表面上开口，露出第一布线层的表面。 通孔填充第一个通孔。 平面层连接到通孔并堆叠在第一绝缘层上。 第二通孔在平面层的表面上开口并暴露第一绝缘层的表面。 第二绝缘层至少部分地填充第二通孔并覆盖平面层。 信号布线堆叠在第二绝缘层上。 第一通孔在平面图中与信号布线重叠。 第二通孔在平面图中不与信号布线重叠。

公开(公告)号：US09258882B2

公开(公告)日：2016-02-09

申请号：US14289126

申请日：2014-05-28

Applicant: Davide Bettoni ,  Giorgio Stirano

Inventor： Davide Bettoni ,  Giorgio Stirano

IPC: G06F1/16 ,  H05K5/00 ,  H05K7/00 ,  H05K1/02 ,  H05K1/18 ,  H05K1/11 ,  H05K3/00 ,  H05K3/42 ,  H05K7/20

CPC classification number: H05K1/0204 ,  H05K1/0206 ,  H05K1/0265 ,  H05K1/0298 ,  H05K1/113 ,  H05K1/181 ,  H05K3/0061 ,  H05K3/42 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09609 ,  H05K2201/0979 ,  H05K2201/10022 ,  H05K2201/10053 ,  H05K2201/10166

Abstract: An electronic device may include at least one power component and a printed circuit board. The at least one power component may include a main body and a lead. The printed circuit board may include at least two conductive layers parallel to a plane. The printed circuit board may further include a mounting element and a conductor. The mounting element may include first conductive tubes. The conductor may include second conductive tubes. The first conductive tubes and the second conductive tubes may elongate through a thickness of the printed circuit board along a direction substantially perpendicular to the plane. The main body of the at least one power component may be fixed to the mounting element. The lead of the at least one power component may be fixed to the conductor.

Abstract translation: 电子设备可以包括至少一个功率部件和印刷电路板。 所述至少一个功率部件可以包括主体和引线。 印刷电路板可以包括平行于平面的至少两个导电层。 印刷电路板还可以包括安装元件和导体。 安装元件可以包括第一导电管。 导体可以包括第二导电管。 第一导电管和第二导电管可以沿着基本上垂直于该平面的方向延伸穿过印刷电路板的厚度。 至少一个功率部件的主体可以固定到安装元件。 至少一个功率部件的引线可以固定到导体。