公开(公告)号：US09468105B2

公开(公告)日：2016-10-11

申请号：US14659178

申请日：2015-03-16

Applicant: SEIKO EPSON CORPORATION

Inventor： Manabu Kondo

IPC: H03L1/02 ,  H05K1/18 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K1/18 ,  H05K1/0212 ,  H05K3/4697 ,  H05K2201/09845 ,  H05K2201/10068 ,  H05K2201/10075 ,  H05K2201/10151 ,  H05K2201/10219 ,  H05K2201/10515 ,  H05K2201/10553 ,  H05K2201/1056

Abstract: An electronic component includes a pedestal plate that has a first surface made of a metal and a second surface being an opposite surface to the first surface, a heating element arranged on the first surface of the pedestal plate, and a resonator element arranged on the heating element. The pedestal plate overlaps the resonator element in a plan view.

Abstract translation: 一种电子部件，包括具有由金属构成的第一表面和与第一表面相反的表面的第二表面的基座板，布置在基座板的第一表面上的加热元件和布置在加热器上的谐振元件 元件。 基座板在平面图中与谐振器元件重叠。

公开(公告)号：US20160295682A1

公开(公告)日：2016-10-06

申请号：US15090207

申请日：2016-04-04

Applicant: DENSO CORPORATION

Inventor： Tsuyoshi Tashima

IPC: H05K1/02 ,  H05K1/18

CPC classification number: H05K1/0209 ,  H05K2201/066 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10053 ,  H05K2201/10166 ,  H05K2201/10409 ,  H05K2201/10545 ,  H05K2201/1056

Abstract: An electronic control unit includes a substrate, an electronic component, a heat sink, a cover, a heat accumulator, and a screw. A wiring pattern is formed on the substrate. The electronic component is mounted on the substrate and generates heat upon energization thereof. The heat sink is provided on one side of the substrate in its thickness direction. The cover is made of resin and is provided on the other side of the substrate in its thickness direction. The heat accumulator is fixed to a part of the cover on the substrate-side and is in contact with a surface of the substrate on the cover-side. One end of the screw is connected to the heat sink. A central portion of the screw is inserted through a hole passing through the substrate in its thickness direction. The other end of the screw is connected to the heat accumulator.

Abstract translation: 电子控制单元包括基板，电子元件，散热器，盖子，蓄热器和螺钉。 在基板上形成布线图形。 电子部件安装在基板上，并在其通电时产生热量。 散热器沿其厚度方向设置在基板的一侧。 盖由树脂制成，并且在其厚度方向上设置在基板的另一侧。 蓄热器固定在基板侧的盖的一部分上，并且与盖侧的基板的表面接触。 螺钉的一端连接到散热器。 螺杆的中心部分沿其厚度方向穿过穿过基底的孔插入。 螺杆的另一端连接到蓄热器。

公开(公告)号：US09460938B2

公开(公告)日：2016-10-04

申请号：US14254805

申请日：2014-04-16

Applicant: Renesas Electronics Corporation

Inventor： Hiroyasu Miyamoto

IPC: H01L23/12 ,  H01L21/56 ,  H01L23/544 ,  H01L23/10 ,  H01L25/065 ,  H01L25/18 ,  H01L23/04 ,  H01L23/498 ,  H01L23/00 ,  H01L23/367 ,  H01L23/50 ,  H05K1/02

CPC classification number: H01L21/563 ,  H01L23/04 ,  H01L23/10 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49894 ,  H01L23/50 ,  H01L23/544 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/84 ,  H01L25/0657 ,  H01L25/18 ,  H01L2223/5442 ,  H01L2223/54486 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/32013 ,  H01L2224/32058 ,  H01L2224/32059 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/3701 ,  H01L2224/37012 ,  H01L2224/37147 ,  H01L2224/376 ,  H01L2224/40225 ,  H01L2224/40499 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73255 ,  H01L2224/73263 ,  H01L2224/83132 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/84132 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/16196 ,  H01L2924/16251 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/0203 ,  H05K2201/066 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/1056 ,  H05K2201/10674 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07811

Abstract: The long sides of a rectangular control chip and the long sides of a rectangular memory chip are arranged parallel with first sides of the upper surface of a wiring substrate in a BGA. A lid includes a pair of first brims and a pair of second brims, the widths of the second brims are formed wider than those of the first brims, and a mounting area for mounting chip parts and a junction base area for joining the lid are secured outside the short sides of the control chip mounted on the upper surface of the wiring substrate and outside the short sides of the memory chip mounted on the upper surface of the wiring substrate, which enables the wide-width second brims of the lid to be disposed on the junction base area. Hence, the mounting area of the BGA can be reduced.

Abstract translation: 矩形控制芯片的长边和矩形存储芯片的长边与布线基板的上表面的第一侧平行布置在BGA中。 盖子包括一对第一边缘和一对第二边缘，第二边缘的宽度形成得比第一边缘的宽度宽，并且用于安装芯片部分的安装区域和用于接合盖子的接合基座区域被固定 在安装在布线基板的上表面上的控制芯片的短边外部以及安装在布线基板的上表面上的存储芯片的短边外侧，能够布置盖的宽幅第二边缘 在交汇处基地区。 因此，可以减小BGA的安装面积。

公开(公告)号：US20160143148A1

公开(公告)日：2016-05-19

申请号：US14790556

申请日：2015-07-02

Applicant: Mitsubishi Electric Corporation

Inventor： Takeshi HOSOMI

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K1/183 ,  H01L23/10 ,  H01L23/13 ,  H01L23/3135 ,  H01L23/3677 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/16 ,  H01L25/167 ,  H01L27/14618 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/14 ,  H01L2924/142 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15313 ,  H01L2924/15333 ,  H01L2924/16195 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/165 ,  H01L2924/1659 ,  H01L2924/167 ,  H01L2924/16747 ,  H01L2924/1676 ,  H01L2924/16787 ,  H01L2924/16788 ,  H01L2924/1679 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/0206 ,  H05K1/021 ,  H05K3/4697 ,  H05K2201/09036 ,  H05K2201/1056 ,  H05K2203/304 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/48247 ,  H01L2924/00

Abstract: A printed circuit board includes: a printed wiring board including an insulating layer wherein a recessed part is provided on a top surface of the insulating layer, and a printed conductor provided inside the recessed part; a bare chip part mounted in the recessed part and electrically connected to the printed conductor; an electronic part mounted on the top surface of the printed wiring board other than the recessed part; and a cap fixed to the top surface of the printed wiring board and hollow-sealing the bare chip part mounted in the recessed part, wherein using a height of the top surface of the printed wiring board as a reference, a height of a top surface of the cap is equal to or below a maximum height of a top surface of the electronic part.

Abstract translation: 印刷电路板包括：印刷布线板，包括绝缘层，其中在绝缘层的顶表面上设置凹部，以及设置在凹部内的印刷导体; 裸芯片部分安装在凹部中并电连接到印刷导体; 安装在所述印刷电路板的除了所述凹部以外的上表面的电子部件; 以及固定在印刷电路板的上表面上的盖，对安装在凹部中的裸芯片部进行中空密封，其中以印刷电路板的上表面的高度为基准，上表面的高度 的盖子等于或低于电子部件顶表面的最大高度。

公开(公告)号：US09287224B2

公开(公告)日：2016-03-15

申请号：US14090560

申请日：2013-11-26

Applicant: FUJITSU LIMITED

Inventor： Satoshi Masuda

IPC: H01L23/34 ,  H01L23/66 ,  H01L25/16 ,  H01L23/045 ,  H01L23/047 ,  H01L23/498 ,  H05K3/46 ,  H05K7/20 ,  H01L23/00 ,  H01L23/367 ,  H05K1/02 ,  H05K9/00

CPC classification number: H05K7/026 ,  H01L23/045 ,  H01L23/047 ,  H01L23/3677 ,  H01L23/49833 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/06181 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4911 ,  H01L2924/00014 ,  H01L2924/16195 ,  H01L2924/1627 ,  H01L2924/19107 ,  H05K1/0204 ,  H05K1/021 ,  H05K1/0215 ,  H05K3/4697 ,  H05K7/20509 ,  H05K9/0039 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2201/10242 ,  H05K2201/10371 ,  H05K2201/1056 ,  H01L2224/45099

Abstract: A high-frequency module includes a lower base member having a recess part formed in an upper face thereof, and having a base metal part formed on a lower face thereof that is to be grounded, an upper substrate disposed inside the recess part of the lower base member, a semiconductor device mounted on an upper face of the upper substrate, a first ground line connected to the semiconductor device and formed on the upper substrate, and a ground metal part connected to the base metal part and disposed in the lower base member, wherein the ground metal part is connected to the first ground line on the upper substrate.

Abstract translation: 高频模块包括下基部件，其具有形成在其上表面中的凹部，并且具有形成在其下表面上的待接地的基底金属部分，设置在下部的凹部内的上基板 基底构件，安装在上基板的上表面上的半导体器件，连接到半导体器件并形成在上基板上的第一接地线，以及连接到基底金属部分并设置在下基底构件中的接地金属部件 ，其中所述接地金属部分连接到所述上基板上的所述第一接地线。

公开(公告)号：US20150366067A1

公开(公告)日：2015-12-17

申请号：US14717829

申请日：2015-05-20

Applicant: Edward Herbert

Inventor： Edward Herbert

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H01L23/4822 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/2518 ,  H05K1/0271 ,  H05K3/007 ,  H05K2201/0338 ,  H05K2201/0373 ,  H05K2201/1056 ,  H05K2201/10901 ,  H05K2201/10946

Abstract: Semiconductor die and other components can be mounted in printed circuit boards with a binding agent at their periphery. This leaves both surfaces exposed for subsequent processing, usually over-plating with copper that is then etched to define a conductor pattern, just as in printed circuit manufacture. Methods using the surface tension of liquids for precise component placement in three dimensions (3-D) are shown. Optionally, micro-conductors can be used for the connections to the die, for reduced apparent resistance at high frequencies. The micro-channels between the micro-conductors can be a wick for liquid for evaporative cooling at the semiconductor surface as part of a heat pipe circuit.

Abstract translation: 半导体管芯等组件可以在其周围装有粘合剂的印刷电路板。 这使得两个表面暴露以用于随后的处理，通常用铜进行镀覆，然后被蚀刻以限定导体图案，就像在印刷电路制造中一样。 示出了使用液体的表面张力在三维（3-D）中精确组分放置的方法。 可选地，微导体可用于与管芯的连接，以降低高频下的视在电阻。 微导体之间的微通道可以是作为热管回路的一部分的半导体表面处的用于蒸发冷却的液体的芯。

公开(公告)号：US20150271959A1

公开(公告)日：2015-09-24

申请号：US14308386

申请日：2014-06-18

Applicant: Apple Inc.

Inventor： Yanfeng Chen ,  Shankar S. Pennathur

IPC: H05K9/00

CPC classification number: H05K9/0024 ,  H01L2924/1815 ,  H01L2924/3025 ,  H05K1/0215 ,  H05K1/0218 ,  H05K3/284 ,  H05K9/0039 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/09972 ,  H05K2201/1056

Abstract: A portable electronic device packaged into a System-in-Package assembly is disclosed. The portable electronic device can include a substrate and a plurality of components mounted on the substrate and included in one or more subsystems. Interference between subsystems or from external sources can be reduced or eliminated by disposing an insulating layer over the components, forming narrow trenches between subsystems, and conformally coating the insulating layer and trenches with a metal shielding layer. In some examples, trenches between subsystems can be formed using a laser source. In some examples, trenches between subsystems can have angled walls. In some examples, the metal shielding layer can be formed using at least one of electroplating, electroless plating, chemical vapor deposition, and physical vapor deposition.

Abstract translation: 公开了一种封装在系统级封装中的便携式电子设备。 便携式电子设备可以包括基板和安装在基板上并包括在一个或多个子系统中的多个部件。 通过在部件之间设置绝缘层，在子系统之间形成窄沟槽，并用金属屏蔽层保形地涂覆绝缘层和沟槽，可以减少或消除子系统之间或外部源之间的干扰。 在一些示例中，子系统之间的沟槽可以使用激光源形成。 在一些示例中，子系统之间的沟槽可以具有成角度的壁。 在一些示例中，可以使用电镀，化学镀，化学气相沉积和物理气相沉积中的至少一种来形成金属屏蔽层。

公开(公告)号：US09142519B2

公开(公告)日：2015-09-22

申请号：US14447181

申请日：2014-07-30

Applicant: Renesas Electronics Corporation

Inventor： Satoshi Takahashi ,  Shuuichi Kariyazaki

IPC: H01L23/50 ,  H01L23/00 ,  H01L23/373 ,  H01L23/544 ,  H01L21/50 ,  H01L23/367

CPC classification number: H01L23/04 ,  H01L21/50 ,  H01L23/3675 ,  H01L23/3736 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/544 ,  H01L23/562 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/74 ,  H01L24/97 ,  H01L25/165 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0913 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/0266 ,  H05K3/3442 ,  H05K3/3489 ,  H05K2201/066 ,  H05K2201/09781 ,  H05K2201/1056 ,  H05K2201/10636 ,  H05K2203/0169 ,  H05K2203/0173 ,  H05K2203/167 ,  H05K2203/168 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/014

Abstract: An error is prevented from being generated at a mounting position of an electronic component on a wiring substrate. A first semiconductor chip has a main surface and a rear surface. The rear surface is an opposite surface of the main surface. The rear surface of the first semiconductor chip is an opposite surface of the main surface thereof. A wiring substrate is rectangular, and has a main surface and a rear surface. The first semiconductor chip is mounted on the main surface of the wiring substrate. A lid covers the main surface of the wiring substrate, and the first semiconductor chip. An electronic component is mounted on the rear surface of the wiring substrate. The main surface of the wiring substrate has uncovered regions that are not covered with the lid at at least two corners facing each other.

Abstract translation: 防止在布线基板上的电子部件的安装位置产生误差。 第一半导体芯片具有主表面和后表面。 后表面是主表面的相反表面。 第一半导体芯片的后表面是其主表面的相对表面。 布线基板是矩形的，并且具有主表面和后表面。 第一半导体芯片安装在布线基板的主表面上。 盖子覆盖布线基板的主表面和第一半导体芯片。 电子部件安装在布线基板的背面。 布线基板的主表面在至少两个彼此面对的角部处未被盖子覆盖的未覆盖区域。

公开(公告)号：US20150243609A1

公开(公告)日：2015-08-27

申请号：US14190745

申请日：2014-02-26

Applicant: International Business Machines Corporation

Inventor： Mark C. Lamorey ,  Janak G. Patel ,  Peter Slota, JR. ,  David B. Stone

IPC: H01L23/64 ,  H01L23/367 ,  H01L23/498 ,  H01L23/36 ,  H01L23/552 ,  H01L23/50

CPC classification number: H01L23/552 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3672 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/642 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/165 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/1624 ,  H01L2224/17181 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/12042 ,  H01L2924/141 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/1659 ,  H01L2924/16747 ,  H02J7/0042 ,  H02J7/0052 ,  H02J7/345 ,  H05K1/0204 ,  H05K1/021 ,  H05K1/0215 ,  H05K1/0216 ,  H05K1/144 ,  H05K1/162 ,  H05K2201/0116 ,  H05K2201/0187 ,  H05K2201/041 ,  H05K2201/0999 ,  H05K2201/10515 ,  H05K2201/1056 ,  H01L2924/014 ,  H01L2924/00

Abstract: Package assemblies including a die stack and related methods of use. The package assembly includes a substrate with a first surface, a second surface, and a third surface bordering a through-hole extending from the first surface to the second surface. The assembly further includes a die stack, a conductive layer, and a lid. The die stack includes a chip positioned inside the through-hole in the substrate. A section of the conductive layer is disposed on the third surface of the substrate. A portion of the lid is disposed between the first chip and the section of the conductive layer. The conductive layer is configured to be coupled with power, and the lid is configured to be coupled with ground. The portion of the lid may act as a first plate of a capacitor, and the section of the conductive layer may act as a second plate of the capacitor.

Abstract translation: 封装组件包括管芯堆叠和相关使用方法。 包装组件包括具有第一表面，第二表面和与从第一表面延伸到第二表面的通孔邻接的第三表面的基底。 组件还包括管芯叠层，导电层和盖。 芯片堆叠包括位于衬底中的通孔内的芯片。 导电层的一部分设置在基板的第三表面上。 盖的一部分设置在第一芯片和导电层的部分之间。 导电层被配置为与电力耦合，并且盖被配置为与地耦合。 盖的部分可以用作电容器的第一板，并且导电层的部分可以用作电容器的第二板。

公开(公告)号：US20150043172A1

公开(公告)日：2015-02-12

申请号：US14103601

申请日：2013-12-11

Applicant: Taiyo Yuden Co., Ltd.

Inventor： Eiji MUGIYA ,  Kenzo KITAZAKI ,  Masaya SHIMAMURA ,  Tetsuo SAJI ,  Hiroshi NAKAMURA

IPC: H05K1/02 ,  H05K3/30

CPC classification number: H05K1/0218 ,  H01L2224/16225 ,  H01L2924/16152 ,  H01L2924/16153 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K1/0215 ,  H05K1/0216 ,  H05K3/284 ,  H05K3/303 ,  H05K9/0024 ,  H05K9/0045 ,  H05K2201/0723 ,  H05K2201/09036 ,  H05K2201/09145 ,  H05K2201/0919 ,  H05K2201/09972 ,  H05K2201/1056 ,  H05K2203/108 ,  Y10T29/4913 ,  H01L2924/00012

Abstract: There is provided a circuit module and a method of producing the same where interlayer wirings of a circuit substrate are prevented from damaging by laser irradiation, and a shield is assuredly electrically connected to the superficial conductor of the circuit substrate. The circuit substrate includes mount components, a sealing body, and a shield. The circuit substrate is a multi-layer substrate on which interlayer wirings are formed, and includes a mount surface on which a superficial conductor is disposed. The mount components are mounted on the mount surface. The sealing body is formed on the mount surface, covers the mount component and has a trench including a first trench section reaching the superficial conductor and a second trench section not reaching the superficial conductor. The shield has an outer shield section and an inner shield section.

Abstract translation: 提供一种电路模块及其制造方法，可以防止电路基板的层间布线受到激光照射的损害，并且屏蔽层可靠地电连接到电路基板的表面导体。 电路基板包括安装部件，密封体和屏蔽件。 电路基板是形成有层间配线的多层基板，具有设置有表面导体的安装面。 安装部件安装在安装表面上。 密封体形成在安装表面上，覆盖安装部件，并且具有包括到达表面导体的第一沟槽部分和没有到达表面导体的第二沟槽部分的沟槽。 屏蔽件具有外屏蔽部分和内屏蔽部分。