公开(公告)号：US09560756B2

公开(公告)日：2017-01-31

申请号：US14202333

申请日：2014-03-10

Applicant: Hefei BOE Optoelectronics Technology Co., LTD. ,  BOE Technology Group Co., LTD.

Inventor： Juncai Ma

IPC: H01R9/00 ,  H05K1/11 ,  H05K7/00 ,  H05K7/10 ,  G02F1/1345 ,  H05K1/18

CPC classification number: H05K1/111 ,  G02F1/13452 ,  G02F1/13454 ,  G02F1/13458 ,  H05K1/181 ,  H05K2201/094 ,  H05K2201/09436 ,  H05K2201/09709 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2201/10234 ,  Y02P70/611

Abstract: The present invention relates to an array substrate assembly and a display device. The array substrate assembly comprises a substrate; a first metal line formed at one side of the substrate; an insulating layer formed on the first metal line; a second metal line formed on the insulating layer, wherein one end of the second metal line connected with a driving circuit is formed with a second terminal, wherein in a thickness direction of the substrate, a distance between a surface of the second terminal away from the one side of the substrate and the substrate is less than a distance between a surface of the second metal line away from the one side of the substrate and the substrate. The display device includes the array substrate assembly. With the solution of the present invention, when the array substrate assembly is connected to IC or COF, deformation difference between a conducting gold ball at a gate line terminal and a conducting gold ball at a date line is small, thus impedances at the two terminals are close to each other, and therefore image quality of the display device is improved.

Abstract translation: 本发明涉及阵列基板组件和显示装置。 阵列基板组件包括基板; 形成在所述基板一侧的第一金属线; 形成在所述第一金属线上的绝缘层; 形成在绝缘层上的第二金属线，其中与驱动电路连接的第二金属线的一端形成有第二端子，其中在基板的厚度方向上，第二端子的表面之间的距离远离 基板和基板的一侧小于离开基板的一侧的第二金属线的表面与基板之间的距离。 显示装置包括阵列基板组件。 利用本发明的解决方案，当阵列基板组件连接到IC或COF时，栅极线端子处的导电金球与日期线处的导电金球之间的变形差小，因此两个端子处的阻抗 彼此接近，因此改善了显示装置的图像质量。

公开(公告)号：US09485868B2

公开(公告)日：2016-11-01

申请号：US14762671

申请日：2014-09-17

Applicant: Nantong Fujitsu Microelectronics Co., Ltd.

Inventor： Yujuan Tao

IPC: H05K1/18 ,  H05K1/11 ,  H01L25/10 ,  H01L25/16 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC classification number: H05K1/181 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/10 ,  H01L25/16 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/19105 ,  H01L2924/3511 ,  H05K1/113 ,  H05K2201/10234 ,  H05K2201/1031 ,  H05K2201/10378 ,  H05K2201/10522 ,  H05K2201/10962 ,  H05K2201/10977 ,  H01L2224/81 ,  H01L2924/00

Abstract: A package structure, including: a circuit board, including a first surface and a second surface opposite to the first surface, where the circuit board possesses multiple carrying units arranged in a matrix form, each of which possesses multiple input pads on the first surface and multiple output pads on the second surface, where the input pads and the output pads are interconnected electrically; a pre-packaged panel, including a first encapsulation layer, which possesses multiple integrating units arranged in a matrix form, wherein each of the integrating units possesses at least one semiconductor chip with multiple first pads, where first metal bumps are disposed on the first pads; wherein the pre-packaged panel is mounted on the first surface; a filling layer, filling a space between the first surface and the pre-packaged panel; and second metal bumps, disposed on the output pads. Accordingly, the package structure improves package efficiency.

Abstract translation: 一种封装结构，包括：电路板，包括与所述第一表面相对的第一表面和第二表面，其中所述电路板具有布置成矩阵形式的多个承载单元，每个所述承载单元在所述第一表面上具有多个输入焊盘， 第二表面上的多个输出焊盘，其中输入焊盘和输出焊盘电连接; 包括第一封装层的预封装面板，其具有以矩阵形式布置的多个积分单元，其中每个积分单元具有至少一个具有多个第一焊盘的半导体芯片，其中第一金属凸块设置在第一焊盘上 ; 其中所述预包装的面板安装在所述第一表面上; 填充层，填充第一表面和预包装面板之间的空间; 和第二金属凸块，设置在输出垫上。 因此，封装结构提高了封装效率。

公开(公告)号：US20160190395A1

公开(公告)日：2016-06-30

申请号：US14975860

申请日：2015-12-21

Applicant: NICHIA CORPORATION

Inventor： Satoshi SHIRAHAMA

IPC: H01L33/44 ,  H01L33/20 ,  H01L33/60

CPC classification number: H01L33/60 ,  H01L33/486 ,  H01L2933/0033 ,  H05K3/3431 ,  H05K2201/10106 ,  H05K2201/10234 ,  Y02P70/613

Abstract: A light emitting device includes a light emitting element, a light-reflecting substrate, and an electrically conductive member. The light emitting element includes a first surface and an electrode provided on the first surface. The light-reflecting substrate has a first main surface facing the first surface of the light emitting element and has a second main surface opposite to the first main surface. The light-reflecting substrate defines a hole at a position corresponding to the electrode. The hole penetrates through the light-reflecting substrate from the first main surface to the second main surface. The electrically conductive member includes a substantially spherical core arranged in the hole and bonded with the electrode, and a coating portion provided in a space between the substantially spherical core and a lateral surface of the hole.

Abstract translation: 发光装置包括发光元件，光反射基板和导电构件。 发光元件包括设置在第一表面上的第一表面和电极。 光反射基板具有面向发光元件的第一表面的第一主表面，并且具有与第一主表面相对的第二主表面。 光反射基板在与电极对应的位置处形成孔。 孔从第一主表面穿过光反射基板到第二主表面。 导电构件包括布置在孔中并与电极结合的基本上球形的芯，以及设置在基本上球形的芯和孔的侧表面之间的空间中的涂覆部分。

公开(公告)号：US20150201535A1

公开(公告)日：2015-07-16

申请号：US14482674

申请日：2014-09-10

Applicant: Guangzhou Fang Bang Electronics Co., Ltd.

Inventor： Zhi Su

IPC: H05K9/00 ,  H05K3/00 ,  H05K1/02

CPC classification number: H05K9/0084 ,  H05K1/0215 ,  H05K1/0216 ,  H05K2201/0382 ,  H05K2201/0715 ,  H05K2201/10234 ,  H05K2203/1189 ,  Y10T156/1054 ,  Y10T156/1057 ,  Y10T156/1082

Abstract: The present invention discloses an electromagnetic wave shielding film, comprising at least one electromagnetic shielding layer. A printed circuit board comprising the shielding film, is formed by tightly connecting the electromagnetic wave shielding film with the printed circuit board in the direction of thickness, wherein a ground layer is disposed on said printed circuit board. A method for producing the circuit board, including the following steps: (1) hot-pressing and curing the electromagnetic shielding film with the circuit board in the direction of thickness; (2) piercing the adhesive film layer by a rough surface of the electromagnetic shielding layer, to achieve grounding. Or, including the following steps: (1) hot-pressing and curing the electromagnetic shielding film with the circuit board in the direction of thickness; (2) piercing the shielding film by an electrically conductive substance, to achieve grounding. Or, including the following steps: (1) hot-pressing and curing the electromagnetic shielding film with the circuit board in the direction of thickness; (2) forming through holes or blind holes in the circuit board; (3) metallizing the holes, to achieve grounding. The adhesive film layer of the shielding film of the present invention contains no conductive particle, so that the cost and the insertion loss are reduced, and the development demand of high-speed and high-frequency of the electronic products is met.

Abstract translation: 本发明公开了一种电磁波屏蔽膜，其包括至少一个电磁屏蔽层。 包括屏蔽膜的印刷电路板通过沿着厚度方向紧密地连接电磁波屏蔽膜与印刷电路板而形成，其中在所述印刷电路板上设置接地层。 一种电路板的制造方法，包括以下步骤：（1）使电磁屏蔽膜与电路板沿厚度方向热压固化; （2）通过电磁屏蔽层的粗糙表面刺穿粘合膜层，实现接地。 或者，包括以下步骤：（1）将电磁屏蔽膜与电路板沿厚度方向热压固化; （2）用导电物质刺穿屏蔽膜，实现接地。 或者，包括以下步骤：（1）将电磁屏蔽膜与电路板沿厚度方向热压固化; （2）在电路板上形成通孔或盲孔; （3）金属化孔，实现接地。 本发明的屏蔽膜的粘合膜层不含导电性粒子，因此降低成本和插入损耗，满足电子产品的高速高频化的发展需要。

公开(公告)号：US09059088B2

公开(公告)日：2015-06-16

申请号：US13944188

申请日：2013-07-17

Applicant: Shinko Electric Industries Co., Ltd.

Inventor： Nobuyuki Kurashima ,  Tetsuya Koyama ,  Hajime Ilzuka ,  Koichi Tanaka

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/02 ,  H01L23/12 ,  H01L23/28 ,  H01L23/498 ,  H01L21/56 ,  H05K1/14 ,  H01L23/31 ,  H01L23/00 ,  H01L25/16

CPC classification number: H01L23/28 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/562 ,  H01L25/165 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K1/14 ,  H05K1/186 ,  H05K3/284 ,  H05K3/462 ,  H05K3/4697 ,  H05K2201/10234 ,  H05K2203/1327 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An electronic component built-in substrate, includes a lower wiring substrate, an electronic component mounted on the lower wiring substrate, an intermediate wiring substrate including an opening portion in which the electronic component is mounted, and arranged in a periphery of the electronic component, and connected to the lower wiring substrate via a first conductive ball, an upper wiring substrate arranged over the electronic component and the intermediate wiring substrate, and connected to the intermediate wiring substrate via a second conductive ball, and a resin filled into respective areas between the lower wiring substrate, the intermediate wiring substrate, and the upper wiring substrate, and sealing the electronic component, wherein the first conductive ball and the second conductive ball are arranged in displaced positions mutually.

Abstract translation: 电子部件内置基板包括下布线基板，安装在下布线基板上的电子部件，包括安装有电子部件的开口部并配置在电子部件的周围的中间布线基板， 并且经由第一导电球，布置在电子部件上的上部布线基板和中间布线基板连接到下部布线基板，并且经由第二导电球与中间布线基板连接，并且将树脂填充到第二导电球之间的各个区域中 下布线基板，中间布线基板和上布线基板，并且密封电子部件，其中第一导电球和第二导电球相互布置在位移​​位置。

公开(公告)号：US20150156872A1

公开(公告)日：2015-06-04

申请号：US14094862

申请日：2013-12-03

Applicant: Infineon Technologies AG

Inventor： Peter OSSIMITZ

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/10 ,  H05K1/09

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0295 ,  H05K1/09 ,  H05K1/181 ,  H05K3/10 ,  H05K2201/09954 ,  H05K2201/10234 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49147 ,  H01L2924/014 ,  H01L2924/00014

Abstract: An Integrated Circuit (IC) package comprises a package comprising a first set of pads having a pinout that is compatible with a chip core of a product family. A second set of pads are on substantially the same plane as the first set of pads and outside the package core. The second set of pads is configured to accommodate a circuit outside the chip core. The geometric center of the package core is different from the geometric center of the IC package.

Abstract translation: 集成电路（IC）封装包括包括具有与产品系列的芯片芯片兼容的引脚排列的第一组焊盘的封装。 第二组焊盘与第一组焊盘在基本相同的平面上，并且在封装芯之外。 第二组焊盘被配置为容纳芯片外部的电路。 封装芯的几何中心与IC封装的几何中心不同。

公开(公告)号：US20150061129A1

公开(公告)日：2015-03-05

申请号：US14475249

申请日：2014-09-02

Applicant: Senju Metal Industry Co., Ltd.

Inventor： Takahiro Hattori ,  Daisuke Soma ,  lsamu Sato

IPC: H01L23/00 ,  B23K1/20

CPC classification number: B23K1/203 ,  B23K1/0016 ,  B23K1/20 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03828 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13117 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13123 ,  H01L2224/13124 ,  H01L2224/13138 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13149 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/1316 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/1317 ,  H01L2224/13171 ,  H01L2224/13179 ,  H01L2224/1318 ,  H01L2224/1319 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13605 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/13616 ,  H01L2224/13617 ,  H01L2224/13618 ,  H01L2224/1362 ,  H01L2224/13624 ,  H01L2224/13638 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13671 ,  H01L2924/3651 ,  H01L2924/384 ,  H05K3/3436 ,  H05K2201/10234 ,  H05K2201/10621 ,  H05K2201/10734 ,  H05K2203/041 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01032 ,  H01L2924/01014 ,  H01L2924/01057 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01015

Abstract: A bump electrode is formed on an electrode pad using a Cu core ball in which a core material is covered with solder plating, and a board which has bump electrodes such as semiconductor chip or printed circuit board mounts such a bump electrode. Flux is coated on a substrate and the bump electrodes are then mounted on the electrode pad. In a step of heating the electrode pad and the Cu core ball to melt the solder plating, a heating rate of the substrate is set to have not less than 0.01° C./sec and less than 0.3.

Abstract translation: 在电极焊盘上使用Cu芯球形成突起电极，其中芯材被焊料覆盖，并且具有诸如半导体芯片或印刷电路板的凸起电极的板安装这样的凸块电极。 将焊剂涂覆在衬底上，然后将凸块电极安装在电极焊盘上。 在加热电极焊盘和Cu芯球以熔化焊料镀层的步骤中，将衬底的加热速率设定为不低于0.01℃/秒且小于0.3。

公开(公告)号：US20140353018A1

公开(公告)日：2014-12-04

申请号：US14287242

申请日：2014-05-27

Applicant: HITACHI, LTD.

Inventor： Akira SOEDA ,  Chiko YORITA ,  Shinichirou TOOYA ,  Takayuki ONO ,  Mitsuru TAKAHIRA ,  Yuuichi SEKINO ,  Akira GOTO ,  Yoshimasa TASHIRO ,  Hiroyuki DOI ,  Tsutomu SAKAMOTO

IPC: H05K3/40 ,  H05K1/09 ,  H05K1/11 ,  H05K1/03

CPC classification number: H05K3/4614 ,  H05K1/113 ,  H05K1/114 ,  H05K3/0094 ,  H05K3/306 ,  H05K2201/044 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2201/099 ,  H05K2201/10189 ,  H05K2201/10234 ,  H05K2203/061 ,  H05K2203/063 ,  Y10T29/49165

Abstract: An electrode connected to a TH pad requiring electric conduction is formed on a bonded surface of a first multilayer substrate having piercing TH to form a solder bump on the electrode. An electrode connected to the TH pad is formed on a bonded surface of a second multilayer substrate to be bonded having a piercing TH at a position opposite the electrode formed on the first multilayer substrate to form a solder bump on the electrode. A three-layered sheet is formed by applying an adhesive as a resin material that is not completely cured to both surfaces of a core material as the cured resin, and has holes at positions corresponding to the TH and the solder bump, respectively. The first and the second multilayer substrates are then laminated having the bonded surfaces facing each other while having the three-layered sheet positioned and interposed therebetween, and batch thermocompression bonded.

Abstract translation: 在具有穿刺TH的第一多层基板的接合表面上形成连接到需要导电的TH垫的电极，以在电极上形成焊料凸块。 连接到TH焊盘的电极形成在与要形成在第一多层基板上的电极相对的位置处具有穿刺TH的待接合的第二多层基板的接合表面上，以在电极上形成焊料凸块。 通过将作为树脂材料的粘合剂施加到作为固化树脂的芯材的两个表面的树脂材料上，并且在与TH和焊料凸块相对应的位置处分别具有孔，形成三层片。 然后将第一和第二多层基板层压，其中具有彼此面对的接合表面，同时具有定位并插入其中的三层片材，并进行批量热压接。

公开(公告)号：US20140008110A1

公开(公告)日：2014-01-09

申请号：US13541427

申请日：2012-07-03

Applicant: Shawn X. Arnold ,  Dennis R. Pyper

Inventor： Shawn X. Arnold ,  Dennis R. Pyper

IPC: H05K3/46 ,  H05K1/09 ,  H05K1/11

CPC classification number: H05K3/462 ,  H05K3/4623 ,  H05K2201/10234 ,  Y10T156/10 ,  Y10T156/1002

Abstract: The described embodiment relates generally to the field of PCB fabrication. More specifically conductive spheres are used in a bonding sheet to enable inter-layer communication in a multi-layer printed circuit board (PCB). The conductive spheres in the bonding sheet can be used in place of or in conjunction with conventional electroplated vias. This allows the following advantages in multi-layer PCB fabrication: dielectric substrate layers made of varying types of material; PCBs with higher resilience to stress and shock; and PCBs that are more flexible.

Abstract translation: 所描述的实施例一般涉及PCB制造领域。 在粘合片中使用更具体的导电性球体以实现多层印刷电路板（PCB）中的层间连通。 粘合片中的导电球可用于代替常规电镀通孔或与常规电镀通孔结合使用。 这允许在多层PCB制造中具有以下优点：由不同类型的材料制成的电介质基底层; 对应力和冲击具有较高弹性的PCB; 和PCB更灵活。

公开(公告)号：US08541299B2

公开(公告)日：2013-09-24

申请号：US12787527

申请日：2010-05-26

Applicant: Stephen Leslie Buchwalter ,  Bruce K. Furman ,  Peter A. Gruber ,  Jae-Woong Nah ,  Da-Yuan Shih

Inventor： Stephen Leslie Buchwalter ,  Bruce K. Furman ,  Peter A. Gruber ,  Jae-Woong Nah ,  Da-Yuan Shih

IPC: H01L21/44 ,  H01L21/48

CPC classification number: H01L24/16 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/27 ,  H01L24/28 ,  H01L24/31 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L2221/68377 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/11822 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/094 ,  H05K2201/10234 ,  H05K2201/10242 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49165 ,  H01L2224/45111 ,  H01L2924/01047 ,  H01L2224/13099 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An electrical interconnect forming method. The electrical interconnect includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.

Abstract translation: 电互连形成方法。 电互连包括包括第一导电焊盘的第一衬底，包括第二导电焊盘的第二衬底以及将第一导电焊盘电连接和机械地连接到第二导电焊盘的互连结构。 互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。 第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。 第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。