公开(公告)号：JPS60167036A

公开(公告)日：1985-08-30

申请号：JP20389784

申请日：1984-09-28

Applicant: TANDEM COMPUTERS INC

Inventor： WHITING HORST ROBERT ,  HARRIS RICHARD LEE

IPC: G06F20060101 ,  G06F9/00 ,  G06F9/22 ,  G06F9/26 ,  G06F9/38 ,  G06F9/40 ,  G06F9/42

公开(公告)号：JP2000112584A

公开(公告)日：2000-04-21

申请号：JP19816699

申请日：1999-07-12

Applicant: TANDEM COMPUTERS INC

Inventor： JEWETT DOUGLAS E ,  BEREITER TOM ,  VETTER BRIAN ,  RANDALL G BANTON ,  RICHARD W KATZ JR ,  DONALD C WESTBROOKE ,  KIRAN W FAYE JR ,  JOHN POSLOW ,  KENNETH C DUBACKER ,  MEHTA NIKHIL A ,  PHIL WEBSTER ,  ALDRIDGE DAVE ,  PETER C NORWOOD

IPC: G06F1/30 ,  G06F11/00 ,  G06F11/14 ,  G06F11/18 ,  G06F11/22 ,  G06F12/16 ,  G06F15/16

Abstract: PROBLEM TO BE SOLVED: To obtain an improved fault allowable highly reliable system by automatically interrupting a backup power supply when main power supply is not restored within prescribed time to stop the execution of a central processing part. SOLUTION: In a time series of interruption and restart procedures, a CPU executes an instruction stream by normal operation during the period of time 171 and abnormality in AC power supply is generated at time 172. Althrough the power supply abnormality is signaled from a maintenance processor to the CPU by interruption, the interruption of power supply is not immediately started. Instead, time delay is introduced over an interval 173 in order to exclude a transitional phonomenon and then a power supply abnormality signal is generated from the CPU at time 174. An interruption process is continued over a period 175 and completed at time 176. When AC power is restored during the period, the restart procedure is immediately started at the time 176. The restart procedure is continued over a period 177 and completed at time 178.

公开(公告)号：JPH10307767A

公开(公告)日：1998-11-17

申请号：JP2997296

申请日：1996-01-23

Applicant: TANDEM COMPUTERS INC

Inventor： LIN WILLIAM

IPC: G06F13/00 ,  G06F1/14

Abstract: PROBLEM TO BE SOLVED: To set a timer in a system without making long the time needed to set and reset the timer by traversing a cell in a non-free state which is related to a time storage entry and implementing a function which is related to the time storage entry. SOLUTION: Time storage entries 60 and 65 in a link list 50 are related to a timer for a specific data packet. After the time storage entries 60 and 65 which have expired are traversed, the time storage entries 60 and 65 are removed from the link list 50. After time storage entries 60 and 65 like those are all removed from cells 1 and 6 in a specific non-free state, an array entry related to the cells 1 and 6 in the non-free state is removed from a double link list 50 and an arbitrary memory which relates to an arbitrary data structure is reallocated.

公开(公告)号：JPH103441A

公开(公告)日：1998-01-06

申请号：JP34141396

申请日：1996-12-20

Applicant: TANDEM COMPUTERS INC

Inventor： FISHLER LEONARD R ,  ZARGHAM BAHMAN

IPC: G06F13/12 ,  G06F9/46 ,  G06F9/54 ,  G06F13/00 ,  H04N21/218 ,  H04N21/2183 ,  H04N21/8355 ,  H04N7/16 ,  H04N7/173

Abstract: PROBLEM TO BE SOLVED: To eliminate an unnecessary copying of data in a processor and also between processors by using a multiple DSC/S(data source/sink) to transform a DST(data stream). SOLUTION: A 1st pointer is generated by a 1st DSC/S which includes a 1st global network address designating a 1st storage position where a 1st DST is stored, and only the 1st pointer is transferred to a 2nd DSC/S. In the same way, a 2nd pointer is generated for a 2nd DST. At the same time, the 1st and 2nd pointers are chained together so that a 1st chained pointer is obtained. Then only the 1st chained pointer is transferred to a 3rd DSC/S via a 3rd node where a 3rd data fragment of a message is stored, and also the message is transferred to its destination. The 1st pointer is processed by the 3rd DSC/S and therefore transformed into plural secondary pointers. At the same time, a protocol header is chained to each part of the 1st DST.

公开(公告)号：JPH09325944A

公开(公告)日：1997-12-16

申请号：JP34141596

申请日：1996-12-20

Applicant: TANDEM COMPUTERS INC

Inventor： RENAADO AARU FUITSUSHIYURAA ,  BAAMAN ZAAGAMU

IPC: G06F13/12 ,  G06F9/46 ,  G06F9/54 ,  G06F11/20 ,  G06F13/00 ,  H04N7/173 ,  G06F15/16

Abstract: PROBLEM TO BE SOLVED: To exclude the unwanted copying of data by transferring only a 1st pointer generated by a 1st data source/sink to a 2nd data source/sink, generating a 2nd pointer at the 2nd data source/sink and linking the 1st and 2nd pointers. SOLUTION: When a global pointer indicates data 560 and specified data 561 of its own application exist in a memory 551, an application server process 531 dispatches the global painter indicating the data 560 and the other global pointer indicating data 562 specified for that application to an intermediate protocol process 532. The intermediate protocol process 532 does not copy the data 561 and 560 into the related memory but dispatches two global pointers indicating the data 561 and 560 to a TCP/IP process 533 together with a 3rd global pointer indicating intermediate protocol header data 562.

公开(公告)号：JPH09128347A

公开(公告)日：1997-05-16

申请号：JP14555196

申请日：1996-06-07

Applicant: TANDEM COMPUTERS INC

Inventor： ROBAATO DABURIYUU HOOSUTO ,  UIRIAMU EDOWAADO BEIKAA ,  RANDARU JII BANTON ,  JIYON MAIKERU BURAUN ,  UIRIAMU EFU BURUTSUKAATO ,  UIRIAMU PATAASON BANTON ,  GEARII EFU KIYANBERU ,  JIYON DEIIN KOODEINTON ,  RICHIYAADO DABURIYUU KATSUTSU ,  BARII RII DOREKUSURAA ,  HARII FURANKU ERUROTSUDO ,  DANIERU ERU FUAURAA ,  DEIBUITSUDO JIEI GAASHIA ,  POORU ENU HINTEITSUKA ,  JIEFURII AI ISUWANDEII ,  DAGURASU YUUJIIN JIYUUITSUTO ,  KAATEISU UIIRAADO JIYOONZU JIY ,  JIEEMUZU SUTEIIBUNSU KURETSUKA ,  JIYON SHII KURAUSU ,  SUTEIIBUN JII ROU ,  SUUZAN SUTOON MERADEISU ,  SUTEIIBUN SHII MEIAAZU ,  DEIBUITSUDO POORU SOONIA ,  UIRIAMU JIYOERU WATOSON ,  PATORISHIA ERU HOWAITOSAIDO ,  FURANKU EI UIRIAMUSU ,  RINDA ERIN ZARUZAARA

IPC: G06F11/18 ,  G06F11/16 ,  G06F15/16 ,  G06F15/17

Abstract: PROBLEM TO BE SOLVED: To facilitate fault-tolerant operation by including a routing element coupled with the central processor and peripheral device of a subprocessing system so as to transmit data between the central processor and peripheral device of the subprocessing system. SOLUTION: Subprocessor systems 10A and 10B include central processors CPUs 12, routers 14, and plural input/output I/O packet interfaces 16 connected to many I/O devices 17 by characteristic input/output NIO buses. The MPs 18 of the subprocessor system 10A and 10B connect IEEE1149. one-test buses 17 and registers used by the MPs 18 to transmit states and control information between elements and MPs 18 to elements of the subprocessor systems through on-line access port OLAP interfaces included in the elements.

公开(公告)号：JPH0944461A

公开(公告)日：1997-02-14

申请号：JP14573096

申请日：1996-06-07

Applicant: TANDEM COMPUTERS INC

Inventor： ANDORIASU II HOOTEI ,  JIYON ESU DEI ROO ,  MAAKU FUIRITSUPUSU ,  DEIBUITSUDO BUERASUKO

IPC: G06F12/00 ,  G06F9/46 ,  G06F9/50 ,  G06F15/16

Abstract: PROBLEM TO BE SOLVED: To distribute the calculation load of a customer information control system over a pair of loose coupling parallel processors and to impart API transaction start and cancel function. SOLUTION: A distributed type computer system 100 includes plural end user terminals 102 and plural loose coupling server computers which do not share resources with each other. Many user application process 116 are distributed to these server computers. The transaction start table stored in a first server computer stores the transaction start data showing the transactions which are requested to be executed by the user application processes 116. A start condition in the value showing the earliest time when the execution of the requested transaction should be started. When the user application processes 116 execute start transaction function, transaction start records are generated and the records are stored in the transaction start table.

公开(公告)号：JPH0926891A

公开(公告)日：1997-01-28

申请号：JP2997396

申请日：1996-01-23

Applicant: TANDEM COMPUTERS INC

Inventor： MAIKERU II FUITSUSHIYAA

IPC: G06F11/14 ,  G06F11/20 ,  G06F13/00 ,  H04L29/06 ,  H04L29/08 ,  H04L29/14 ,  G06F15/16

Abstract: PROBLEM TO BE SOLVED: To make related data the checkpoint from the processor of a main node to a backup processor when a main processor is taken over and to enable a smooth shift so as not to disconnect the connection between the program of a server side and a client side when a spontaneous processing is taken over. SOLUTION: A network is provided with a server node 15 communicating with a protocol process node 20 and the protocol process node 20 communicates with a transmission network 30. The transmission network 30 is connected with a client note 25. When a main processor 26 is taken over, related data is made the checkpoint from the processor 26 of a main node 22 to a backup processor 46 so that the backup processor 46 may take over the role of the main processor 26 and a socket may be maintained to an open state. Thus, a network connection can be maintained when a spontaneous processing switch is performed.

公开(公告)号：JPH0922384A

公开(公告)日：1997-01-21

申请号：JP862596

申请日：1996-01-22

Applicant: TANDEM COMPUTERS INC

Inventor： FURANKO PUTSUTOZORU

IPC: G06F12/00 ,  G06F12/08 ,  G06F15/163

Abstract: PROBLEM TO BE SOLVED: To secure reliability by distributing a cache. SOLUTION: Respective processors 12 maintain the cache for discriminating the states of the caching of respective files, the blocks of the respective files to be cached and cached open files. As long as only one processor opens the file and opens it for read/write access, the processor is allowed to perform read/write caching to the file. When the processor opens the file for the read access, the processor is allowed to perform read caching as long as the other processor does not open the file for the read/write access. After the last processor which performs the read/wire access to the file closes the file, a disk system upgrades a cache state to the file.

公开(公告)号：JPH0916531A

公开(公告)日：1997-01-17

申请号：JP2997096

申请日：1996-01-23

Applicant: TANDEM COMPUTERS INC

Inventor： REONAADO AARU FUISHIRAA ,  TOOMASU EMU KURAAKU

IPC: G06F9/54 ,  G06F9/46 ,  G06F11/14 ,  G06F11/20 ,  G06F15/16

Abstract: PROBLEM TO BE SOLVED: To provide a new system capable of efficiently transmitting/receiving data among plural processes under a fixed condition when much time is required for data copying as compared with the execution of processing and the data copying operation is not important for the security of failure tolerance. SOLUTION: In a parallel processing and fault tolerant type computer system, data are transmitted among plural processes in a single CPU 110 (142) by two methods. In the 1st method, data are copied in each transmission. In the 2nd method, data are transmitted through a shared memory queuing system without being copied. The 1st method is used for securing failure tolerance and linear extendability. The 2nd method minimizes time required for inter-process communication. Since the shared memory queuing system is used, the vertical and horizontal modules of a process executed in the same CPU 110 (142) are increased.