公开(公告)号：WO2003073812A1

公开(公告)日：2003-09-04

申请号：PCT/US2002/027986

申请日：2002-09-03

Applicant: FORCE10 NETWORKS, INC.

Inventor： GOERGEN, Joel, R.

IPC: H05K3/46

CPC classification number: H05K3/4688 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0271 ,  H05K1/116 ,  H05K3/382 ,  H05K3/429 ,  H05K3/4626 ,  H05K3/4641 ,  H05K2201/0209 ,  H05K2201/044 ,  H05K2201/0723 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/09327 ,  H05K2201/09354 ,  H05K2201/09381 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2203/061 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49163 ,  Y10T29/49165

Abstract: The disclosed board fabrication techniques and design features enable the construction of a reliable, high-layer-count, and economical backplane for routers and the like that require a large number of signaling paths across the backplane at speeds of 2.5 Gbps or greater, as well as distribution of significant amounts of power to router components. The disclosed techniques and features allow relatively thick (e.g., three- or four-ounce copper) power distribution planes to be combined with large numbers of high-speed signaling layers in a common backplane. Using traditional techniques, such a construction would not be possible because of the number of layers required and the thickness of the power distribution layers. The disclosed embodiments use novel layer arrangements, material selection, processing techniques, and panel features to produce the desired high-speed layers and low-noise high-power distribution layers in a single mechanically stable board.

Abstract translation: 所公开的板制造技术和设计特征使得能够构建用于路由器等的可靠的，高层次的和经济的背板，其需要以2.5Gbps或更高的速度跨越背板的大量信令路径，以及 作为路由器组件的大量功率分配。 所公开的技术和特征允许相对较厚（例如，三或四盎司铜）功率分配平面与公共背板中的大量高速信号层组合。 使用传统技术，由于需要的层数和配电层的厚度，这种结构将是不可能的。 所公开的实施例使用新颖的层布置，材料选择，处理技术和面板特征来在单个机械稳定的板中产生期望的高速层和低噪声大功率分配层。

公开(公告)号：WO99026458A1

公开(公告)日：1999-05-27

申请号：PCT/JP1998/005200

申请日：1998-11-19

IPC: H01L21/48 ,  H01L23/498 ,  H05K1/18 ,  H05K3/00 ,  H05K3/06 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/403 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49805 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H05K1/182 ,  H05K3/0035 ,  H05K3/0082 ,  H05K3/064 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/09454 ,  H05K2201/09518 ,  H05K2201/09645 ,  H05K2203/0554 ,  H05K2203/1394 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00

Abstract: A method for manufacturing a multilayer printed wiring board having short distances between the layers of patterns and having very small contact holes having a high contact reliability. Firstly, a core substrate (21) having core patterns (12, 13) including pads (101, 111) is prepared. Then a laminated board is fabricated by forming an insulating layer (22) on the core substrate (21). A surface pattern (11) is formed on the laminated board, and contact holes (30, 31) the bottom openings of which are covered with pads (101, 111) are formed by irradiating the laminated board with a laser beam.

Abstract translation: 一种多层印刷布线板的制造方法，该多层印刷布线板在图案层之间具有短距离并且具有非常小的具有高接触可靠性的接触孔。 首先，准备具有包括焊盘（101,111）的芯图案（12,13）的芯基板（21）。 然后通过在芯基板（21）上形成绝缘层（22）来制造层压板。 在层压板上形成表面图案（11），并且通过用激光束照射层叠板来形成其底部开口被垫（101,111）覆盖的接触孔（30,31）。

公开(公告)号：US20160135288A1

公开(公告)日：2016-05-12

申请号：US14580756

申请日：2014-12-23

Applicant: ALCATEL-LUCENT CANADA, INC.

Inventor： PAUL J. BROWN ,  ALEX L. CHAN

IPC: H05K1/02 ,  H05K1/11 ,  G06F17/50 ,  H05K3/46

CPC classification number: H05K1/0251 ,  G06F17/5077 ,  H05K1/0271 ,  H05K1/0298 ,  H05K1/112 ,  H05K3/0047 ,  H05K3/429 ,  H05K3/4644 ,  H05K2201/09454 ,  H05K2201/09781 ,  H05K2203/0207

Abstract: Disclosed is a printed circuit board (PCB) having backdrill reliability anchors comprising nonfunctional pads to provide mechanical reinforcement for signal pads on backdrilled plated through hole (PTH) vias, as well as associated method and machine readable storage medium.

Abstract translation: 公开了一种印刷电路板（PCB），其具有包括非功能焊盘的反向钻孔可靠性锚，以提供用于背部钻孔电镀通孔（PTH）通孔上的信号焊盘的机械加强，以及相关联的方法和机器可读存储介质。

公开(公告)号：US20150048906A1

公开(公告)日：2015-02-19

申请号：US14531058

申请日：2014-11-03

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Noboru KATO ,  Satoshi ISHINO ,  Jun SASAKI

IPC: H01P3/08 ,  H01P11/00 ,  H01P3/02

CPC classification number: H01P3/08 ,  H01P3/02 ,  H01P3/085 ,  H01P5/028 ,  H01P11/003 ,  H05K1/0219 ,  H05K1/0225 ,  H05K1/0242 ,  H05K1/0253 ,  H05K1/028 ,  H05K1/0393 ,  H05K1/113 ,  H05K1/147 ,  H05K2201/09454 ,  H05K2201/09618 ,  H05K2201/0969 ,  H05K2201/09727 ,  Y10T29/49123

Abstract: A high-frequency signal line includes a first base layer having flexibility, a linear signal line provided on the first base layer and including a first line portion having a first width and a second line portion having a second width greater than the first width, and a first reinforcing conductor provided on the first base layer along the first line portion.

Abstract translation: 高频信号线包括具有柔性的第一基底层，设置在第一基底层上的线性信号线，并且包括具有第一宽度的第一线部分和具有大于第一宽度的第二宽度的第二线部分，以及 沿第一线部分设置在第一基底层上的第一加强导体。

公开(公告)号：US08671565B1

公开(公告)日：2014-03-18

申请号：US12800757

申请日：2010-05-21

Applicant: Bob Shih-Wei Kuo

Inventor： Bob Shih-Wei Kuo

IPC: H01R43/00 ,  H05K13/00

CPC classification number: H05K1/116 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/045 ,  H05K3/107 ,  H05K3/4038 ,  H05K3/429 ,  H05K2201/09263 ,  H05K2201/09454 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2201/2072 ,  Y10T29/49128 ,  Y10T29/49165 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49176 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A capture pad structure includes a lower dielectric layer, a capture pad embedded within the lower dielectric layer, the capture pad comprising a plurality of linear segments. To form the capture pad, a focused laser beam is moved linearly to form linear channels in the dielectric layer. These channels are filled with an electrically conductive material to form the capture pad.

Abstract translation: 捕获垫结构包括下介电层，嵌入在下介电层内的捕获垫，捕获垫包括多个线性段。 为了形成捕获垫，聚焦的激光束线性地移动以在介电层中形成线性通道。 这些通道填充有导电材料以形成捕获垫。

公开(公告)号：US08476537B2

公开(公告)日：2013-07-02

申请号：US12675678

申请日：2007-08-31

Applicant: Taras Kushta

Inventor： Taras Kushta

IPC: H05K1/11

CPC classification number: H05K1/0251 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0245 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09454 ,  H05K2201/09618 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/09781

Abstract: A multi-layer substrate includes a planar transmission line structure and a signal via, which are connected by a multi-tier transition. The multi-tier transition includes a signal via pad configured to serve for a full-value connection of the signal via and the planar transmission line; and a dummy pad connected to the signal via, formed in an area of a clearance hole in a conductor layer disposed between a signal terminal of the signal via and the planar transmission line, and isolated from the conductor layer.

Abstract translation: 多层基板包括通过多层转换连接的平面传输线结构和信号通孔。 多层转换包括经配置以用于信号通孔和平面传输线的全值连接的信号通孔; 以及连接到信号通孔的虚拟焊盘，形成在布置在信号通孔的信号端子和平面传输线之间并与导体层隔离的导体层中的间隙孔的区域中。

公开(公告)号：US08453322B2

公开(公告)日：2013-06-04

申请号：US12539172

申请日：2009-08-11

Applicant: Raj Kumar ,  Monte Dreyer ,  Michael J. Taylor ,  Ruben Zepeda

Inventor： Raj Kumar ,  Monte Dreyer ,  Michael J. Taylor ,  Ruben Zepeda

IPC: H01K3/10

CPC classification number: H05K3/4614 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/427 ,  H05K3/429 ,  H05K3/462 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/09454 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2203/0191 ,  H05K2203/0554 ,  H05K2203/061 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: Methods of manufacturing at least a portion of a printed circuit board. The circuit board is formed to include a plurality of sub-assemblies, each of the sub-assemblies including a plurality of circuit layers and having at least one countersink and at least one hole, the countersink having a first diameter and a first depth from a first side of at least one of the sub-assemblies and into the at least one sub-assembly, the hole having a second diameter smaller than the first diameter and a second depth longer than the first depth from the first side of the at least one sub-assembly and into the at least one sub-assembly at the countersink; a metal metalized within the hole and the countersink; a lamination adhesive interposed between one and a corresponding one of the sub-assemblies and having at least one via formed therethrough; and a counter paste filled within the via.

Abstract translation: 制造印刷电路板的至少一部分的方法。 电路板形成为包括多个子组件，每个子组件包括多个电路层并且具有至少一个埋头孔和至少一个孔，该埋头孔具有第一直径和从第一深度 至少一个子组件的第一侧并且进入至少一个子组件，该孔具有小于第一直径的第二直径和比该至少一个子组件的第一侧的第一深度长的第二深度 子组件并进入至少一个子组件在锪孔处; 孔内金属化和埋头孔; 插入在一个和相应的一个子组件之间并且具有通过其形成的至少一个通孔的层压粘合剂; 以及填充在通孔内的计数器糊状物。

公开(公告)号：US20120256320A1

公开(公告)日：2012-10-11

申请号：US13525779

申请日：2012-06-18

Applicant: Kentaro Kaneko

Inventor： Kentaro Kaneko

IPC: H05K1/11 ,  H01L23/48

CPC classification number: H01L21/486 ,  H01L21/4857 ,  H01L21/6835 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/48227 ,  H01L2224/81801 ,  H01L2224/85444 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/351 ,  H05K1/113 ,  H05K3/108 ,  H05K3/205 ,  H05K3/382 ,  H05K3/423 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2201/09454 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/098 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A semiconductor device 100 has such a structure that a semiconductor chip 110 is flip-chip mounted on a wiring board 120. The wiring board 120 has a multilayer structure in which a plurality of wiring layers and a plurality of insulating layers are arranged, and a first electrode pad 130 is formed on a chip mounting side. A taper surface 132 of the first electrode pad 130 has a gradient in an orientation reduced in an upward direction toward a solder connecting side or a chip mounting side. Therefore, a holding force for a force applied to the solder connecting side or the chip mounting side is increased, and furthermore, the taper surface 132 adheres to a tapered internal wall of an insulating layer of a first layer so that a bonding strength to the insulating layer is increased.

Abstract translation: 半导体器件100具有半导体芯片110倒装芯片安装在布线板120上的结构。布线板120具有布置多个布线层和多​​个绝缘层的多层结构，并且 第一电极焊盘130形成在芯片安装侧。 第一电极焊盘130的锥形表面132具有沿向上朝向焊接连接侧或芯片安装侧减小的取向的梯度。 因此，施加到焊料连接侧或芯片安装侧的力的保持力增大，此外，锥形表面132粘附到第一层的绝缘层的锥形内壁，使得与 绝缘层增加。

公开(公告)号：US20120119853A1

公开(公告)日：2012-05-17

申请号：US13386009

申请日：2009-07-21

Applicant: Taras Kushta

Inventor： Taras Kushta

IPC: H01P1/203

CPC classification number: H01P1/20345 ,  H01P1/2056 ,  H01P7/04 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/09381 ,  H05K2201/09454 ,  H05K2201/09618 ,  H05K2201/09718

Abstract: A resonant element is provided with a multilayer board, comprising a plurality of conductor layers isolated by a dielectric, a signal via conductor, penetrating through the multilayer board, and a plurality of ground vias, penetrating thought the multilayer board and disposed around the signal via conductor. The multilayer board comprises a first conductor layer, a second conductor layer, and a corrugated conductor layer disposed between the first and the second conductor layers. The corrugated conductor layer comprises a corrugated signal plate, connected to the signal via conductor, and a corrugated ground plate, connected to the plurality of ground vias, isolated from the corrugated signal plate by the dielectric.

Abstract translation: 谐振元件设置有多层板，其包括通过电介质隔离的多个导体层，穿过多层板的信号通路导体和多个接地通孔，贯穿于多层板并且围绕信号通过 导体。 多层板包括第一导体层，第二导体层和布置在第一和第二导体层之间的波纹状导体层。 波纹状导体层包括连接到信号通孔导体的瓦楞信号板和连接到多个通孔的波纹接地板，通过电介质隔离波纹信号板。

公开(公告)号：US08003896B2

公开(公告)日：2011-08-23

申请号：US11832673

申请日：2007-08-02

Applicant: Youhong Wu

Inventor： Youhong Wu

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/0352 ,  H05K2201/09454 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09627 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A multi-layer printed wiring board has a core substrate, a first interlayer insulation layer formed over the core substrate, a first filled via formed in the first interlayer insulation layer, a second interlayer insulation layer formed over the first interlayer insulation layer, and a second filled via formed in the second interlayer insulation layer. The first filled via has a bottom portion having a first diameter. The second filled via has a bottom portion having a second diameter smaller than the first diameter.

Abstract translation: 多层印刷线路板具有芯基板，形成在芯基板上的第一层间绝缘层，形成在第一层间绝缘层中的第一填充通孔，形成在第一层间绝缘层上的第二层间绝缘层，以及 第二填充通孔形成在第二层间绝缘层中。 第一填充通孔具有第一直径的底部。 第二填充通孔具有第二直径小于第一直径的底部。