11.
    发明专利
    未知

    公开(公告)号:DE10240461A1

    公开(公告)日:2004-03-11

    申请号:DE10240461

    申请日:2002-08-29

    Abstract: Electronic component comprises a semiconductor chip (3) having chip contacts (4) on its contact surfaces. The chip contacts are mechanically fixed on contact connecting surfaces (5) of a rewiring structure (6) and electrically connected to the rewiring structure. The rewiring structure is formed as a region of a structured metal plate or structured metal layer of a metal-laminated base plate. Independent claims are also included for the following: (1) Process for the production of an electronic component; and (2) Panel for the electronic component having a shape-stable plastic plate.

    MEMS PACKAGE MIT HOHER WÄRMEKAPAZITÄT UND VERFAHREN ZUM HERSTELLEN SELBIGER

    公开(公告)号:DE102017206744B4

    公开(公告)日:2022-07-28

    申请号:DE102017206744

    申请日:2017-04-21

    Abstract: Vorrichtung (10, 20, 30, 40) mit:einem Substrat (11), wobei auf einer ersten Seite (11A) des Substrats (11) ein MEMS-Baustein (12) angeordnet ist, dessen Ausgangssignal sich bei einer Temperaturänderung verändert, wobei ein Loch (18) in dem Substrat (11) vorgesehen ist, das zum Austausch von Luft mit der Umgebung dient und wobei der MEMS-Baustein (12) ein MEMS-Mikrofon ist,eine auf der ersten Seite (11A) des Substrats (11) angeordnete Gehäusestruktur (13) mit einer Ausnehmung (14) in der der MEMS-Baustein (12) angeordnet ist, wobei die Gehäusestruktur (13) Metall aufweist und eine Abschirmung gegen externe elektromagnetische Strahlung bereitstellt, undeine an zumindest der oberen Außenseite (19) der Gehäusestruktur (13) angebrachte thermisch aktive Schicht (15), die die Wärmekapazität der Vorrichtung (10, 20, 30, 40) erhöht,wobei die Schicht (15) eine Temperaturleitfähigkeit von weniger als1,0⋅10−6m2s,oder von weniger als0,5⋅10−6m2s,oder von weniger als0,2⋅10−6m2saufweist.

    15.
    发明专利
    未知

    公开(公告)号:DE50310810D1

    公开(公告)日:2009-01-02

    申请号:DE50310810

    申请日:2003-07-29

    Abstract: A semiconductor wafer having many chips has electrically connected contact (1) and test (2) surfaces with the contacts being in a passive region (5) of the upper chip (1) where there are no IC components. The test surfaces are in a second, active, region (7) which comprise active components. An Independent claim is also included for an after treatment process for the wafer above.

    17.
    发明专利
    未知

    公开(公告)号:DE102005056569A1

    公开(公告)日:2007-06-06

    申请号:DE102005056569

    申请日:2005-11-25

    Abstract: An electronic component includes a substrate having contacts and a chip having contacts and a passivation layer disposed on an active side of the chip. The active side of the chip is mounted on a first surface of the substrate by flip chip technology such that the contacts of the chip are electrically connected to the contacts of the substrate by means of connecting elements. Elastic elevations are disposed between the contacts of the chip and the contacts of the substrate and an underfiller is disposed in an intermediate space between the chip and the substrate and between the elastic elevations. The underfiller and the elastic elevations have substantially the same modulus of elasticity.

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