公开(公告)号：DE102005023911A1

公开(公告)日：2006-09-07

申请号：DE102005023911

申请日：2005-05-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GRATZ ACHIM ,  ROEHRICH MAYK

IPC: G11C16/02 ,  G11C16/10

Abstract: The invention considers a non-volatile semiconductor memory device comprising a first and second floating gate transistor, which are coupled in series. Each floating gate transistor comprises a floating gate. Programming means coupled to the first and second floating gate transistor are operable to place a selected electrical charge in one of the floating gates and less than the selected electrical charge in the other floating gate to represent either a first or second binary value.

公开(公告)号：DE10232938B4

公开(公告)日：2005-05-04

申请号：DE10232938

申请日：2002-07-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GRATZ ACHIM ,  POLEI VERONIKA ,  ROEHRICH MAYK

IPC: H01L21/225 ,  H01L21/74 ,  H01L21/8247 ,  H01L21/768

公开(公告)号：BR0113164A

公开(公告)日：2003-06-24

申请号：BR0113164

申请日：2001-08-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PALM HERBERT ,  WILLER JOSEF ,  GRATZ ACHIM ,  KRIZ JAKOB ,  ROEHRICH MAYK

IPC: H01L21/8247 ,  H01L21/336 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: Each memory cell is a memory transistor which is provided on a top side of a semiconductor body and has a gate electrode which is arranged in a trench located between a source region and a drain region that are formed in the semiconductor material. The gate electrode is separated from the semiconductor material by a dielectric material. At least between the source region and the gate electrode and between the drain region and the gate electrode, there is an oxide-nitride-oxide layer sequence. The layer sequence is provided for the purpose of trapping charge carriers at the source and the drain.

公开(公告)号：DE10120052A1

公开(公告)日：2002-10-31

申请号：DE10120052

申请日：2001-04-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GRATZ ACHIM ,  WAWER PETER ,  ROEHRICH MAYK ,  KNOBLOCH KLAUS

IPC: H01L21/762 ,  H01L27/088 ,  H01L27/08 ,  H01L21/822

Abstract: Semiconductor circuit comprises components arranged on a substrate (1); and a trench isolation (3) for electrical isolating two of the electrical components. One of the components is a MOSFET (2) having a source region (S), a gate region (G) and a drain region (D). The MOSFET has a drift zone (4) and a trench isolation (5) between the gate region and the drain region. The drift zone runs below the trench isolation of the MOSFET in the substrate. An Independent claim is also included for a process for the production of the semiconductor circuit. Preferred Features: The trench isolations are shallow trench isolations (STI) and contain an oxide, preferably silicon dioxide, or polysilicon. The trench isolations are 0.05-1 microns m wide and 0.15-1 microns m thick.

公开(公告)号：BR0011998A

公开(公告)日：2002-03-05

申请号：BR0011998

申请日：2000-05-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WAWER PETER ,  SPRINGMANN OLIVER ,  WOLF KONRAD ,  HEITZSCH OLAF ,  HUCKELS KAI ,  RENNEKAMP REINHOLD ,  ROEHRICH MAYK ,  KAMIENSKI ELARD STEIN VON ,  KUTTER CHRISTOPH ,  LUDWIG CHRISTOPH

IPC: H01L21/8247 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: A method for producing a non-volatile semiconductor memory cell with a separate tunnel window cell includes the step of forming a tunnel zone in a late implantation step by performing a tunnel implantation with the aid of a tunnel window cell as a mask. The resulting memory cell has a small area requirement and a high number of program/clear cycles.

公开(公告)号：DE102010016666A1

公开(公告)日：2010-12-23

申请号：DE102010016666

申请日：2010-04-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BOLLU MICHAEL ,  NIRSCHL THOMAS ,  ROEHRICH MAYK

IPC: G11C7/18 ,  G11C16/02

公开(公告)号：DE19930586B4

公开(公告)日：2007-12-27

申请号：DE19930586

申请日：1999-07-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WAWER PETER ,  SPRINGMANN OLIVER ,  WOLF KONRAD ,  HEITZSCH OLAF ,  HUCKELS KAI ,  RENNEKAMP REINHOLD ,  ROEHRICH MAYK ,  STEIN VON KAMIENSKI ELARD ,  KUTTER CHRISTOPH ,  LUDWIG CHRISTOPH

IPC: H01L27/115 ,  G11C16/02 ,  H01L21/8247 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/788

公开(公告)号：DE102005024955B4

公开(公告)日：2007-06-21

申请号：DE102005024955

申请日：2005-05-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MUEHLBACHER BENNO ,  GRATZ ACHIM ,  ROEHRICH MAYK ,  KRICKL EVELYN MARIA ,  WIESBAUER ANDREAS ,  SANSEGUNDOBELLO DAVID ,  POETSCHER THOMAS

IPC: H03K19/0185 ,  H03K19/003

公开(公告)号：FR2888042A1

公开(公告)日：2007-01-05

申请号：FR0605446

申请日：2006-06-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROEHRICH MAYK ,  KNOBLOCH KLAUS ,  GRATZ ACHIM

IPC: H01L27/085 ,  H01L27/092 ,  H03K17/687

Abstract: Une borne de source d'un transistor à effet de champ est formée au moyen d'une zone (4) de contact adjacente à une zone (2) de source et très dopée de manière opposée, qui forme un contact (5) de butée avec la zone de source. Une zone (7) de borne de cuvette ou de substrat, qui est reliée d'une manière conductrice de l'électricité avec une ligne (6) d'amenée d'un potentiel d'alimentation, est disposée séparément de la zone (4) de contact dans le matériau semi-conducteur.

公开(公告)号：DE102005028905A1

公开(公告)日：2006-12-28

申请号：DE102005028905

申请日：2005-06-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KNOBLOCH KLAUS ,  GRATZ ACHIM ,  ROEHRICH MAYK

IPC: H01L27/085 ,  H01L23/528 ,  H01L29/41

Abstract: Component has a substrate connecting region (7) arranged in a substrate (S) inside or outside a well and highly doped for conductivity type of surrounding semiconductor material. A substrate connecting contact (8) is arranged in the substrate connecting region for conductively connecting the substrate connecting region to a supply voltage lead. An electrical connection is provided between the supply voltage lead and a source region. A contact region is separated from the substrate connecting region by a more lightly doped semiconductor material.