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    CIRCUIT DE COMPARAISON D'UNE TENSION A UN SEUIL
    21.
    发明专利
    CIRCUIT DE COMPARAISON D'UNE TENSION A UN SEUIL 未知

    公开(公告)号：FR3030157A1

    公开(公告)日：2016-06-17

    申请号：FR1462427

    申请日：2014-12-15

    Applicant: COMMISSARIAT ENERGIE ATOMIQUE ,  ST MICROELECTRONICS SA

    Inventor： TROCHUT SEVERIN ,  WILLEMIN JEROME ,  BOISSEAU SEBASTIEN ,  MONFRAY STEPHANE

    IPC: H03K17/30 ,  G01R17/02

    Abstract: L'invention concerne un circuit (100) de comparaison d'une tension (Ve) à un seuil, comportant : des premier (A) et deuxième (B) noeuds d'application de ladite tension ; une première branche comportant un premier transistor (T1) en série avec une première résistance (R1) entre les premier et deuxième noeuds ; une deuxième branche comportant des deuxième (R2) et troisième (R3) résistances en série formant un pont diviseur de tension entre les premier et deuxième noeuds, le point milieu (D) du pont diviseur étant connecté à un noeud de commande du premier transistor (T1) ; et une troisième branche comportant un deuxième transistor (T2) en série avec un élément résistif (Rf), entre le noeud (D) de commande du premier transistor et le premier noeud, un noeud de commande du deuxième transistor étant connecté au point milieu (C) de l'association en série du premier transistor (T1) et de la première résistance (R1).

    22.
    发明专利
    未知

    公开(公告)号：DE60314203D1

    公开(公告)日：2007-07-19

    申请号：DE60314203

    申请日：2003-04-28

    Applicant: ST MICROELECTRONICS SA

    Inventor： MONFRAY STEPHANE ,  DUTARTRE DIDIER ,  BOEUF FREDERIC

    IPC: H01S5/34 ,  H04L9/08

    Abstract: An integrated circuit, incorporating a semiconductor device forming the source of a single photon, comprises on a silicon substrate (SB): (a) a MOS transistor (TR) having a grid in the shape of a mushroom, capable of delivering on its drain, in a controlled manner, a single electron in response to a control voltage applied on its grid; (b) at least one compatible silicon quantum box (BQ), electrically coupled to the drain region (D) of the transistor, and capable of emitting a single photon on the reception of a single electron emitted by the transistor. Independent claims are also included for: (a) a cryptographic device incorporating this integrated circuit; (b) a method for the fabrication of this integrated circuit; (c) a method for the emission of a single photon using this integrated circuit.

    Production of field effect transistors with reduced short channel effects and offering an elevated degree of integration for Silicon On Insulator integrated circuits
    23.
    发明专利
    Production of field effect transistors with reduced short channel effects and offering an elevated degree of integration for Silicon On Insulator integrated circuits 未知

    公开(公告)号：FR2865850A1

    公开(公告)日：2005-08-05

    申请号：FR0401018

    申请日：2004-02-03

    Applicant: ST MICROELECTRONICS SA

    Inventor： SKOTNICKI THOMAS ,  CHANEMOUGAME DANIEL ,  MONFRAY STEPHANE

    IPC: H01L21/336 ,  H01L29/786 ,  H01L29/423

    Abstract: The production of a field effect transistor comprises: (A) obtaining a conductor substrate (100) supporting a portion of semiconductor material above a surface (S), with a portion of temporary material between it and the substrate; (B) forming a gate (2) comprising an upper part (C) in rigid liaison with the semiconductor material and a support part (A) resting on the substrate, the gate being obtained such that it is electrically insulated with respect to the semiconductor material and the conductor substrate; (C) removing the temporary material, the gate assuring the retention of the semiconductor material portion with respect to the substrate, in a manner to create an empty space between the semiconductor material portion and the substrate in place of the temporary material; (D) filling, at least partially, the empty space with an insulating material. Independent claims are also included for: (A) a field effect transistor produced by the method; (B) an integrated circuit incorporating this field effect transistor.

    25.
    发明专利
    未知

    公开(公告)号：FR2819341A1

    公开(公告)日：2002-07-12

    申请号：FR0100295

    申请日：2001-01-11

    Applicant: ST MICROELECTRONICS SA

    Inventor： SKOTNICKI THOMAS ,  MONFRAY STEPHANE ,  MALLARDEAU CATHERINE

    IPC: H01L21/8242 ,  H01L27/108

    Abstract: A process for making a DRAM-type cell includes growing layers of silicon germanium and layers of silicon, by epitaxy from a silicon substrate; superposing a first layer of N+ doped silicon and a second layer of P doped silicon; and forming a transistor on the silicon substrate. The method also includes etching a trench in the extension of the transistor to provide an access to the silicon germanium layers relative to the silicon layers over a pre-set depth to form lateral cavities, and forming a capacitor in the trench and in the lateral cavities.

    29.
    发明专利
    未知

    公开(公告)号：FR2857952B1

    公开(公告)日：2005-12-16

    申请号：FR0309106

    申请日：2003-07-25

    Applicant: ST MICROELECTRONICS SA

    Inventor： MONFRAY STEPHANE ,  ANCEY PASCAL ,  SKOTNICKI THOMAS ,  SEGUENI KARIM

    IPC: B81B3/00 ,  H03H9/24 ,  H03H3/007

    Abstract: The resonator has a monocrystalline silicon substrate provided with an active zone surrounded by a shallow trench isolation region (STI). A vibrating beam is anchored on the region by one of free ends (14, 16) and comprises a monocrystalline silicon median part (12). A control electrode (E) is placed above the beam and is supported on the active zone. The median part is separated from the active zone and the electrode. An independent claim is also included for a method of manufacturing an electromechanical resonator.

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