公开(公告)号：US10020200B1

公开(公告)日：2018-07-10

申请号：US14966165

申请日：2015-12-11

Applicant: Multibeam Corporation

Inventor： Kevin M. Monahan ,  Theodore A. Prescop ,  Michael C. Smayling ,  David K. Lam

IPC: H01L21/3065 ,  H01L21/02 ,  H01L21/308 ,  H01L21/66

CPC classification number: H01L21/3065 ,  B81C1/00373 ,  B81C2201/0143 ,  B81C2201/0188 ,  C23C14/48 ,  C23C16/047 ,  C23C16/48 ,  C23C16/486 ,  C23C16/487 ,  H01J37/05 ,  H01J37/06 ,  H01J37/08 ,  H01J37/228 ,  H01J37/244 ,  H01J37/30 ,  H01J37/304 ,  H01J37/305 ,  H01J37/3053 ,  H01J37/3056 ,  H01J37/3172 ,  H01J37/3174 ,  H01J37/3177 ,  H01J37/3178 ,  H01J2237/004 ,  H01J2237/0635 ,  H01J2237/1501 ,  H01J2237/24592 ,  H01J2237/30466 ,  H01J2237/30472 ,  H01J2237/31708 ,  H01J2237/31732 ,  H01J2237/31735 ,  H01J2237/31737 ,  H01J2237/3174 ,  H01J2237/31749 ,  H01L21/0228 ,  H01L21/0262 ,  H01L21/26 ,  H01L21/308 ,  H01L21/3085 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26

Abstract: Methods and systems for direct atomic layer etching and deposition on or in a substrate using charged particle beams. Electrostatically-deflected charged particle beam columns can be targeted in direct dependence on the design layout database to perform atomic layer etch and atomic layer deposition, expressing pattern with selected 3D-structure. Reducing the number of process steps in patterned atomic layer etch and deposition reduces manufacturing cycle time and increases yield by lowering the probability of defect introduction. Local gas and photon injectors and detectors are local to corresponding columns, and support superior, highly-configurable process execution and control.

公开(公告)号：US09679779B2

公开(公告)日：2017-06-13

申请号：US13797549

申请日：2013-03-12

Applicant: The Aerospace Corporation

Inventor： David P. Taylor ,  Margaret H. Abraham

IPC: H01L21/285 ,  B81C1/00 ,  C23C16/01 ,  C23C16/18 ,  C23C16/48 ,  H01L21/3065 ,  C23C16/04 ,  C23C16/46 ,  H01L27/13 ,  H01L49/02 ,  G01J5/02 ,  G02B5/28

CPC classification number: H01L21/28506 ,  B81B2203/0109 ,  B81C1/00373 ,  B81C2201/0176 ,  B81C2201/0188 ,  C23C16/01 ,  C23C16/04 ,  C23C16/18 ,  C23C16/46 ,  C23C16/481 ,  C23C16/483 ,  G01J5/024 ,  G02B5/285 ,  H01L21/3065 ,  H01L27/13 ,  H01L28/40 ,  H01L28/87

Abstract: Embodiments of the present invention provide systems and methods for depositing materials on either side of a freestanding film using selectively thermally-assisted chemical vapor deposition (STA-CVD), and structures formed using same. A freestanding film, which is suspended over a cavity defined in a substrate, is exposed to a fluidic CVD precursor that reacts to form a solid material when exposed to heat. The freestanding film is then selectively heated in the presence of the precursor. The CVD precursor preferentially deposits on the surface(s) of the freestanding film.

公开(公告)号：US09663357B2

公开(公告)日：2017-05-30

申请号：US14963362

申请日：2015-12-09

Applicant: Texas Instruments Incorporated

Inventor： Jie Mao ,  Hau Nguyen ,  Luu Nguyen ,  Anindya Poddar

IPC: H01L21/683 ,  B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00873 ,  B81B7/007 ,  B81B2201/0214 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0278 ,  B81B2201/0292 ,  B81B2201/047 ,  B81B2207/07 ,  B81B2207/098 ,  B81C1/00333 ,  B81C2201/0125 ,  B81C2201/0132 ,  B81C2201/0159 ,  B81C2201/0181 ,  B81C2201/0188 ,  B81C2203/0136 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/3121 ,  H01L24/19 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/96 ,  H01L2924/3511

Abstract: A method for fabricating packaged semiconductor devices (100) with an open cavity (110a) in panel format; placing (process 201) on an adhesive carrier tape a panel-sized grid of metallic pieces having a flat pad (230) and symmetrically placed vertical pillars (231); attaching (process 202) semiconductor chips (101) with sensor systems face-down onto the tape; laminating (process 203) and thinning (process 204) low CTE insulating material (234) to fill gaps between chips and grid; turning over (process 205) assembly to remove tape; plasma-cleaning assembly front side, sputtering and patterning (process 206) uniform metal layer across assembly and optionally plating (process 209) metal layer to form rerouting traces and extended contact pads for assembly; laminating (process 212) insulating stiffener across panel; opening (process 213) cavities in stiffener to access the sensor system; and singulating (process 214) packaged devices by cutting metallic pieces.

公开(公告)号：US09567213B1

公开(公告)日：2017-02-14

申请号：US14827683

申请日：2015-08-17

Applicant: Texas Instruments Incorporated

Inventor： John Charles Ehmke ,  Virgil Cotoco Ararao

IPC: H01L21/00 ,  H01L21/44 ,  H01L21/31 ,  G02B6/12 ,  G02B5/124 ,  G09G3/34 ,  H01J5/00 ,  H01L23/02 ,  B81C1/00 ,  B81B7/00 ,  G02B26/08 ,  G02B6/42 ,  G02B26/00 ,  B82Y30/00

CPC classification number: B81B7/0038 ,  B81B2203/0315 ,  B81C1/00269 ,  B81C1/00285 ,  B81C1/00293 ,  B81C2201/0108 ,  B81C2201/013 ,  B81C2201/0188 ,  B81C2201/0198 ,  B81C2201/053 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/035 ,  B82Y30/00 ,  G02B6/4204 ,  G02B6/4208 ,  G02B6/4248 ,  G02B26/001 ,  G02B26/0833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/039 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05109 ,  H01L2224/05123 ,  H01L2224/05138 ,  H01L2224/05163 ,  H01L2224/05166 ,  H01L2224/0517 ,  H01L2224/05562 ,  H01L2224/27462 ,  H01L2224/2747 ,  H01L2224/279 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/29109 ,  H01L2224/29144 ,  H01L2224/32058 ,  H01L2224/32227 ,  H01L2224/83121 ,  H01L2224/83193 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/94 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01074 ,  H01L2924/1461 ,  H01L2924/164 ,  H01L2924/00014 ,  H01L2924/01049 ,  H01L2224/03 ,  H01L2924/01042 ,  H01L2924/01072 ,  H01L2924/01004 ,  H01L2224/83 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03462

Abstract: A hermetic package comprising a substrate (110) having a surface with a MEMS structure (101) of a first height (101a), the substrate hermetically sealed to a cap (120) forming a cavity over the MEMS structure; the cap attached to the substrate surface by a vertical stack (130) of metal layers adhering to the substrate surface and to the cap, the stack having a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance (140); the stack having a bottom first metal seed film (131a) adhering to the substrate and a bottom second metal seed film (131b) adhering to the bottom first seed film, both seed films of a first width (131c) and a common sidewall (138); further a top first metal seed film (132a) adhering to the cap and a top second metal seed film (132b) adhering to the top first seed film, both seed films with a second width (132c) smaller than the first width and a common sidewall (139); the bottom and top metal seed films tied to a metal layer (135) including gold-indium intermetallic compounds, layer (135) having a second height (133a) greater than the first height and encasing the seed films and common sidewalls.

Abstract translation: 一种密封包装，其包括具有具有第一高度（101a）的MEMS结构（101）的表面的基底（110），所述基底被气密地密封到在所述MEMS结构上形成空腔的帽（120） 所述盖通过粘附到所述基板表面和所述盖的金属层的垂直堆叠（130）附接到所述基板表面，所述堆叠具有围绕所述MEMS结构的连续轮廓，同时与所述MEMS结构隔开距离（140）; 所述堆叠具有附着到所述基板的底部第一金属种子膜（131a）和粘附到所述底部第一种子膜的底部第二金属种子膜（131b），具有第一宽度（131c）和公共侧壁（138）的两种种子膜 ）; 另外，粘附到盖的顶部第一金属种子膜（132a）和粘附到顶部第一种子膜的顶部第二金属种子膜（132b），具有小于第一宽度的第二宽度（132c）的两种种子膜和共同的 侧壁（139）; 连接到包括金 - 铟金属间化合物的金属层（135）的底部和顶部金属种子膜，具有大于第一高度的第二高度（133a）的层（135）并且包围种子膜和共同侧壁。

公开(公告)号：US09321634B2

公开(公告)日：2016-04-26

申请号：US14608841

申请日：2015-01-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： William J. Gallagher ,  Eugene J. O'Sullivan ,  Naigang Wang

IPC: H01L21/00 ,  B81C1/00 ,  H01L43/14 ,  B81B3/00 ,  H01L43/10 ,  H01L43/12 ,  H01L49/02 ,  H01F41/04

CPC classification number: B81C1/00373 ,  B81B3/0021 ,  B81B2201/038 ,  B81B2203/0118 ,  B81C1/00142 ,  B81C1/00706 ,  B81C2201/0188 ,  H01F41/046 ,  H01L28/10 ,  H01L43/10 ,  H01L43/12 ,  H01L43/14

Abstract: A micro-electromechanical device and method of manufacture are disclosed. A sacrificial layer is formed on a silicon substrate. A metal layer is formed on a top surface of the sacrificial layer. Soft magnetic material is electrolessly deposited on the metal layer to manufacture the micro-electromechanical device. The sacrificial layer is removed to produce a metal beam separated from the silicon substrate by a space.

公开(公告)号：US20140264676A1

公开(公告)日：2014-09-18

申请号：US13796496

申请日：2013-03-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： William J. Gallagher ,  Eugene J. O'Sullivan ,  Naigang Wang

IPC: H01L43/12 ,  H01L43/10

CPC classification number: B81C1/00373 ,  B81B3/0021 ,  B81B2201/038 ,  B81B2203/0118 ,  B81C1/00142 ,  B81C1/00706 ,  B81C2201/0188 ,  H01F41/046 ,  H01L28/10 ,  H01L43/10 ,  H01L43/12 ,  H01L43/14

Abstract: A micro-electromechanical device and method of manufacture are disclosed. A sacrificial layer is formed on a silicon substrate. A metal layer is formed on a top surface of the sacrificial layer. Soft magnetic material is electrolessly deposited on the metal layer to manufacture the micro-electromechanical device. The sacrificial layer is removed to produce a metal beam separated from the silicon substrate by a space.

Abstract translation: 公开了一种微机电装置及其制造方法。 在硅衬底上形成牺牲层。 在牺牲层的顶表面上形成金属层。 将软磁性材料无电沉积在金属层上以制造微机电装置。 除去牺牲层以产生与硅衬底分离的金属束。

公开(公告)号：WO2011162095A1

公开(公告)日：2011-12-29

申请号：PCT/JP2011/063024

申请日：2011-06-07

Applicant: 独立行政法人科学技術振興機構 ,  生田幸士 ,  池内真志

Inventor： 生田幸士 ,  池内真志

IPC: B29C67/00

CPC classification number: B29C67/0081 ,  A61M2037/0023 ,  A61M2037/0053 ,  B29C64/135 ,  B29L2031/7544 ,  B33Y10/00 ,  B33Y70/00 ,  B81B2201/055 ,  B81C1/00373 ,  B81C2201/0188 ,  Y10T428/2933 ,  Y10T428/31678

Abstract: 　反応基Ｘを備えた光硬化性樹脂を用いて光造形法によりポリマー構造体を形成し、これを反応基Ｘと結合する反応基Ｘ'を備えた金属含有ナノ粒子の液中に浸漬して、反応基Ｘと反応基Ｘ'との結合によりポリマー構造体上に金属含有層を形成する３次元ポリマー－金属複合マイクロ構造体の製造方法。　この方法により、立体構造を持つポリマー－金属複合構造体を製造でき、金属複合化過程で生体分子を変性させない３次元ポリマー－金属複合マイクロ構造体を製造できる。

Abstract translation: 一种制备三维聚合物 - 金属复合微结构的方法，包括：通过使用包含反应性基团（X）的光固化树脂的光制造方法形成聚合物结构; 将聚合物结构浸渍在含有具有反应性基团（X'）的含金属纳米颗粒的液体中，所述反应性基团（X'）能够结合反应性基团（X）; 以及通过将反应性基团（X）与反应性基团（X'）的结合在聚合物结构上形成含金属层。 根据该方法，可以制造具有三维结构的聚合物 - 金属络合物结构。 即，可以在形成复合金属材料的过程中生成三维聚合物 - 金属复合微结构，而不使生物分子变性。

公开(公告)号：WO2009000969A1

公开(公告)日：2008-12-31

申请号：PCT/FI2008/050383

申请日：2008-06-23

Applicant: CANATU OY ,  BROWN, David P. ,  OLLIKAINEN, Andrei ,  KAUPPINEN, Esko I. ,  NASIBULIN, Albert G. ,  HEIKKONEN, Jussi

Inventor： BROWN, David P. ,  OLLIKAINEN, Andrei ,  KAUPPINEN, Esko I. ,  NASIBULIN, Albert G. ,  HEIKKONEN, Jussi

IPC: B82B3/00 ,  H01L51/50 ,  B32B9/00 ,  C08J5/18

CPC classification number: B81C1/00357 ,  B81C1/00373 ,  B81C1/00476 ,  B81C1/00492 ,  B81C2201/0187 ,  B81C2201/0188 ,  B81C2201/0194 ,  C01B32/15 ,  C01B32/168 ,  C01P2004/13 ,  C01P2004/16 ,  C04B14/026 ,  C04B30/02 ,  C04B2111/00844 ,  C04B2111/00853 ,  Y10T428/24802

Abstract: A method for the production of a fibrous network- substrate component. The method comprises the steps of providing a network of fibrous material (1) on a preliminary substrate (2) by filtering high aspect ratio molecular structures (HARM-structures) from gas flow, placing the network of fibrous material (1) on the preliminary substrate (2) in proximity to a secondary substrate (3), applying a force to the network of fibrous material (1) to preferably attract the network of fibrous material (1) from the preliminary substrate (2) to the secondary substrate (3) in order to transfer the network of fibrous material (1) from the preliminary substrate (2) to the secondary substrate (3), and removing the preliminary substrate (2) from the network of fibrous material (1).

Abstract translation: 一种生产纤维网状基材组分的方法。 该方法包括以下步骤：通过从气流中过滤高纵横比分子结构（HARM结构），将纤维材料网（1）放置在预备的基底（2）上，从而在预备基底（2）上提供纤维材料网（1） 在第二基底（3）附近的衬底（2），向纤维材料（1）的网络施加力以优选地将纤维材料（1）的网络从预备衬底（2）吸引到次级衬底（3） ）以将纤维材料（1）的网络从预备衬底（2）转移到第二衬底（3），并从纤维材料（1）的网络去除预备衬底（2）。

公开(公告)号：EP3234968A1

公开(公告)日：2017-10-25

申请号：EP15816399.8

申请日：2015-12-11

Applicant: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.

Inventor： LISEC, Thomas ,  QUENZER, Hans-Joachim ,  REIMER, Tim

IPC: H01F41/04 ,  B81C1/00 ,  H01F41/16 ,  H01F41/30

CPC classification number: H01F1/06 ,  B81B2201/034 ,  B81B2201/042 ,  B81C1/00126 ,  B81C2201/0188 ,  G01R33/38 ,  G01R33/3802 ,  G02B26/085 ,  G02B26/101 ,  H01F10/08 ,  H01F21/06 ,  H01F41/046 ,  H01F41/16 ,  H01F41/301 ,  H01F41/32 ,  H01F2007/068 ,  H02K15/02 ,  H02K33/16

Abstract: The invention relates to a method for producing a device (120) having a three-dimensional magnetic structure (132), comprising a step of applying magnetic particles (130) onto or into a carrier element (122), wherein a plurality of hollow spaces that are at least partially connected to one another are formed between the magnetic particles, and wherein the magnetic particles are brought into contact with one another at contact points. The method also comprises a step of joining the magnetic particle at the contact points by coating the assembly formed by magnetic particles and the carrier element, wherein the hollow spaces are penetrated at least partially by the layer generated by the coating. The device comprises a conductor loop assembly (124) on the carrier element or a further carrier element, such that in the event of a current flow through the conductor loop assembly (1), an inductivity of the conductor loop assembly is altered by the three-dimensional magnetic structure, or (2) a force acts on the three-dimensional magnetic structure or the conductor loop assembly via a magnetic field generated by the current flow, or (3) in the event of a change of position of the three-dimensional magnetic structure, a current flow is induced via the conductor loop assembly.

Abstract translation: 本发明涉及一种用于制造具有三维磁结构（132）的装置（120）的方法，包括将磁性颗粒（130）施加到载体元件（122）上或载体元件（122）中的步骤，其中多个空腔 至少部分彼此连接的所述磁性颗粒形成在所述磁性颗粒之间，并且其中所述磁性颗粒在接触点处彼此接触。 该方法还包括通过涂覆由磁性颗粒和载体元件形成的组件而在接触点处接合磁性颗粒的步骤，其中，中空空间至少部分地被涂层产生的层穿透。 该装置包括在载体元件或另一载体元件上的导体环组件（124），使得在电流流过导体环组件（1）的情况下，导体环组件的感应性被三个 或（2）力通过由电流产生的磁场作用于三维磁结构或导体环组件，或（3）在三维磁结构的位置改变的情况下， 通过导体环组件引起电流流动。

公开(公告)号：EP3109200A1

公开(公告)日：2016-12-28

申请号：EP16170650.2

申请日：2016-05-20

Applicant: Nivarox-FAR S.A.

Inventor： Gandelhman, Alex ,  Pin, André

IPC: B81C99/00 ,  B81C1/00

CPC classification number: B81C1/00619 ,  B81B2201/035 ,  B81B2203/0384 ,  B81C1/00103 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/0138 ,  B81C2201/014 ,  B81C2201/0188 ,  B81C2201/0198 ,  G04B13/02 ,  G04B13/026 ,  G04B13/027 ,  G04D99/00

Abstract: L'invention se rapporte à une pièce à base de silicium avec au moins une surface de contact diminuée qui, formée à partir d'un procédé combinant au moins une étape de gravage de flancs obliques avec un gravage du type « Bosch » de flancs verticaux, permet notamment l'amélioration tribologique de pièces formées par micro-usinage d'une plaquette à base de silicium.

Abstract translation: 本发明涉及一种具有至少一个还原接触表面的硅基组分，其通过将至少一个斜侧壁蚀刻步骤与垂直侧壁的“博世”蚀刻相结合的方法形成，特别是改进了摩擦学 通过微加工硅基晶片形成的部件。