公开(公告)号：DE102006022067B4

公开(公告)日：2011-11-10

申请号：DE102006022067

申请日：2006-05-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEITZER LUDWIG DIPL ING ,  STUEMPFL CHRISTIAN ,  BAUER MICHAEL DIPL ING

IPC: H01L21/60 ,  C09J9/02 ,  H01L23/48

Abstract: Herstellungsverfahren für ein elektronisches Bauelement mit einem auf einer Substratoberfläche (2) aufkontaktierten und befestigten Halbleiterelement (1), mit einem rückseitigen Beschichten des Halbleiterelementes und/oder der Substratoberfläche mit einer klebenden Struktur aus einer Klebstoffkombination, die eine sich verfestigende, erste Komponente (3) und eine elektrisch leitfähige, sich nicht verfestigende zweite Komponente (4) mit einem hochviskos und dauerklebrig bleibenden Haftklebstoff aufweist, und mit einem kontaktierenden Aufkleben des Halbleiterelementes auf die Substratoberfläche.

公开(公告)号：DE102006022067A1

公开(公告)日：2007-11-15

申请号：DE102006022067

申请日：2006-05-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEITZER LUDWIG ,  STUEMPFL CHRISTIAN ,  BAUER MICHAEL

IPC: H01L21/60 ,  H01L23/48

Abstract: The production of an electronic component with a semiconductor element (1) bonded and fastened on a substrate, comprises applying a structured gold layer (5) on the substrate surface, reversible spray coating of the semiconductor element and/or the substrate surface (2) with an adhesive structure from a hardening or curing component (3) and an electrically conductive, non-curing component (4), producing a border area section-wise coated with the curing component by a shadow panel, and central area section-wise coated with the non-curing component by a perforated sheet. The production of an electronic component with a semiconductor element (1) bonded and fastened on a substrate, comprises applying a structured gold layer (5) on the substrate surface, reversible spray coating of the semiconductor element and/or the substrate surface (2) with an adhesive structure from a hardening or curing component (3) and an electrically conductive, non-curing component (4), producing a border area section-wise coated with the curing component by a shadow panel, and central area section-wise coated with the non-curing component by a perforated sheet, and producing an alternating adhesive structure with strips out of the components. The curing component is ultraviolet (UV) or infrared (IR) networked. For hardening the curing component, an UV radiation of the adhesive layer is carried out. An independent claim is included for an electronic component.

公开(公告)号：DE102005050127B3

公开(公告)日：2007-05-16

申请号：DE102005050127

申请日：2005-10-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUER MICHAEL ,  STROBEL PETER ,  POHL JENS ,  STUEMPFL CHRISTIAN ,  HEITZER LUDWIG

IPC: H01L21/58

Abstract: A structure of joining material is applied to the back surfaces of semiconductor chips in manufacturing semiconductor devices. The joining material is applied, in finely metered and structured form via a joining material jet appliance, to the back surfaces of the semiconductor chips of a divided semiconductor wafer.

公开(公告)号：DE10133791B4

公开(公告)日：2007-04-19

申请号：DE10133791

申请日：2001-07-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GROENINGER HORST ,  OFNER GERALD ,  STUEMPFL CHRISTIAN

IPC: H01L23/50 ,  H01L21/48 ,  H01L21/60 ,  H01L23/498 ,  H05K3/34

公开(公告)号：DE102005050637A1

公开(公告)日：2006-11-09

申请号：DE102005050637

申请日：2005-10-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POHL JENS ,  ESCHER-POEPPEL IRMGARD ,  BRUNNBAUER MARKUS ,  BAUER MICHAEL ,  STUEMPFL CHRISTIAN

IPC: H01L23/50 ,  H01L21/50 ,  H01L23/498 ,  H01L25/065

Abstract: The module (1) includes a wiring substrate (3), solder balls (4) and a plastic housing (5). The plastic housing is arranged on the wiring substrate and includes a shaping (6). The plastic housing has an area (8) that is higher than another area (9). The solder balls in the area have ball sections that protrude out of a socket contact surface (11). An independent claim is also included for a semiconductor module manufacturing method.

公开(公告)号：DE102005015455A1

公开(公告)日：2006-10-12

申请号：DE102005015455

申请日：2005-04-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUER MICHAEL ,  STROBEL PETER ,  POHL JENS ,  STUEMPFL CHRISTIAN ,  HEITZER LUDWIG

IPC: H01L23/06 ,  B29C70/64 ,  C08K3/04 ,  C08K3/08 ,  C08K5/3477 ,  C08K5/357 ,  H01L21/48 ,  H01L23/60

Abstract: A plastic housing includes plastic external faces and the underside of the plastic housing comprises external contact areas on which external contacts are arranged. The plastic external faces are covered by a closed metal layer apart from the underside, wherein the boundary layer between plastic external faces and the closed metal layer includes exposed electrically conductive inclusions of the plastic of the housing.

公开(公告)号：DE102004046227B3

公开(公告)日：2006-04-20

申请号：DE102004046227

申请日：2004-09-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FUERGUT EDWARD ,  VILSMEIER HERMANN ,  JEREBIC SIMON ,  BAUER MICHAEL ,  BEMMERL THOMAS ,  THEUSS HORST ,  STUEMPFL CHRISTIAN

IPC: H01L21/60 ,  H01L21/48 ,  H01L23/50

公开(公告)号：DE10243947A1

公开(公告)日：2003-05-28

申请号：DE10243947

申请日：2002-09-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  THUMBS JOSEF ,  WEIN STEFAN ,  WOERNER HOLGER

IPC: H01L21/60 ,  H01L23/31 ,  H01L23/49 ,  H01L23/50

Abstract: The electronic component (2) comprises a flat chip carrier (6) assigned to a semiconductor chip (4). The contact areas (43) on active chip surface (41) and the contact terminal areas (63) on an upper side (61) of the chip carrier, are formed by elastic strips (81) of material that can undergo microstructuring. The strips are provided with an electrically conductive coating. An Independent claim is also included for electronic component manufacturing method.

公开(公告)号：DE10142120A1

公开(公告)日：2003-03-27

申请号：DE10142120

申请日：2001-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  THUMBS JOSEF ,  WEIN STEFAN ,  WOERNER HOLGER

IPC: H01L25/065 ,  H01L23/50

Abstract: A passive back side of a semiconductor chip (4) is fastened to a top side (81) of a carrier substrate (8) and a passive back side (63) of a semiconductor chip (6) is fastened to an active chip surface (41) of chip (4) through a stacking layer (44). The bonding wires (101,102) conductively connect the chips to the top side of the carrier substrate. An Independent claim is also included for method of fabricating electronic component.

公开(公告)号：DE10142118A1

公开(公告)日：2003-03-27

申请号：DE10142118

申请日：2001-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOLLER BERND ,  HAGEN ROBERT-CHRISTIAN ,  OFNER GERALD ,  STUEMPFL CHRISTIAN ,  THUMBS JOSEF ,  WEIN STEFAN ,  WOERNER HOLGER

IPC: H01L25/065 ,  H01L23/50

Abstract: An electronic component has a carrier substrate to accommodate two semiconductor chips that are connected to each other. The second semiconductor chip rests with two opposite marginal supporting regions on an upper side of the carrier substrate. The first semiconductor chip is disposed at a distance from a frame of the carrier substrate, in a central recess in the latter. A process for the production of the electronic component is further described.