-
公开(公告)号：KR101472799B1
公开(公告)日：2014-12-16
申请号：KR1020080054863
申请日：2008-06-11
Applicant: 삼성전자주식회사 , 재단법인서울대학교산학협력재단
CPC classification number: G09G3/3233 , G09G3/2037 , G09G3/2081 , G09G2300/0842
Abstract: 디스플레이장치는 OLED(Organic Light Emitting Diode), 화상신호에의해상기 OLED에대한전류공급을스위칭하는드라이빙트랜지스터, 상기 OLED에대한전류의량을제어하는복수의전류제어트랜지스터를포함하는전류제어부;를구비한다. 이러한구조에따르면종래비해높은해상도와깊은색감표현이가능한디스플레이의구현이가능하다.
-
公开(公告)号：KR101334177B1
公开(公告)日：2013-11-28
申请号：KR1020070016033
申请日：2007-02-15
Applicant: 삼성전자주식회사 , 재단법인서울대학교산학협력재단
IPC: H01L29/786
CPC classification number: H01L29/78621 , H01L29/42384 , H01L2029/7863
Abstract: 본 발명은 박막 트랜지스터 및 그 제조 방법에 관한 것이다. 하부 구조체; 상기 하부 구조체 상에 다수의 도핑 영역을 포함하여 형성된 반도체층; 상기 반도체층 상에 형성된 이격되어 형성된 제 1절연층 및 제 2절연층; 상기 제 1절연층 및 상기 제 2절연층 상에 형성된 제 3절연층; 및 상기 제 3절연층의 상기 제 1절연층 및 상기 제 2절연층에 대응되는 영역 사이에 형성된 게이트 전극층;을 포함하는 박막 트랜지스터를 제공한다.
-
公开(公告)号：KR1020090128888A
公开(公告)日：2009-12-16
申请号：KR1020080054863
申请日：2008-06-11
Applicant: 삼성전자주식회사 , 재단법인서울대학교산학협력재단
CPC classification number: G09G3/3233 , G09G3/2037 , G09G3/2081 , G09G2300/0842 , H01L27/3244 , H01L2027/11879 , H01L2227/323
Abstract: PURPOSE: An organic light emitting display device and a driving method thereof are provided to display the images with various colors by the gray scale of various steps by inserting at least one additional bit signal for an additional sub frame. CONSTITUTION: A driving transistor(T2) switches the current supply to an OLED by an image signal. A current controller includes a plurality of current control transistors(T3,T4) controlling an amount of currents to the OLED. A driving transistor operates in a linear region. Current control transistors operate at a saturation region. A storage capacitor stores an image signal. A switching transistor stores the image signal in a storage capacitor.
Abstract translation: 目的：提供一种有机发光显示装置及其驱动方法，通过插入附加子帧的至少一个附加位信号，通过各种步骤的灰度显示各种颜色的图像。 构成：驱动晶体管（T2）通过图像信号将电流源切换到OLED。 电流控制器包括控制到OLED的电流量的多个电流控制晶体管（T3，T4）。 驱动晶体管在线性区域中工作。 电流控制晶体管在饱和区域工作。 存储电容器存储图像信号。 开关晶体管将图像信号存储在存储电容器中。
-
公开(公告)号：KR1020080076292A
公开(公告)日：2008-08-20
申请号：KR1020070016033
申请日：2007-02-15
Applicant: 삼성전자주식회사 , 재단법인서울대학교산학협력재단
IPC: H01L29/786
CPC classification number: H01L29/78621 , H01L29/42384 , H01L2029/7863 , H01L29/78675
Abstract: A thin film transistor and a manufacturing method thereof are provided to change doping level for respective semiconductor layer regions by adjusting thickness and location of first, second, and third insulation layers. A thin film transistor comprises a lower structure(11), a semiconductor layer(12), first and second insulation layers(14a,14b), and a third insulation layer(16), and a gate electrode layer(17). The semiconductor layer includes a plurality of doped regions(12b,12c,12d) on the lower structure. The first and second insulation layers are formed on the semiconductor layer, separated from each other. The third insulation layer is formed on the first and second insulation layers. The gate electrode layer is formed on the third insulation layer between the first and second insulation layers. The width of the third insulation layer is longer than that between the first and second insulation layers and shorter than that between the left part of the first insulation layer and the right part of the second insulation layer.
Abstract translation: 提供薄膜晶体管及其制造方法，通过调整第一，第二和第三绝缘层的厚度和位置来改变各半导体层区域的掺杂水平。 薄膜晶体管包括下部结构（11），半导体层（12），第一和第二绝缘层（14a，14b）以及第三绝缘层（16）和栅电极层（17）。 半导体层包括在下部结构上的多个掺杂区域（12b，12c，12d）。 第一绝缘层和第二绝缘层形成在半导体层上，彼此分离。 第三绝缘层形成在第一和第二绝缘层上。 栅电极层形成在第一和第二绝缘层之间的第三绝缘层上。 第三绝缘层的宽度比第一绝缘层和第二绝缘层之间的宽度长，并且比第一绝缘层的左部分和第二绝缘层的右部分之间的宽度短。
-
公开(公告)号：KR101186292B1
公开(公告)日：2012-09-27
申请号：KR1020060002687
申请日：2006-01-10
Applicant: 삼성전자주식회사
IPC: H01L29/786 , H05B33/00
CPC classification number: H01L29/78645 , H01L27/1288 , H01L27/3244 , H01L29/78624 , H01L29/78696
Abstract: 트랜지스터와 트랜지스터의 제조방법 및 이를 이용하는 유기발광디스플레이에 관해 개시된다. 개시된 트랜지스터는 상호 나란하게 배치되어 각 양단에 도핑된 고전도 영역과 양 고전도 영역 사이의 채널 영역을 각각 가지는 두 개의 다결정 실리콘층; 두 다결정 실리콘층을 공히 가로지르는 방향으로 연장되는 게이트; 그리고 상기 게이트와 상기 다결정 실리콘층들의 사이에 개재되는 게이트 절연층;을 구비하고, 상기 게이트의 일측 가장자리에 인접하여 마련되는 것으로 다결정 실리콘의 채널 영역과 고전도 영역 사이에는 상호 마주 보는 저전도영역이 형성되어 있는 구조를 갖는다. 구조적으로 길이가 연장된 채널을 가지며 그리고 마스크 없이 형성가능한 오프셋구조 또는 저도핑영역을 갖는다.
OLED, 다결정,TFT, LDD-
Patent Agency Ranking
公开(公告)号：KR1020110045257A
公开(公告)日：2011-05-04
申请号：KR1020090101733
申请日：2009-10-26
Applicant: 삼성전자주식회사
IPC: H01L21/336 , H01L29/78
CPC classification number: H01L29/4232 , H01L21/02225 , H01L21/823412 , H01L29/41725
Abstract: PURPOSE: A transistor using a myelin layer is provided to form a gate insulating film, thereby operating a transistor with a low voltage. CONSTITUTION: A gate insulating film(130) includes a myelin layer. The gate insulating film is adjacent to a gate(120). A channel layer(140) is separated from the gate by the gate insulating film. The channel layer is formed of an organic semiconductor. A source(150) and a drain(160) are formed on both sides of the channel layer.
Abstract translation: 目的：提供使用髓磷脂层的晶体管以形成栅极绝缘膜，从而操作具有低电压的晶体管。 构成：栅绝缘膜（130）包括髓鞘层。 栅极绝缘膜与栅极（120）相邻。 沟道层（140）通过栅极绝缘膜与栅极分离。 沟道层由有机半导体形成。 源极（150）和漏极（160）形成在沟道层的两侧。
-
公开(公告)号：KR1020090056590A
公开(公告)日：2009-06-03
申请号：KR1020070123809
申请日：2007-11-30
Applicant: 삼성전자주식회사
IPC: H01L29/786
CPC classification number: H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02614 , H01L21/02631 , H01L21/02233
Abstract: A fabrication method of an oxide semiconductor thin film transistor is provided to control excess on the surface of a channel easily by process the surface of the channel with a wet oxidizer. An oxide semiconductor channel(22a), a source electrode(23a) and a drain electrode(23b) connected to the both sides of channel layer are formed on a substrate(10). The surface of a channel is oxidized by contacting an oxide material on the channel surface. The oxide material is one of a liquid oxidizer and SAM(Self Assembled Monolayer) on the channel surface.
Abstract translation: 提供氧化物半导体薄膜晶体管的制造方法，通过用湿氧化剂处理通道的表面，容易地控制通道表面上的过量。 在基板（10）上形成氧化物半导体沟道（22a），连接到沟道层两侧的源电极（23a）和漏电极（23b）。 通道的表面通过在通道表面上接触氧化物材料而被氧化。 氧化物材料是通道表面上的液体氧化剂和SAM（自组装单层）之一。
-
公开(公告)号：KR1020080104860A
公开(公告)日：2008-12-03
申请号：KR1020070052226
申请日：2007-05-29
Applicant: 삼성전자주식회사
IPC: H01L29/786
CPC classification number: H01L29/78696 , H01L21/02554 , H01L21/02565 , H01L21/0262 , H01L21/02631 , H01L29/7869
Abstract: A ZnO system thin film transistor and a manufacturing method thereof are provided to improve the electrical characteristic by suppressing the damage caused by the plasma effectively. A ZnO system thin film transistor comprises the substrate(10), the channel layer(22), the gate(20), the gate isolation layer(21), the source and drain electrodes(23a, 23b), and the passivation layer(24). The channel layer is formed on substrate. The channel layer comprises the multi laminated ZnO system unit semiconductor layer. The gate is built between the substrate and the channel layer. The gate isolation layer is prepared between the channel layer and the gate. The source and drain electrodes are prepared at both sides of the channel layer. The passivation layer covers the channel layer, source and drain electrodes. The upper most layer of the channel layer contains the ZnO with the concentration lower than the layer which is under the upper most layer.
Abstract translation: 提供一种ZnO系薄膜晶体管及其制造方法，能够有效地抑制等离子体的损伤来提高电气特性。 ZnO系薄膜晶体管包括衬底（10），沟道层（22），栅极（20），栅极隔离层（21），源极和漏极（23a，23b）和钝化层 24）。 沟道层形成在衬底上。 沟道层包括多层叠ZnO系单位半导体层。 栅极构建在衬底和沟道层之间。 在沟道层和栅极之间制备栅极隔离层。 源极和漏极准备在沟道层的两侧。 钝化层覆盖沟道层，源极和漏极。 沟道层的最上层含有浓度低于最上层的ZnO的ZnO。
-
公开(公告)号：KR1020080073142A
公开(公告)日：2008-08-08
申请号：KR1020070011794
申请日：2007-02-05
Applicant: 삼성전자주식회사
IPC: H01L21/205
CPC classification number: H01L21/02532 , H01L21/02422 , H01L21/02595 , H01L21/0262
Abstract: A method for manufacturing a polycrystalline silicon thin film is provided to improve throughput of a semiconductor device by forming a large sized polycrystalline silicon thin film on a thermally fragile substrate. A polycrystalline silicon thin film is formed on a substrate(10) by using a vapor deposition process at a vapor atmosphere of a silane source(12) containing silane radicals(14). At a first deposition atmosphere(100), a pressure is at between 22 mT and 100 mT and a silane source amount is adjusted to be 5 sccm and 30 sccm. Silane radicals are guided to collide with each other, such that silicon seed particles(20) are formed on the substrate. At a second deposition atmosphere, a pressure is at between 1 mT and 15 mT and a silane source amount is adjusted to be 1 sccm and 13 sccm. The silicon seed particles are grown on the substrate to form the polycrystalline silicon thin film.
Abstract translation: 提供一种制造多晶硅薄膜的方法，以通过在热脆性基板上形成大尺寸多晶硅薄膜来提高半导体器件的生产能力。 通过在含有硅烷自由基（14）的硅烷源（12）的蒸气气氛下进行气相沉积工艺，在基板（10）上形成多晶硅薄膜。 在第一沉积气氛（100）下，压力在22mT至100mT之间，硅烷源量调整为5sccm和30sccm。 引导硅烷基彼此碰撞，使得硅基颗粒（20）形成在基底上。 在第二沉积气氛下，压力在1mT至15mT之间，硅烷源量调节为1sccm和13sccm。 硅基颗粒在衬底上生长以形成多晶硅薄膜。
-
公开(公告)号：KR1020080046508A
公开(公告)日：2008-05-27
申请号：KR1020060116057
申请日：2006-11-22
Applicant: 삼성전자주식회사
CPC classification number: H01L27/1251 , H01L27/1214 , H01L27/1229 , H01L27/3244 , H01L29/04 , H01L29/78696
Abstract: A driving device for an unit pixel of an organic light emitting display and a method for manufacturing the same are provided to improve reliability and production yield by forming each channel of a switching transistor and a driving transistor in one process simultaneously. A driving device for an unit pixel of an organic light emitting display includes a switching transistor(101) and a driving transistor(102) which are coupled to each other. The switching transistor has a first dual channel layer(27a), a first gate electrode(20). The first dual channel has a first amorphous silicon layer(24a) and a first poly-crystal silicon layer(26a) which are sequentially stacked. The first gate electrode is formed on a lower part of the first dual channel layer, and is a counter part of the first amorphous silicon layer. The driving transistor has a second dual channel layer(27b), a second gate electrode(60). The second dual channel has a second amorphous silicon layer(24b) and a second poly-crystal silicon layer(26b) which are sequentially stacked. The second gate electrode is formed on a lower part of the second dual channel layer, and is a counter part of the second amorphous silicon layer.
Abstract translation: 提供有机发光显示器的单位像素的驱动装置及其制造方法，以通过同时在一个处理中形成开关晶体管和驱动晶体管的每个沟道来提高可靠性和生产率。 有机发光显示器的单位像素的驱动装置包括彼此耦合的开关晶体管（101）和驱动晶体管（102）。 开关晶体管具有第一双沟道层（27a），第一栅电极（20）。 第一双通道具有依次层叠的第一非晶硅层（24a）和第一多晶硅层（26a）。 第一栅电极形成在第一双沟道层的下部，并且是第一非晶硅层的对置部分。 驱动晶体管具有第二双沟道层（27b），第二栅电极（60）。 第二双通道具有依次层叠的第二非晶硅层（24b）和第二多晶硅层（26b）。 第二栅电极形成在第二双沟道层的下部，并且是第二非晶硅层的对置部分。
-
-
-
-
-
-
-
-
-
Search Results
82
records
(took 0.024 seconds)
