Abstract:
A Schottky barrier diode is provided with an epitaxially grown layer, which is formed on a substrate and has a mesa section, and a Schottky electrode formed on the mesa section. A distance between an end section of the Schottky electrode and an upper surface end section of the mesa section is 2μm or shorter. With a distance (x) of 2μm or shorter, the Schottky barrier diode having a remarkably reduced leak current, an improved breakdown voltage and excellent withstand voltage characteristics is provided.
Abstract:
구조가 간단하기 때문에 제조가 용이하고, 큰 발광 효율을 장기간 안정적으로 얻을 수 있는 발광 장치를 제공하기 위해, 질화물 반도체 기판(1)의 제1 주표면 측에, n형 질화물 반도체층(2)과, 질화물 반도체 기판에서 보아 n형 질화물 반도체층보다 멀리에 위치하는 p형 질화물 반도체층(6)과, n형 질화물 반도체층과 p형 질화물 반도체층(6) 사이에 위치하는 발광층(4)을 구비하고, 질화물 반도체 기판의 비저항이 0.5 Ω·cm 이하이며, p형 질화물 반도체층 측을 다운 실장하여, 질화물 반도체 기판의 제1 주표면과 반대측의 주표면인 제2 주표면(1a)으로부터 빛을 방출한다.
Abstract:
Disclosed is a group III nitride semiconductor device wherein leakage current from a Schottky electrode is reduced. In a high-electron-mobility transistor (11), a supporting substrate (13) is specifically composed of AlN, AlGaN and GaN. An AlYGa1-YN epitaxial layer (15) has a full width at half maximum of the (0002) plane XRD of not more than 150 sec. A GaN epitaxial layer (17) is formed between the gallium nitride supporting substrate and the AlYGa1-YN epitaxial layer (0
Abstract:
A III nitride semiconductor crystal having sizes of approximately a semiconductor device and a manufacturing method thereof, a III nitride semiconductor device and a manufacturing method thereof and a light emitting device. The method for manufacturing the III nitride semiconductor crystal includes a process of growing one or more of a III nitride semiconductor crystalline board (11) on a base board (1), a process of growing one layer or more layers of a III nitride semiconductor crystalline layer (12) on the III nitride semiconductor crystalline board (11), and a process of separating a III nitride semiconductor crystal (10) composed of the III nitride semiconductor crystalline board (11) and the III nitride semiconductor crystalline layer (12) from the base board (1). The III nitride semiconductor crystal (10) has a thickness of 10mum or more but not more than 600mum, and a width of 0.2mm or more but not more than 50mm. ® KIPO & WIPO 2007
Abstract:
본 반도체 디바이스(5)는 지지 기판(60)과, 지지 기판(60) 상에 배치된 도전층(50)과, 도전층(50) 상에 배치된 적어도 1층의 III족 질화물 반도체층(200)을 포함하고, III족 질화물 반도체층(200) 중 도전층(50)에 인접하는 도전층 인접 III족 질화물 반도체층(200c)은 n형 도전성을 가지며, 전위 밀도가 1×10 7 ㎝ -2 이하이고, 산소 농도가 5×10 18 ㎝ -3 이하이다. 이에 따라, 결정성이 높은 반도체층을 갖는 n-down형의 반도체 디바이스가 제공된다.
Abstract:
A semi-insulating nitride semiconductor substrate, a manufacturing method thereof, a nitride epitaxial substrate, and a field effect transistor are provided to prevent a mixing of oxygen and to grow a uniform crystal by maintaining a growing temperature into a high temperature. A mask is formed on a base substrate. In the mask, a cover part of a dot type or a stripe type having a diameter or a width of 10~100um is arranged with an interval of 250~2000um. A nitride semiconductor crystal is grown on the base substrate by supplying a gas containing a group 3 raw material gas, a group 5 raw material gas, and iron by an HVPE(Hydride Vapor Phase Epitaxy) method with a temperature 1040~1150°C. The base substrate is removed. A crystal surface except for the cover part is flattened in a temperature of 1090~1150°C.
Abstract:
A light-emitting device is disclosed which can be produced easily because of its simple structure and is capable of stably maintaining high luminous efficiency for a long time. The light-emitting device comprises, on the side of a first major surface of a nitride semiconductor substrate (1), an n-type nitride semiconductor layer (2), a p-type nitride semiconductor layer (6) placed farther than the n-type nitride semiconductor layer (2) from the nitride semiconductor substrate (1), and a light-emitting layer (4) arranged between the n-type nitride semiconductor layer (2) and the p-type nitride semiconductor layer (6). The nitride semiconductor substrate has a resistivity of not more than 0.5 Omega.cm. The light-emitting device is mounted with the p- type nitride semiconductor layer side down, so that light is emitted through a second major surface (1a) of the nitride semiconductor substrate which is opposite to the first major surface.
Abstract:
비저항 0.5 Ω·cm 이하의 질화물 반도체 기판(1)과, 질화물 반도체 기판의 제1 주표면 측에, n형 질화물 반도체층(3)과, 질화물 반도체 기판에서 보아 n형 질화물 반도체층(3)보다 멀리에 위치하는 p형 질화물 반도체층(5)과, n형 질화물 반도체층(3)과 p형 질화물 반도체층(5) 사이에 위치하는 발광층(4)을 구비하며, 질화물 반도체 기판(1) 및 p형 질화물 반도체층(5) 중 어느 한 쪽을 빛을 방출하는 톱 측에, 또 다른 쪽을 다운 측에 실장하고, 그 톱 측에 위치하는 전극이 하나로 구성된다. 이에 따라, 소형화가 가능하고, 또한 구조가 간단하기 때문에 제조가 용이하며, 큰 발광 효율을 장기간 안정적으로 얻을 수 있는 발광 소자를 얻을 수 있다.
Abstract:
Disclosed is a high-electron-mobility transistor having a high-purity channel layer and a high-resistance buffer layer. Specifically disclosed is a high-electron-mobility transistor (11) comprising a supporting base (13) composed of a gallium nitride, a buffer layer (15) composed of a first gallium nitride semiconductor, a channel layer (17) composed of a second gallium nitride semiconductor, a semiconductor layer (19) composed of a third gallium nitride semiconductor, and an electrode structure (a gate electrode (21), a source electrode (23) and a drain electrode (25)) for the transistor (11). The band gap of the third gallium nitride semiconductor is larger than that of the second gallium nitride semiconductor. The carbon concentration Nc1 in the first gallium nitride semiconductor is not less than 4 X 10^17 cm-3, and the carbon concentration Nc2 in the second gallium nitride semiconductor is less than 4 X 10^16 cm-3.