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    METHOD FOR MANUFACTURING FILM MASK WITH MASK FIELD
    1.
    发明专利
    METHOD FOR MANUFACTURING FILM MASK WITH MASK FIELD 失效

    公开(公告)号：JPH10261584A

    公开(公告)日：1998-09-29

    申请号：JP5301298

    申请日：1998-03-05

    Applicant: IBM

    Inventor： BAYER THOMAS ,  GRESCHNER JOHANN ,  KALT SAMUEL ,  MEISSNER KLAUS ,  PFEIFFER HANS

    IPC: G03F1/20 ,  G03F1/22 ,  H01L21/027 ,  H01L21/306 ,  G03F1/16

    Abstract: PROBLEM TO BE SOLVED: To easily form a support wall by forming a film mask with a mask field and a single-crystal silicon body, providing a support wall being covered with a film, forming the support wall by anisotropic plasma etching, and performing wet etching immediately before reaching the covering film of the support wall. SOLUTION: The support wall of a mask with a mask field 8 where a boundary is screened by a thin support wall 1 consists of a single-crystal silicon and is covered with a film 2 that is approximately 0.2 mm-2 μm thick. The support wall is formed by the anisotropic plasma etching of the single-crystal silicon body 1. Therefore, an opening that is approximately 400 μm deep with a vertical wall is etched into the silicon body. Plasma etching stops immediately before reaching the film 2 and the final thickness part before the film is eliminated by wet etching. A support wall being arranged accurately vertically to the film is formed easily, thus preventing the film from being damaged.

    System and method for tod clock steering
    3.
    发明专利
    System and method for tod clock steering 有权
    用于时间转向的系统和方法

    公开(公告)号：JP2007080264A

    公开(公告)日：2007-03-29

    申请号：JP2006243549

    申请日：2006-09-08

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： RONALD M SMITH SR ,  MARK S FARRELL ,  ENGLER EBERHARD ,  MEISSNER KLAUS

    IPC: G06F1/14

    CPC classification number: G06F1/14

    Abstract: PROBLEM TO BE SOLVED: To provide a system, a method and a computer program for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepped to a common oscillator. SOLUTION: The method includes computing a TOD clock offset value (d) to be added to a physical clock value (Tr) to obtain a logical TOD clock value (Tb), where the logical TOD clock value is adjustable without adjusting a stepping rate of the oscillator. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种用于为具有物理时钟提供时间基准的计算机系统的时间（TOD）时钟的系统，方法和计算机程序，所述物理时钟提供用于执行步进到 一个共同的振荡器。 解决方案：该方法包括计算要添加到物理时钟值（Tr）的TOD时钟偏移值（d）以获得逻辑TOD时钟值（Tb），其中逻辑TOD时钟值可调整而不调整 振荡器的步进率。 版权所有（C）2007，JPO＆INPIT

    CONTACT PROBE ARRANGEMENT
    4.
    发明专利
    CONTACT PROBE ARRANGEMENT 审中-公开

    公开(公告)号：JP2002098713A

    公开(公告)日：2002-04-05

    申请号：JP2001218755

    申请日：2001-07-18

    Applicant: IBM

    Inventor： BAYER THOMAS ,  GRESCHNER JOHANN DR ,  MEISSNER KLAUS ,  STEINER WERNER ,  STOEHR ROLAND

    IPC: G01R31/26 ,  G01R1/073 ,  G01R31/28 ,  H01L21/66

    Abstract: PROBLEM TO BE SOLVED: To provide a contact probe arrangement 1 for connecting electrically a test device to circular contact pads 2 of a device 3 to be tested. SOLUTION: The contact probes 4 are pressed perpendicularly onto the contact pads 2 in order to realize a low contact resistance, and can be bent in the transverse direction in regions 6a, 6b where the contact probes are installed in order to adjust the difference of heights of the contact pads 2 caused by a non-uniform surface of the device 3 to be tested. The contact probes 4 are installed in a guide groove 5. The guide groove 5 and the regions 6a, 6b are formed on a plane parallel to the plane of a guide groove 7, and covered with a protection plate. This constitution assures a contact probe array having a very high density. This kind of contact probe array can be used, for example, for detecting open and short in an electric circuit array of a microelectronic composite device.

    FIELD-EMISSION ELEMENT AND ITS FORMING METHOD AND USE
    5.
    发明专利
    FIELD-EMISSION ELEMENT AND ITS FORMING METHOD AND USE 失效

    公开(公告)号：JPH11260247A

    公开(公告)日：1999-09-24

    申请号：JP301999

    申请日：1999-01-08

    Applicant: IBM

    Inventor： BAYER THOMAS ,  GRESCHNER JOHANN DR ,  KALT SAMUEL ,  MEISSNER KLAUS ,  PAUL RUDOLF

    IPC: H01J9/02 ,  H01J1/304 ,  H01J3/02 ,  H01J29/04 ,  H01J31/12 ,  H01J1/30

    Abstract: PROBLEM TO BE SOLVED: To obtain a field-emission element of various types by which obstacles of prior art such as high leakage current or the like can be overcome. SOLUTION: This field-emission element contains plural tip parts 2 composed in each aperture 5 which are formed by a gate electrode. When a prescribed voltage between the gate and a cathode is applied, electrons are emitted from one or more tip parts 2 into a vacuum. The tip parts 2 are made of single- crystal silicon 1 or polycrystal line silicon, and all of them have nearly same the height and end in the boundary layer between single-crystal silicon 1 or polycrystal line silicon and an insulator 3, respectively. The plural tip parts 2 are formed through plasma etching without special lithographic process. The tip-part forming process can be applied to a substrate of an arbitrary size, so that this field-emission element can be applied to a flat panel display.

    FILM MASK FOR LITHOGRAPHY BY SHORT-WAVELENGTH RADIATION
    6.
    发明专利
    FILM MASK FOR LITHOGRAPHY BY SHORT-WAVELENGTH RADIATION 失效

    公开(公告)号：JPH10275773A

    公开(公告)日：1998-10-13

    申请号：JP5300198

    申请日：1998-03-05

    Applicant: IBM

    Inventor： GRESCHNER JOHANN ,  KALT SAMUEL ,  MEISSNER KLAUS ,  PAUL RUDOLF

    IPC: G03F1/16 ,  G03F1/20 ,  H01L21/027

    Abstract: PROBLEM TO BE SOLVED: To provide a film mask for electron beam lithography that has a high mechanical stability and a thin film thickness, cannot be subjected to stress, and allows a submicron structure body to be easily created without any rounding effect using a reactive ion etching method. SOLUTION: In the case of a film mask for forming a surface region using electron beams or particle beams, a silicon nitride layer 1 with a feedthrough opening for demarcating a mask pattern is provided on one surface of a semiconductor wafer 2 that is preferably made of silicon. A recess 3 in bath tub type is extended from the other surface of the semiconductor wafer 2 to a layer adhesion surface.

    Verfahren und Verarbeitungseinheit zur kontinuierlichen Bereitstellung eines Präzisionssystemakts
    8.
    发明专利
    Verfahren und Verarbeitungseinheit zur kontinuierlichen Bereitstellung eines Präzisionssystemakts 未知

    公开(公告)号：DE102012203531B4

    公开(公告)日：2016-02-11

    申请号：DE102012203531

    申请日：2012-03-06

    Applicant: IBM

    Inventor： GERWIG GÜNTER ,  VON BUTTLAR JOACHIM ,  LEHNERT FRANK ,  ENGLER EBERHARD ,  MEISSNER KLAUS

    IPC: G06F1/04

    Abstract: Die Erfindung betrifft ein Verfahren zur kontinuierlichen Bereitstellung eines Präzisionssystemtakts, der einem Prozessorkern (2) zugeordnet ist, wobei der Systemtakt ein Host-Taktregister (5) umfasst, das mithilfe eines Präzisionsoszillators aktualisiert wird, das Verfahren die Schritte des Bereitstellens eines Firmware-Taktregisters (6), des Hochzählens des Firmware-Taktregisters (6) bei jedem Hochzählen des Host-Taktregisters (5), der Überwachung von Ausfällen des Host-Taktregisters (5) und bei einem Ausfall des Host-Taktregisters (5) das kontinuierliche Hochzählen des Firmware-Taktregisters (6) mithilfe von Zeitsignalen des Prozessorkerns (2) sowie bei Empfang einer Anforderung auf Bereitstellung eines Taktwertes das Bereitstellen des Inhalts des Host-Taktregisters (5) umfasst, wenn kein Ausfall festgestellt wurde, und andernfalls den Inhalt des Firmware-Taktregisters (6).

    9.
    发明专利
    未知

    公开(公告)号：DE19538792C2

    公开(公告)日：2000-08-03

    申请号：DE19538792

    申请日：1995-10-18

    Applicant: IBM

    Inventor： BAYER THOMAS ,  GRESCHNER JOHANN ,  MEISSNER KLAUS ,  STEINER WERNER ,  STOEHR ROLAND

    IPC: G01R1/073 ,  G01R31/28 ,  H01L21/66 ,  H01R11/18

    Abstract: The invention relates to a contact probe arrangement for electrically connecting a test system with contact pads of a device to be tested. The contact probes are located in guide grooves. The guide grooves as well as areas are provided in a plane parallel to the surface of a guide plate and are covered by a protective plate. The contact probes may bend out laterally into the respective areas. This assures a very dense contact probe array. Contact probe arrays of this type may be used, for example, for detecting opens and shorts in integrated circuits or semiconductor chips. The invention overcomes the problem of adjusting for height differences in the contact pads caused by an uneven surface of the device to be tested.

    10.
    发明专利
    未知

    公开(公告)号：DE69427522D1

    公开(公告)日：2001-07-26

    申请号：DE69427522

    申请日：1994-04-11

    Applicant: IBM

    Inventor： BAYER THOMAS ,  GRESCHNER DR ,  MARTIN YVES ,  MEISSNER KLAUS ,  WEISS HELGA

    IPC: G01N1/00 ,  G01B1/00 ,  G01B7/34 ,  G01N27/00 ,  G01N37/00 ,  G01Q40/02 ,  H01L21/20

    Abstract: To allow faithfully the quantitative interpretation of the measuring results obtained by scanning force microscopes (STM) or atomic force microscopes (AFM) the probe tips used have to be exactly characterized before and after measuring since their size and shape may change during the measuring procedure. If the tips are cone-shaped, their diameter and their cone angle have to be known accurately. Described are calibration standards for profilometers, especially for STMs and AFMs, which are of high accuracy and which allow calibration measurements without frequently removing the probe tips. Methods of producing these calibration standards are shown and examples are given for the use of the calibration standards for measuring features in the sub-nanometer range or for calibrating profilometers.

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