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公开(公告)号:US11769040B2
公开(公告)日:2023-09-26
申请号:US16517431
申请日:2019-07-19
Applicant: NVIDIA Corp.
Inventor: Yakun Shao , Rangharajan Venkatesan , Nan Jiang , Brian Matthew Zimmer , Jason Clemons , Nathaniel Pinckney , Matthew R Fojtik , William James Dally , Joel S. Emer , Stephen W. Keckler , Brucek Khailany
CPC classification number: G06N3/049 , G06F9/44505 , G06F9/544 , G06N3/082
Abstract: A distributed deep neural net (DNN) utilizing a distributed, tile-based architecture implemented on a semiconductor package. The package includes multiple chips, each with a central processing element, a global memory buffer, and processing elements. Each processing element includes a weight buffer, an activation buffer, and multiply-accumulate units to combine, in parallel, the weight values and the activation values.
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公开(公告)号:US20230261794A1
公开(公告)日:2023-08-17
申请号:US17674167
申请日:2022-02-17
Applicant: NVIDIA Corp.
Inventor: Hans Eberle , Larry Robert Dennison , John Martin Snyder
CPC classification number: H04L1/1628 , H04L1/1835 , H04L1/1642
Abstract: Packet flows between a transmitter and a receiver in an unreliable and unordered switched packet network may be established as a result of receiving a second packet comprising a second memory operation on a memory address. The transmission of memory load command packets followed by memory store command packets in the packet flow may be serialized, and a synchronization operation may be executed between the transmitter and the receiver when a packet count at the receiver satisfies a number of data packets in the packet flow.
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公开(公告)号:US20230237313A1
公开(公告)日:2023-07-27
申请号:US18295145
申请日:2023-04-03
Applicant: NVIDIA Corp.
Inventor: Haoxing Ren , George Ferenc Kokai , Ting Ku , Walker Joseph Turner
IPC: G06N3/045 , G06F16/901 , G06F17/16
CPC classification number: G06N3/045 , G06F16/9024 , G06F17/16
Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.
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公开(公告)号:US11638028B2
公开(公告)日:2023-04-25
申请号:US17368129
申请日:2021-07-06
Applicant: NVIDIA Corp.
Inventor: Johan Pontus Andersson , Jim Nilsson , Tomas Guy Akenine-Möller
IPC: H04N19/513 , H04N19/132 , G06T15/06 , H04N19/423 , H04N19/182
Abstract: A method dynamically selects one of a first sampling order and a second sampling order for a ray trace of pixels in a tile where the selection is based on a motion vector for the tile. The sampling order may be a bowtie pattern or an hourglass pattern.
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公开(公告)号:US11636668B2
公开(公告)日:2023-04-25
申请号:US15986267
申请日:2018-05-22
Applicant: NVIDIA Corp.
Inventor: Varun Jampani , Hang Su , Deqing Sun , Ming-Hsuan Yang , Jan Kautz
IPC: G06V10/82 , G06N3/04 , G06T7/521 , G06V20/64 , G06V30/19 , G06N3/08 , G06T7/11 , G06T7/174 , G06F18/2415 , G06F18/2413
Abstract: A method includes filtering a point cloud transformation of a 3D object to generate a 3D lattice and processing the 3D lattice through a series of bilateral convolution networks (BCL), each BCL in the series having a lower lattice feature scale than a preceding BCL in the series. The output of each BCL in the series is concatenated to generate an intermediate 3D lattice. Further filtering of the intermediate 3D lattice generates a first prediction of features of the 3D object.
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公开(公告)号:US20230079196A1
公开(公告)日:2023-03-16
申请号:US18057079
申请日:2022-11-18
Applicant: NVIDIA Corp.
Inventor: Siva Kumar Sastry Hari , Iuri Frosio , Zahra Ghodsi , Anima Anandkumar , Timothy Tsai , Stephen W. Keckler , Alejandro Troccoli
IPC: G05D1/02 , G01S13/931 , G05D1/00 , B60W60/00 , G05B13/02
Abstract: Techniques to generate driving scenarios for autonomous vehicles characterize a path in a driving scenario according to metrics such as narrowness and effort. Nodes of the path are assigned a time for action to avoid collision from the node. The generated scenarios may be simulated in a computer.
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167.
公开(公告)号:US11594962B2
公开(公告)日:2023-02-28
申请号:US17580226
申请日:2022-01-20
Applicant: NVIDIA Corp.
Inventor: Sudhir Shrikantha Kudva , Nikola Nedovic , Sanquan Song
IPC: H02M3/155
Abstract: This disclosure relates to current flattening circuits for an electrical load. The current flattening circuits incorporate randomize various parameters to add noise onto the supply current. This added noise may act to reduce the signal to noise ratio in the supply current, increasing the difficulty of identifying a computational artifact signal from power rail noise.
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公开(公告)号:US20230053487A1
公开(公告)日:2023-02-23
申请号:US18046275
申请日:2022-10-13
Applicant: NVIDIA Corp.
Inventor: Nikola Nedovic , Sudhir Shrikantha Kudva
Abstract: Various implementations of a current flattening circuit are disclosed, including those utilizing a feedback current regulator, a feedforward current regulator, and a constant current source.
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公开(公告)号:US11507704B2
公开(公告)日:2022-11-22
申请号:US16856952
申请日:2020-04-23
Applicant: NVIDIA Corp.
Inventor: Nikola Nedovic , Sudhir Shrikantha Kudva
Abstract: Various implementations of a current flattening circuit are disclosed, including those utilizing a feedback current regulator, a feedforward current regulator, and a constant current source.
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公开(公告)号:US11506888B2
公开(公告)日:2022-11-22
申请号:US16578077
申请日:2019-09-20
Applicant: NVIDIA Corp.
Inventor: Eric Whitmire , Kaan Aksit , Michael Stengel , Jan Kautz , David Luebke , Ben Boudaoud
Abstract: A gaze tracking system for use by the driver of a vehicle includes an opaque frame circumferentially enclosing a transparent field of view of the driver, light emitting diodes coupled to the opaque frame for emitting infrared light onto various regions of the driver's eye gazing through the transparent field of view, and diodes for sensing intensity of infrared light reflected off of various regions of the driver's eye.
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