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公开(公告)号:US20240343558A1
公开(公告)日:2024-10-17
申请号:US18632684
申请日:2024-04-11
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Petteri KILPINEN , Marko PEUSSA , Antti IIHOLA , Altti TORKKELI
CPC classification number: B81B3/0072 , B81B3/001 , B81C1/00666 , B81C1/00968 , B81B2201/0235 , B81B2201/0242 , B81B2201/0264 , B81B2203/0307 , B81B2203/04 , B81B2207/096 , B81C2201/0109 , B81C2201/0132 , B81C2201/0133 , B81C2203/0109 , B81C2203/036
Abstract: A device is provided that includes a handle layer with at least one cavity and suspension structure, a patterned polycrystalline silicon (poly-Si) first device layer, where at least one structural element is suspended by the structure, and may include a seismic element. A second electrically insulating layer is present, followed by a second device layer of patterned single-crystal silicon (mono-Si) with at least one moveably suspended seismic element above the first layer. A cap layer finalizes the structure, with the handle layer, device layers, and the cap layer forming an enclosure's walls. The first and second insulating layers bond the handle and device layers. The enclosure includes at least one seismic element from the second device layer, and at least one static and moveable electrode for motion detection or causation, with the static electrode in the first device layer.
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公开(公告)号:US20240327206A1
公开(公告)日:2024-10-03
申请号:US18409384
申请日:2024-01-10
Applicant: Omnitron Sensors
Inventor: Trent Huang
IPC: B81C1/00
CPC classification number: B81C1/00301 , B81C2201/0133
Abstract: A system and method for fabricating a micro-electromechanical system (MEMS) device is disclosed. A device layer, a handle layer and a buried oxide layer between the handle layer and the device wafer are formed. A top trench is created in a top surface of the device layer. An oxide layer is created over the top surface of the device layer and the top trench. The top of the device layer and the top trench is coated with a polysilicon layer. The oxide layer of the top trench or the top of the device layer is selectively etched away to create a structure. A bottom trench is created through the handle layer under the structure.
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公开(公告)号:US12092460B2
公开(公告)日:2024-09-17
申请号:US17980045
申请日:2022-11-03
Applicant: The Charles Stark Draper Laboratory, Inc.
Inventor: Eugene H. Cook , Jonathan J. Bernstein , Mirela G. Bancu , Marc Steven Weinberg , William Sawyer
IPC: G01C19/5621 , B81B3/00 , B81C1/00 , G01C19/5628
CPC classification number: G01C19/5621 , B81B3/0097 , B81C1/00166 , G01C19/5628 , B81B2201/0242 , B81B2203/04 , B81B2207/096 , B81C2201/0132 , B81C2201/0133 , B81C2203/035 , B81C2203/036
Abstract: Methods for fabricating MEMS tuning fork gyroscope sensor system using silicon wafers. This provides the possibly to avoid glass. The sense plates can be formed in a device layer of a silicon on insulator (SOI) wafer or in a deposited polysilicon layer in a few examples.
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公开(公告)号:US20240158225A1
公开(公告)日:2024-05-16
申请号:US18075882
申请日:2022-12-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Jung-Hao CHANG , Weng-Yi CHEN
CPC classification number: B81C1/00476 , B81B7/02 , B81B2201/0257 , B81B2203/0315 , B81B2203/033 , B81B2203/0353 , B81B2207/01 , B81C2201/0108 , B81C2201/0132 , B81C2201/0133 , B81C2201/014 , B81C2201/0176
Abstract: A micro electro mechanical system (MEMS) device and a method for manufacturing the same are provided. The MEMS device includes a substrate, a polymer film on the substrate and having a lower surface facing toward the substrate, a cavity passing through the substrate, and coil structures on the substrate and in the polymer film. The polymer film includes a corrugation pattern on the lower surface of the polymer film. A portion of the polymer film is exposed in the cavity.
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公开(公告)号:US11965797B1
公开(公告)日:2024-04-23
申请号:US18372687
申请日:2023-09-25
Applicant: Wuxi Sencoch Semiconductor Co., Ltd.
Inventor: Tongqing Liu
CPC classification number: G01L9/065 , B81C1/00539 , B81C2201/0133 , B81C2201/016 , B81C2201/0171
Abstract: The present disclosure discloses a bipolar transistor type MEMS pressure sensor and a preparation method thereof. The bipolar transistor type MEMS pressure sensor includes a thin film, a cantilever beam and a bipolar transistor. The bipolar transistor includes a base region, a collector region and an emitter region. The base region is configured to sense deformation of the thin film through a change in resistance value. For the bipolar transistor type MEMS pressure sensor of the disclosure, sensitivity of the sensor can be effectively improved without changing the performance indicators such as the measurement range and nonlinearity. Meanwhile, the bipolar transistor is used as a pressure-sensitive element, so that temperature drift of the sensor can be effectively inhibited.
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公开(公告)号:US11958739B2
公开(公告)日:2024-04-16
申请号:US17188985
申请日:2021-03-01
Applicant: University of Rhode Island Board of Trustees
Inventor: Jason Rodger Dwyer , Y. M. Nuwan D. Y. Bandara , Brian Sheetz
IPC: B81C1/00
CPC classification number: B81C1/00547 , B81C1/00071 , B81C2201/0133 , B81C2201/0145
Abstract: The present invention provides a simple method for ablating a protective thin film on a bulk surface and roughening the underlying bulk. In an embodiment, silicon nitride thin films, which are useful as etch-stop masks in micro- and nano-fabrication, is removed from a silicon wafer's surface using a hand-held “flameless” Tesla-coil lighter. Vias created by a spatially localized electron beam from the lighter allow a practitioner to perform micro- and nano-fabrication without the conventional steps of needing a photoresist and photolithography. Patterning could be achieved with a hard mask or rastering of the spatially confined discharge, offering—with low barriers to rapid use—particular capabilities that might otherwise be out of reach to researchers without access to conventional, instrumentation-intensive micro- and nano-fabrication workflows.
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公开(公告)号:US20240120172A1
公开(公告)日:2024-04-11
申请号:US18479994
申请日:2023-10-03
Applicant: Northwestern University
Inventor: Vinayak P. Dravid , Xiaobing Hu , Kunmo Koo
IPC: H01J37/244 , B81C1/00 , H01J37/26
CPC classification number: H01J37/244 , B81C1/00119 , H01J37/26 , B81C2201/0133 , H01J2237/24455
Abstract: Method for fabricating a microchip are provided which may comprise forming a dopant mask layer on a front side surface of a silicon substrate having the front side surface and an opposing back side surface; removing a portion of the dopant mask layer according to a pattern to form a first exposed silicon region in the silicon substrate and a first unexposed silicon region in the silicon substrate; doping the first exposed silicon region in the silicon substrate with a p-type dopant to form a first p-type doped silicon region in the silicon substrate; forming a silicon nitride layer on the front side surface of the silicon substrate comprising the first p-type doped silicon region and the first unexposed silicon region; and forming an opening in the silicon substrate from the opposing back side surface of the silicon substrate to provide a microchip comprising the silicon substrate having the opening, a first silicon nitride window positioned within the opening, and a support structure mounted to the first silicon nitride window, the support structure comprising the first p-type doped silicon region. The fabricated microchips and methods of using the microchips are also provided.
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公开(公告)号:US20240017986A1
公开(公告)日:2024-01-18
申请号:US18352444
申请日:2023-07-14
Applicant: Infineon Technologies AG
Inventor: Stefan Barzen , Alexander Frey , Matthias Friedrich Herrmann , Jun Cheng Ooi , Hans-Jörg Timme
CPC classification number: B81B3/007 , B81B3/001 , B81C1/00658 , B81B2201/0257 , B81B2203/0127 , B81B2203/04 , B81C2201/0178 , B81C2201/0133
Abstract: A MEMS device comprises a first membrane structure having a reinforcement region formed from one piece of the first membrane structure, wherein the reinforcement region has a larger layer thickness than an adjoining region of the first membrane structure. The MEMS device includes an electrode structure, wherein the electrode structure is vertically spaced apart from the first membrane structure.
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公开(公告)号:US11851320B2
公开(公告)日:2023-12-26
申请号:US16609968
申请日:2018-05-01
Applicant: THE JOHNS HOPKINS UNIVERSITY
Inventor: Gi-Dong Sim , Jessica Krogstad , Timothy P. Weihs , Kevin J. Hemker , Gianna Valentino
CPC classification number: B81B3/0075 , B81C1/00674 , C23C14/18 , C23C14/5806 , C25D3/562 , C25D5/50 , B81B2203/0118 , B81C2201/0132 , B81C2201/0133 , B81C2201/0181 , B81C2201/0197
Abstract: The present invention is directed to the synthesis of metallic nickel-molybdenum-tungsten films and coatings with direct current sputter deposition, which results in fully-dense crystallographically textured films that are filled with nano-scale faults and twins. The as-deposited films exhibit linear-elastic mechanical behavior and tensile strengths above 2.5 GPa, which is unprecedented for materials that are compatible with wafer-level device fabrication processes. The ultra-high strength is attributed to a combination of solid solution strengthening and the presence of the dense nano-scale faults and twins. These films also possess excellent thermal and mechanical stability, high density, low CTE, and electrical properties that are attractive for next generation metal MEMS applications. Deposited as coatings these films provide protection against friction and wear. The as-deposited films can also be heat treated to modify the internal microstructure and attendant mechanical properties in a way that provides a desired balance of strength and toughness.
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公开(公告)号:US20230278856A1
公开(公告)日:2023-09-07
申请号:US18315799
申请日:2023-05-11
Applicant: Taiwan Semiconductor manufacturing Co., Ltd.
Inventor: Yu-Chia Liu , Chia-Hua Chu , Chun-Wen Cheng
CPC classification number: B81B7/0006 , B81C1/00246 , B81B7/0051 , B81B2201/0264 , B81B2201/0271 , B81B2201/0257 , B81C2203/0714 , B81C2201/112 , B81C2201/0176 , B81C2201/0181 , B81C2201/0132 , B81C2201/0133 , B81C2203/0735
Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
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