公开(公告)号：US20180048047A1

公开(公告)日：2018-02-15

申请号：US15603582

申请日：2017-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soon Yong LEE ,  Yeon Sik YU ,  Il Kim ,  Keon Young SEO ,  Min-Goo SEO ,  Jae-Deok LIM ,  Si Ho JANG ,  Hyun-Tae JANG

IPC: H01P7/08 ,  H05K1/11 ,  H05K1/03 ,  H05K1/02

CPC classification number: H01P7/082 ,  H01P1/2005 ,  H05K1/0219 ,  H05K1/0227 ,  H05K1/0236 ,  H05K1/0353 ,  H05K1/115 ,  H05K2201/09218 ,  H05K2201/09618 ,  H05K2201/09781

Abstract: A split resonator and a printed circuit board (PCB) including the same are disclosed. The split resonator is mounted to one side of the PCB to improve the electromagnetic shielding effect, and absorbs a radiation field emitted to the outer wall of the PCB. The PCB includes: a substrate on which one or more electronic components are populated; a dielectric substrate mounted to one side of the substrate; one pair of conductors provided in the dielectric substrate, spaced apart from the substrate in a thickness direction of the substrate by a predetermined distance, and arranged to face each other; and a connection portion configured to interconnect the one pair of conductors, and arranged in parallel to the thickness direction of the substrate.

公开(公告)号：US09854680B2

公开(公告)日：2017-12-26

申请号：US15214680

申请日：2016-07-20

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yoshihito Otsubo

IPC: H05K1/18 ,  H05K3/46

CPC classification number: H05K1/185 ,  H05K3/4611 ,  H05K2201/09781 ,  H05K2201/2009

Abstract: A multilayer substrate comprises: a stack having a plurality of insulating base materials; a first component arranged within the stack at a first level in a thickness direction of the stack; a second component arranged within the stack at a second level different from the first level and arranged so that, in a plan view, at least a portion of the second component overlaps with a portion of the first component; and a supplementary member arranged to at least partly exist in a range, in a thickness direction, as high as or higher than a lower end of the second component and as high as or lower than an upper end of the second component, and in a plan view, within a region of a projected area of the first component not overlapped with the second component, the supplementary member having a rigidness higher than the insulating base materials.

公开(公告)号：US20170343204A1

公开(公告)日：2017-11-30

申请号：US15681989

申请日：2017-08-21

Applicant: Molex, LLC

Inventor： Yi-Tse HO

IPC: F21V29/83 ,  F21K9/232 ,  H05K3/18 ,  F21V29/77 ,  H05K1/02 ,  F21V19/00 ,  F21Y2107/40 ,  H05K3/38 ,  H05K3/10 ,  H05K3/00 ,  F21V3/00 ,  F21Y2115/10

CPC classification number: F21V29/83 ,  F21K9/232 ,  F21V3/00 ,  F21V19/0055 ,  F21V29/77 ,  F21Y2107/40 ,  F21Y2115/10 ,  H05K1/0204 ,  H05K1/0209 ,  H05K1/0284 ,  H05K3/0014 ,  H05K3/105 ,  H05K3/182 ,  H05K3/381 ,  H05K2201/09063 ,  H05K2201/09118 ,  H05K2201/09154 ,  H05K2201/09645 ,  H05K2201/09781 ,  H05K2201/09854 ,  H05K2201/10106 ,  H05K2201/10113 ,  H05K2201/10287 ,  H05K2201/10409 ,  H05K2203/107

Abstract: An illumination device comprises a holder, a plurality of light emitting elements, a translucent cover and a lamp cap structure. The holder comprises a heat dissipating base body and a carrying unit. The carrying unit is connected to a top portion of the heat dissipating base body and comprises a carrying base body, a circuit pattern and a heat dissipating pattern, the circuit pattern and the heat dissipating pattern are directly formed to a surface of the carrying base body, the circuit pattern has a plurality of mounting positions, the heat dissipating pattern at least extends from a region close to the mounting position to a region where the heat dissipating pattern can contact the heat dissipating base body. The plurality of light emitting elements are respectively provided at the plurality of the mounting positions and establish an electrical connection with the circuit pattern.

公开(公告)号：US09832873B2

公开(公告)日：2017-11-28

申请号：US15426062

申请日：2017-02-07

Applicant: Unimicron Technology Corp.

Inventor： Shu-Sheng Chiang ,  Ming-Hao Wu ,  Wei-Ming Cheng

IPC: H05K1/18 ,  H05K3/00 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K1/111 ,  H05K1/0266 ,  H05K1/0296 ,  H05K1/0298 ,  H05K1/09 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/0073 ,  H05K3/4038 ,  H05K3/4092 ,  H05K3/4644 ,  H05K3/4697 ,  H05K2201/09036 ,  H05K2201/094 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2203/0376 ,  H05K2203/163

Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening connecting the cavity and exposing a portion of the first patterned circuit layer. A hole diameter of the opening is smaller than a hole diameter of cavity. A height difference is between an inner surface of the inner dielectric layer exposed by the cavity and a top surface of the first patterned circuit layer exposed by the opening.

公开(公告)号：US20170332495A1

公开(公告)日：2017-11-16

申请号：US15365920

申请日：2016-11-30

Applicant: Samsung Display Co., Ltd.

Inventor： Byoungyong Kim ,  Inseok Yeo

IPC: H05K5/00 ,  H05K1/11 ,  H05K1/18 ,  H05K3/32

CPC classification number: H05K5/0017 ,  G02F1/1333 ,  G06F1/16 ,  H05K1/111 ,  H05K1/113 ,  H05K1/115 ,  H05K1/147 ,  H05K1/181 ,  H05K3/323 ,  H05K2201/09409 ,  H05K2201/09781 ,  H05K2201/10128

Abstract: A printed circuit board includes: a base substrate having a plurality of pad group areas arranged in a first direction on the base substrate, each of the pad group areas being divided into first, second, and third pad areas that are sequentially arranged in a second direction crossing the first direction; first and second row pads disposed within each of the pad group areas and arranged in a third direction crossing the first and second directions; first lines respectively connected to the first row pads; and lower dummy lines on a same layer as that of the first lines. Some of the first row pads are in the first pad area, rest of the first row pads and some of the second row pads are in the second pad area, and rest of the second row pads are in the third pad area.

公开(公告)号：US09807888B2

公开(公告)日：2017-10-31

申请号：US14588321

申请日：2014-12-31

Applicant: TAI-SAW TECHNOLOGY CO., LTD.

Inventor： Yu-Tung Huang ,  Ming-Hung Chang

IPC: H01L23/02 ,  H05K3/30 ,  H01L23/498 ,  H05K1/11 ,  H01L23/00

CPC classification number: H05K3/305 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/1319 ,  H01L2224/16237 ,  H01L2224/81192 ,  H01L2224/81385 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H05K1/111 ,  H05K2201/0373 ,  H05K2201/09781 ,  Y02P70/613 ,  Y10T156/10 ,  H01L2924/00014

Abstract: A conducting package structure includes a substrate and a conducting material. The conducting material is formed to a first patterned structure. The first patterned structure has a first surface which is connected to the substrate and a patterned second surface opposite to the first surface.

公开(公告)号：US20170280569A1

公开(公告)日：2017-09-28

申请号：US15082682

申请日：2016-03-28

Applicant: ALCATEL-LUCENT CANADA INC.

Inventor： James M. SCHRIEL ,  Alex L. CHAN ,  Paul J. BROWN

IPC: H05K3/34 ,  G06F17/50 ,  H05K3/00 ,  H05K1/18 ,  H05K1/11

CPC classification number: H05K3/3436 ,  G06F17/5072 ,  G06F2217/38 ,  H05K1/111 ,  H05K1/181 ,  H05K3/0005 ,  H05K3/225 ,  H05K2201/09381 ,  H05K2201/09418 ,  H05K2201/09427 ,  H05K2201/09663 ,  H05K2201/09781 ,  H05K2201/09809 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2203/0445 ,  H05K2203/176 ,  Y02P70/611 ,  Y02P70/613

Abstract: Various exemplary embodiments relate to a printed circuit board (PCB) for electrically connecting a surface mount component including: a plurality of metal pads on the surface of one side of the PCB corresponding to connection points on the component, wherein at least a portion of the plurality of metal pads have stubs which extend outside the boundary of the surface mount component when the surface mount component is mounted to the PCB; and wherein the stubs have sufficient thermal conductivity to facilitate at least one of the set of dismounting and reattaching of the surface mount component.

公开(公告)号：US09699892B2

公开(公告)日：2017-07-04

申请号：US14021103

申请日：2013-09-09

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Noboru Kato ,  Masahiro Ozawa

IPC: H05K1/18 ,  H05K1/02 ,  H01L23/538 ,  H05K3/46 ,  H01L23/498

CPC classification number: H05K1/0271 ,  H01L23/49822 ,  H01L23/5389 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/0206 ,  H05K1/186 ,  H05K1/188 ,  H05K3/4617 ,  H05K3/4632 ,  H05K3/4635 ,  H05K3/4644 ,  H05K2201/0141 ,  H05K2201/09781 ,  H05K2201/10674 ,  Y10T29/4913 ,  Y10T29/49139

Abstract: An electric element-embedded multilayer substrate, which is a multilayer substrate including an electric element embedded therein and a plurality of base material layers having flexibility, the electric element including a main surface and being embedded in the multilayer substrate to be sandwiched between the base material layers, and a slide member provided between the main surface of the electric element and the base material layer.

公开(公告)号：US20170171966A1

公开(公告)日：2017-06-15

申请号：US15418918

申请日：2017-01-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Naoki GOUCHI

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/24 ,  H05K3/40

CPC classification number: H05K1/0287 ,  H05K1/0292 ,  H05K1/0293 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/0393 ,  H05K1/111 ,  H05K1/183 ,  H05K1/185 ,  H05K1/186 ,  H05K3/24 ,  H05K3/4007 ,  H05K3/4092 ,  H05K3/4632 ,  H05K2201/0195 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09781 ,  H05K2201/10007 ,  H05K2201/10159 ,  H05K2201/10984 ,  H05K2201/2072 ,  H05K2203/0271 ,  H05K2203/063 ,  H05K2203/08

Abstract: To prevent decrease of the bonding strength of an electronic component and a multilayer substrate, an electronic component-embedded module may include an electronic component having a plurality of pads and a multilayer substrate which includes a plurality of resin layers and a cavity for containing the electronic component. The multilayer substrate may include a first resin layer having a plurality of first pattern conductors and a space, and a second resin layer having a second pattern conductor and a plurality of third pattern conductors. The plurality of third pattern conductors may be in conduction with either of the first pattern conductors or the pads, with the second resin layer being placed over the first resin layer. The second pattern conductor may be arranged around a first pad with a gap, and the second resin layer is present between the second pattern conductor and at least one of the first pads.

公开(公告)号：US20170164478A1

公开(公告)日：2017-06-08

申请号：US15208247

申请日：2016-07-12

Applicant: SAMSUNG DISPLAY CO, LTD.

Inventor： DONG SUN LEE

IPC: H05K1/18 ,  H01L51/52

CPC classification number: H05K1/181 ,  G02F1/13458 ,  H01L51/52 ,  H05K1/111 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2201/10128 ,  Y02P70/611

Abstract: A display device includes a substrate including a peripheral area with an integrated circuit chip disposed therein. A first pad portion, overlaps the integrated circuit chip, and includes a plurality of first dummy terminals, and a plurality of first connecting terminals electrically connected to the integrated circuit chip. The plurality of first dummy terminals is not electrically connected to the integrated circuit chip. A second pad portion, disposed in the peripheral area, includes a plurality of second connecting terminals electrically connected to a printed circuit board. A plurality of first connecting wires electrically connect each of the plurality of first connecting terminals to one or more of the plurality of second connecting terminals. At least one of the plurality of first connecting terminals is disposed between the plurality of first dummy terminals. The plurality of first connecting wires is not electrically connected to the plurality of first dummy terminals.