公开(公告)号：KR1020040050591A

公开(公告)日：2004-06-16

申请号：KR1020020078448

申请日：2002-12-10

Applicant: 한국전자통신연구원

Inventor： 권종기 ,  조규형 ,  유현규 ,  김종대

IPC: H03G3/30

Abstract: PURPOSE: A variable gain amplifier is provided which operates at a low supply voltage with low power consumption characteristics. CONSTITUTION: An input part(110) is formed in a differential type, and outputs the first and the second differential signal by amplifying a difference between the first and the second input signal according to the first bias voltage. A variable gain controller(120) receives the first and the second differential signal, and outputs the first and the second variable current by varying the amplitude of the first and the second differential signal according to the first and the second gain control voltage signal. And a current-voltage converter(130) receives the first and the second variable current, and converts the first and the second variable current into the first and the second output voltage according to the second and the third bias voltage.

Abstract translation: 目的：提供可变增益放大器，工作在低电源电压和低功耗特性。 构成：输入部分（110）形成为差分类型，并且通过根据第一偏置电压放大第一和第二输入信号之间的差来输出第一和第二差分信号。 可变增益控制器（120）接收第一和第二差分信号，并且通过根据第一和第二增益控制电压信号改变第一和第二差分信号的幅度来输出第一和第二可变电流。 并且电流 - 电压转换器（130）接收第一和第二可变电流，并且根据第二和第三偏置电压将第一和第二可变电流转换成第一和第二输出电压。

公开(公告)号：KR1020040033596A

公开(公告)日：2004-04-28

申请号：KR1020020062748

申请日：2002-10-15

Applicant: 한국전자통신연구원

Inventor： 이승철 ,  유현규 ,  김경수 ,  김종대

IPC: H03M1/12

CPC classification number: H03M1/16 ,  H03M2201/65

Abstract: PURPOSE: A method for correcting a digital error of an analog/digital converter is provided to simplify an error correction process and minimize the power consumption by using a characteristic of a folding signal to divide a region of low bits and correcting errors of high bits according to the divided regions. CONSTITUTION: A low bit coding region is divided into four regions according to an odd number state and an even number state of predicting high bits. A coding process for low bits is performed. A coded result of the low bits is compared with the state of predictive high bits. The sum of the coded low bits and the predicting high bits is outputted if the coded result of the low bits corresponds to the state of predictive high bits. The sum of the coded low bits and the corrected high bits is outputted if the coded result of the low bits does not correspond to the state of predictive high bits.

Abstract translation: 目的：提供一种用于校正模拟/数字转换器的数字误差的方法，以简化误差校正处理，并通过使用折叠信号的特征来最小化功率消耗，以分割低位的区域并校正高位的误差， 到分区。 构成：根据奇数状态和预测高位的偶数状态，将低位编码区划分为四个区域。 执行低位的编码处理。 将低位的编码结果与预测高位的状态进行比较。 如果低位的编码结果对应于预测高位的状态，则输出编码的低位和预测高位的和。 如果低位的编码结果与预测高位的状态不对应，则输出编码的低位和校正的高位的和。

公开(公告)号：KR100421417B1

公开(公告)日：2004-03-09

申请号：KR1020010065150

申请日：2001-10-22

Applicant: 한국전자통신연구원 ,  브이케이 주식회사

Inventor： 유현규 ,  이상국 ,  박문양 ,  김성도 ,  윤용식 ,  한선호 ,  김남수 ,  오영훈

IPC: H03F1/42

Abstract: PURPOSE: A broadband high gain amplification circuit is provided to maintain a high gain and a bandwidth even though an input frequency is increased. CONSTITUTION: An amplification part(100) amplifies an input signal. An impedance control part(200) constitutes a current mirror by receiving a constant voltage(Vb1), and improves a gain of the amplification part by increasing an output impedance of the amplification part at a half power frequency where the gain of the amplification becomes a half of its peak value. The impedance control part includes an inductor(210) connected to a power supply, and a PMOS(220) having a gate connected to the constant voltage and being connected to the inductor, and a resistor(230) connected between one side of the PMOS and another side of the inductor and connected to another side of the PMOS.

Abstract translation: 目的：提供宽带高增益放大电路以保持高增益和带宽，即使输入频率增加。 构成：放大部分（100）放大输入信号。 通过接收恒定电压（Vb1），阻抗控制部（200）构成电流反射镜，并且通过在放大部的增益变为α的半功率频率处增大放大部的输出阻抗来提高放大部的增益 其峰值的一半。 阻抗控制部分包括连接到电源的电感器（210）和具有连接到恒定电压的栅极并连接到电感器的PMOS（220），以及连接在PMOS的一侧之间的电阻器（230） 并且电感器的另一侧连接到PMOS的另一侧。

公开(公告)号：KR100413182B1

公开(公告)日：2003-12-31

申请号：KR1020010075186

申请日：2001-11-30

Applicant: 한국전자통신연구원

Inventor： 유현규 ,  이상국 ,  한선호 ,  윤용식 ,  박문양 ,  김성도 ,  김남수

IPC: H03F3/45

CPC classification number: H03G1/007 ,  H03F3/45179 ,  H03F2203/45492 ,  H03G1/0023

Abstract: An automatically gain controllable linear differential amplifier using a variable degeneration resistor is disclosed. The linear differential amplifier includes an input end, a bias current source, a load unit, a first MOS transistor and a second MOS transistor. The linear differential amplifiers of the present invention can control an amplifying gain according to an input signal and improve linearity IIP3 without needing additional power consumption caused by improving the linearity The automatically gain controllable linear differential amplifier uses NMOS/PMOS transistor so an integration process of the amplifier can be implemented more conveniently and efficiently.

Abstract translation: 公开了一种使用可变负反馈电阻的自动增益可控的线性差分放大器。 线性差分放大器包括输入端，偏置电流源，负载单元，第一MOS晶体管和第二MOS晶体管。 本发明的线性差分放大器可以根据输入信号控制放大增益并且改善线性度IIP3，而不需要由增加线性度引起的额外功耗。自动增益可控的线性差分放大器使用NMOS / PMOS晶体管， 放大器可以更加方便和高效地实现。

公开(公告)号：KR100394275B1

公开(公告)日：2003-08-09

申请号：KR1019990029627

申请日：1999-07-21

Applicant: 한국전자통신연구원

Inventor： 김충환 ,  김천수 ,  유현규 ,  박민 ,  김대용

IPC: H03F1/32

Abstract: PURPOSE: A differential amplifier circuit for RF signals for improvement of linearity of small signals is provided to improves linearity of the third-order intermodulation signal by using characteristic of an FET. CONSTITUTION: A differential amplifier circuit for RF signals for improvement of linearity of small signals includes a differential amplifier(10) for differential-amplifying an input signal at a normal operation point with an external DC gate voltage, a differential amplifier(20) for generating the third-order intermodulation signal, which non-linearly differential-amplifies the input signal with an external DC gate voltage to generate the third-order intermodulation signal, and an insulator(30) for differently applying the DC gate voltages supplied to the two differential amplifiers for insulation from a DC power supply.

Abstract translation: 目的：提供一种用于改善小信号线性的RF信号的差分放大器电路，以通过使用FET的特性来改善三阶互调信号的线性。 用于改善小信号线性的RF信号的差分放大器电路包括：差分放大器（10），用于利用外部DC门电压对正常工作点处的输入信号进行差分放大;差分放大器（20），用于产生 三阶互调信号，其用外部DC栅极电压对输入信号进行非线性差分放大以产生三阶互调信号;以及绝缘体（30），其用于不同地施加提供给两个差分 用于直流电源绝缘的放大器。

公开(公告)号：KR1020030044444A

公开(公告)日：2003-06-09

申请号：KR1020010075186

申请日：2001-11-30

Applicant: 한국전자통신연구원

Inventor： 유현규 ,  이상국 ,  한선호 ,  윤용식 ,  박문양 ,  김성도 ,  김남수

IPC: H03F3/45

CPC classification number: H03G1/007 ,  H03F3/45179 ,  H03F2203/45492 ,  H03G1/0023

Abstract: PURPOSE: A differential linear amplifier is provided to improve the linearity(IIP3) viewed from the input side by controlling the gain of the amplification in response to the input signal applied to the differential amplifier as well as improve the IIP3 by utilizing a poly silicon without using the polysilicon as a resistor, thereby obtaining an excellent characteristics. CONSTITUTION: A differential linear amplifier includes an input block for receiving a positive input signal and a negative input signal, a bias current source provided on one side of the input block for supplying a bias current, a pair of load blocks(110,120) provided on the other side of the input block for supplying the different level between the output signals between the positive output terminal and the negative output terminal corresponding to the positive input signal and the negative input signal, a first MOD transistor(210) connected between the bias current source and the input block for utilizing the positive input signal as a gate input and the gain control signal as a substrate bias voltage and a second MOS transistor(220) connected between the bias current source and the input block for utilizing the negative input signal as a gate input and the gain control signal as a substrate bias voltage.

Abstract translation: 目的：提供差分线性放大器，以通过控制放大器的输入信号来响应于差分放大器的输入信号来控制从输入侧观察的线性度（IIP3），并通过利用多晶硅来改善IIP3，而不需要 使用多晶硅作为电阻器，从而获得优异的特性。 构成：差分线性放大器包括用于接收正输入信号和负输入信号的输入块，设置在用于提供偏置电流的输入块的一侧上的偏置电流源，设置在该输入块上的一对加载块（110,120） 用于在与正输入信号和负输入信号相对应的正输出端和负输出端之间的输出信号之间提供不同电平的输入块的另一侧;连接在偏置电流之间的第一MOD晶体管（210） 源极和用于利用正输入信号作为栅极输入和增益控制信号作为衬底偏置电压的输入块和连接在偏置电流源和输入块之间的第二MOS晶体管（220），以将负输入信号用作 栅极输入和增益控制信号作为衬底偏置电压。

公开(公告)号：KR1020030013191A

公开(公告)日：2003-02-14

申请号：KR1020010047547

申请日：2001-08-07

Applicant: 한국전자통신연구원

Inventor： 유현규 ,  김천수 ,  장재홍 ,  김충기 ,  김성도 ,  박문양 ,  한선호 ,  박정우 ,  박필재 ,  황남

IPC: H01F27/25

Abstract: PURPOSE: An integrated inductor is provided to reduce a substrate loss according to a magnetic field which directs to a substrate and restrain a generation of a counter electromotive force due to an interference between adjacent metal lines. CONSTITUTION: A metal line includes the first spiral line(21) and the second spiral line(22). The second spiral line(22) is connected to the first spiral line(21) through a contact point(21a). The first spiral line(21) and the second spiral line(22) are arranged in various shapes such as a square, a circle, and a hexagon. The metal line uses a metal film which is laminated by a single layer or a multiple layer. A protective film(32) is formed on the metal line. The first interlayer dielectric(31) is formed on a silicon substrate(30). A metal film is deposited on the first interlayer dielectric(31), and is selectively etched to form the metal line having the first and second spiral lines(21,22).

Abstract translation: 目的：提供集成电感器，以根据指向衬底的磁场减少衬底损耗，并抑制由于相邻金属线之间的干扰而产生反电动势。 构成：金属线包括第一螺旋线（21）和第二螺旋线（22）。 第二螺旋线（22）通过接触点（21a）连接到第一螺旋线（21）。 第一螺旋线（21）和第二螺旋线（22）被布置成各种形状，例如正方形，圆形和六边形。 金属线使用通过单层或多层层压的金属膜。 在金属线上形成保护膜（32）。 第一层间电介质（31）形成在硅衬底（30）上。 金属膜沉积在第一层间电介质（31）上，并被选择性地蚀刻以形成具有第一和第二螺旋线（21,22）的金属线。

公开(公告)号：KR100334625B1

公开(公告)日：2002-08-27

申请号：KR1019970070315

申请日：1997-12-19

Applicant: 한국전자통신연구원

Inventor： 유현규 ,  이상국

IPC: H03F3/45

Abstract: PURPOSE: A differential amplifier is provided to be capable of converting a single input into a differential signal. CONSTITUTION: The first amplification means(Q11) has a collector connected to a power supply voltage(Vcc) via the first output impedance means(ZL3), an emitter connected to a current power, and a base connected to receive an input signal via an input impedance matching means(RS,RM). The second amplification means(Q12) has a collector connected to the power supply voltage via the second output impedance means(ZL4) and an emitter connected to the emitter of the first amplification means. A resistor(RB) is connected to a base of the second amplification means and has the same resistance value between the base of the first amplification means and a ground. The first output voltage(VO1) is output from the collector of the first amplification means, and the second output voltage(VO2) is output from the collector of second first amplification means.

公开(公告)号：KR100281637B1

公开(公告)日：2001-03-02

申请号：KR1019970071622

申请日：1997-12-22

Applicant: 한국전자통신연구원

Inventor： 박민 ,  유현규

IPC: H01L27/04

Abstract: 본 발명은 반도체 기판상에 집적형 인덕터를 제조함에 있어서 기판 변환 기술을 이용하여 인덕터 금속 배선과 기판사이의 기생 커패시턴스를 감소시킴으로써 인덕터의 성능을 개선함에 있다.
본 발명은 기판과 인덕터간의 기생용량을 감소시키기 위하여 인덕터가 형성되는 영역의 반도체 기판을 식각하여 트렌치를 형성하고, 트렌치내에 다공질 실리콘을 형성한 후, 다공질 실리콘층의 상측에 제 1 유전체층, 1차 금속배선, 제 2 유전체층과, 나선형 형상을 가지는 2차 금속배선을 형성하여 인덕터 소자를 제조한다. 또한 트렌치내 다공질 실리콘이 형성되는 하부에 전도성 도핑층을 형성하여 역전압 바이어스 인가시 기판의 손실을 최대한 억제하는 구조의 인덕터 소자를 제조한다.
본 발명은 임피던스 정합회로에 사용하는 인덕터의 성능을 개선시킬 수 있게되어 RF IC 설계를 보다 안정적이고 용이하게 한다. 또한 고주파의 미약한 신호들이 기판과의 간섭에 의해 방해를 받게되는 정도를 개선 시킬 수 있다.

公开(公告)号：KR100279753B1

公开(公告)日：2001-03-02

申请号：KR1019970065704

申请日：1997-12-03

Applicant: 한국전자통신연구원

Inventor： 김천수 ,  박민 ,  유현규

IPC: H01L27/04

Abstract: 본 발명은 반도체 집적회로 제조공정을 이용한 인덕터 제조방법에관한 것으로서, 실리콘 기판상에 제 1 유전체층을 형성하고, 이 유전체층상에 실리콘 기판상의 능동소자와 접속되는 소정의 폭을 가지는 1차 금속배선을 형성하고, 상기 기판의 전면에 SiO2/SOG/SiO2 구조의 제 2 유전체층을 형성하고 이를 패터닝하여 상기 1차 금속 배선의 일단부를 노출시키는 비아홀을 형성하며, 상기 기판의 전면에 리플로우법을 이용하여 2-5㎛의 두께를 가지는 TiN과 알루미늄으로 이루어진 2차 금속층을 형성하고, 이 2차 금속층 상에 나선형 형상을 가지며 유전체로된 인덕터 산화막, 실리콘 질화막 및 실리콘 산화막/실리콘 질화막 중 어느 하나로 형성된 인덕터 패턴용 식각 마스크를 형성하고, 상기 식각 마스크를 통해 노출된 2차 금속층을 식각하여 인덕터 코일을 형� ��함으로써, 식각시 발생하는 염소 가스에의한 금속 배선의 부식을 최대한 억제할 수 있고, 같은 칩내에 디지탈 IC, 아날로그 IC, 고주파 IC를 집적화할 수 있는 효과를 갖는다.