公开(公告)号：JP2000164835A

公开(公告)日：2000-06-16

申请号：JP33420599

申请日：1999-11-25

Applicant: ST MICROELECTRONICS SRL

Inventor： CAPPELLETTI PAOLO GIUSEPPE ,  MAURELLI ALFONSO

IPC: H01L21/8238 ,  H01L21/8247 ,  H01L27/092 ,  H01L27/105 ,  H01L27/115 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a process that can easily integrate a nonvolatile memory and a high-performance logic circuit on the same chip. SOLUTION: A method for manufacturing integrated circuit includes the steps of forming first gate oxide layers of first transistors on first sections of a substrate 1, a step of forming a second gate oxide layer 5 of memory cells on second sections of the substrate 1, and a step of forming gate electrodes 8 of the first transistors and floating gate electrodes 7 of the memory cells of first polysilicon layers 6 in the first and second gate oxide layers 3 and 5. The method also includes a step of forming dielectric layers o the floating gate electrodes 7, a step of forming third gate oxide layers 24 of second transistors on third sections of the substrate 1, a step of forming control gate electrodes of the memory cells and the gate electrodes of the second transistor of second polysilicon layers on the dielectric layers and third sections of the substrate 1, and a step of forming the source and drain regions of the first transistors on the first sections of the substrate 1. In addition to these steps, the method also includes a step of forming source and drain regions of memory cells on the second sections of the substrate 1 and a step of forming the source and drain region of the second transistors on the third sections of the substrate 1.

公开(公告)号：JP2000138232A

公开(公告)日：2000-05-16

申请号：JP28383899

申请日：1999-10-05

Applicant: ST MICROELECTRONICS SRL

Inventor： FRISINA FERRUCCIO ,  FERLA GIUSEPPE

IPC: G11C29/14 ,  G11C29/50 ,  H01L21/336 ,  H01L21/762 ,  H01L21/8238 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To provide a power device which does not raise problems related to threshold voltage, even if a normal insulating material is used for forming an insulating spacer and will not raise strain causing dislocations or cracks in silicon, even if another material such as silicon nitride is used. SOLUTION: This power semiconductor device has a second insulating material region 10 positioned at a side part of a polysilicon layer 5 and a first insulating material region 6, and at the upper side of a region 14 positioned near the opening at the upper side of an insulation layer body region 2 of a gate oxide layer 4, an oxide region 9 formed between a polysilicon region 5 and the second insulating material region 10, and an oxide spacer 8 formed in the upper side of a second material region.

公开(公告)号：JP2000137999A

公开(公告)日：2000-05-16

申请号：JP30499899

申请日：1999-10-27

Applicant: ST MICROELECTRONICS SRL

Inventor： RIVA MARCO ,  ROLANDI PAOLO ,  MONTANARO MASSIMO

IPC: G06F12/16 ,  G11C11/56 ,  G11C16/02 ,  G11C29/12 ,  G11C29/50 ,  G11C29/00

Abstract: PROBLEM TO BE SOLVED: To replace a damaged cell by reading each memory cell constituting a storage device, comparing each memory cell with at least one reference memory cell at one time, determining whether the threshold of the memory cell is smaller than that of at least one reference memory cell, and determining the number of memory cells each having threshold larger than that of at least one reference cell. SOLUTION: A memory cell 10 checks a barging state, and a column multiplexer 11 selects a memory cell 10 belonging to a memory matrix allocated line. Reference memory cells 12:12a to 12f respectively have gradually increasing thresholds, and indicate reference memory cells connected to corresponding sense amplifying means 15. The output of each of the sense amplifying means 15 is connected to an encoder means 16, and the encoder means 16 is adapted to encode a result before the number of memory cells having thresholds exceeding those of the reference memory cells is counted.

公开(公告)号：JP2000133616A

公开(公告)日：2000-05-12

申请号：JP29937499

申请日：1999-10-21

Applicant: ST MICROELECTRONICS SRL

Inventor： VIGNA BENEDETTO ,  MASTROMATTEO UBALDO

IPC: H01L21/28 ,  H01L23/482 ,  H01L23/522 ,  H01L29/84

Abstract: PROBLEM TO BE SOLVED: To easily and safely form a suspension connection line in an integrated device. SOLUTION: This integrated device contains an epitaxial layer 22 where the first and the second regions to be separated at least by an air gap 24 are formed. The suspension mass of an accelerometer is formed. A bridge element 26 is extended to the air gap 24, and the element 26 has an electric suspension connection line 28, which electrically connects the first and the second regions 23 and 45, and the protective structure 29 made of etching resist material and surrounding the electric connection line 28 on the whole side face. The protective structure 29 is formed by the silicon nitride lower part 31a and a silicon carbide upper part 32a, and an electric line 28 is surrounded by the upper part and the side face of the silicon carbide.

公开(公告)号：JP2000113689A

公开(公告)日：2000-04-21

申请号：JP28002499

申请日：1999-09-30

Applicant: ST MICROELECTRONICS SRL

Inventor： CAMPARDO GIOVANNI ,  MICHELONI RINO

IPC: G11C16/06 ,  G11C8/14 ,  G11C16/04

Abstract: PROBLEM TO BE SOLVED: To erase a load charge voltage with a column format memory matrix by comprising a PMOS type first transistor having a conductive terminal in which one is connected to a main word line and the other is connected to a local word line, a NMOS type second transistor having a conductive terminal in which one is connected to a local word line and the other is connected to the reference voltage. SOLUTION: A storage device 1 is connected in the upstream of each local row LWL of a memory matrix within each sector of a non-volatile memory matrix. The storage device 1 includes the PMOS type transistor M1 connected to the conductive terminal between the main word line MWL and local word line LWL and the NMOS type transistor M3 connected to the conductive terminal between the local word line LWL and reference voltage GND. The gate terminals of all transistor M3 of the storage device 1 are all connected together to receive a voltage signal. Thereby, row decoding of the hierarchical structure may be realized.

公开(公告)号：JP2000082207A

公开(公告)日：2000-03-21

申请号：JP20756799

申请日：1999-07-22

Applicant: ST MICROELECTRONICS SRL

Inventor： CINI DARIO ,  VIGNA BENEDETTO

IPC: G11B5/56 ,  G11B5/596 ,  G11B21/02 ,  H02N1/00

Abstract: PROBLEM TO BE SOLVED: To reduce the occupancy area of a micro-actuator and to prevent the weight increase in a suspension unit in the case of the using it to start a read/write head. SOLUTION: This integrated device is provided with a micro-actuator 1' containing an electrostatic coupled external stator and an internal rotor, the internal rotor contains spring like mess 6 and plural movable arms prolonging from it in the radial direction, and the external stator contains plural first fixed arms prolonging for the spring like mass 6 in the radial direction and facing oppositely to the movable arms. Then, the micro-actuator 1' is connected to a drive means 30 for fixed arms and is connected to a measurement means 32 for measuring the position of the internal rotor in relation with the external stator and a capacitive non-connection means arranged between the drive means 30 and the measurement means 32 contains at least one of the fixed arm and the movable arm.

公开(公告)号：JP2000067592A

公开(公告)日：2000-03-03

申请号：JP14849699

申请日：1999-05-27

Applicant: ST MICROELECTRONICS SRL

Inventor： MANSTRETTA ALESSANDRO ,  PIERIN ANDREA ,  TORELLI GUIDO

IPC: G11C16/06 ,  G11C16/04 ,  G11C16/12

Abstract: PROBLEM TO BE SOLVED: To provide a selector switch, integrated monolithically for a device containing an electrically programmable memory cell, which has a simple circuit and operation capability adapted to various use. SOLUTION: Selector switches are integrated monolithically in a circuit of CMOS technology for a memory cell device being electrically programmable and having at least first and second input terminals connecting with first (HV) and second (LV) voltage generators respectively and an output terminal (OUT). First (P1) and second (P2) field effect selection transistors are connected between the first input terminal and the output terminal and the second input terminal and the output terminal respectively through a first and second terminal.

公开(公告)号：JP2000067539A

公开(公告)日：2000-03-03

申请号：JP21666599

申请日：1999-07-30

Applicant: ST MICROELECTRONICS SRL

Inventor： VIGNA BENEDETTO ,  ZERBINI SARAH ,  SASSOLINI SIMONE ,  MENESCARDI CARLO

IPC: G11B5/596 ,  G11B21/02 ,  G11B21/10 ,  H02N1/00

Abstract: PROBLEM TO BE SOLVED: To prevent a microactuator from external dust by providing an actuator element being a different body and a transmission structure to be arranged between the actuator element and a motor element and allowing the transmission structure to transmit the motion of the motor element to a motion corresponding to the actuator element to prevent damage and static electric interference. SOLUTION: A microactuator 30 is integrated with the die 31 firmly fixed to gymbals. The microactuator 30 is provided with a motor element 32, an actuator element 34 which is separated from the motor element 32 and also to which R/W transducers 6 are firmly fixed and a transmission structure 36 which is arranged between the motor element 32 and the actuator element 34. The transmission structure 36 transmits the rotational motion of the motor element 32 to the actuator element 34 and the R/W transducers 6 fixed to the element 34. The motor element 32 is provided with the stator 38 of an inner side which is integrated with the die 31 and the rotor 40 of an outer side. The rotor 40 is connected to the actuator element 34 with the transmission structure 36.

公开(公告)号：JP2000031440A

公开(公告)日：2000-01-28

申请号：JP13446299

申请日：1999-05-14

Applicant: ST MICROELECTRONICS SRL

Inventor： BARLOCCHI GABRIELE ,  VILLA FLAVIO FRANCESCO

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/762 ,  H01L27/12

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a SOI wafer with a complete single-crystal substrate, having advantages inherent in conventional technology, at a competitive price and complying with present standards. SOLUTION: A method for manufacturing a SOI wafer has a step for forming a doped region 18 on a single-crystal substrate 2, a step for growing an epitaxial layer, a step for forming grooves 25 in the epitaxial layer regarding the doped region 18, a step for forming porous silicon region by anodizing the doped regions 18 in an electrochemical electrolytic cell, a step for oxidizing the porous silicon regions, a step for forming embedded air gaps by eliminating the oxidized porous silicon regions, a step for growing oxide regions from walls of the embedded air gaps and grooves 25 until the wafer 15 is oxidized through heating and the air gaps and the grooves 25 themselves are completely filled.

公开(公告)号：JPH11355060A

公开(公告)日：1999-12-24

申请号：JP12891199

申请日：1999-05-10

Applicant: ST MICROELECTRONICS SRL

Inventor： CHIOZZI GIORGIO ,  MARCONE BRUNO

IPC: H02H3/24 ,  H03F1/52

Abstract: PROBLEM TO BE SOLVED: To provide a short-circuit protection circuit especially for a power transistor. SOLUTION: A short circuit protection circuit 10 for a power transistor 12 contains a first circuit which is connected to the power transistor in parallel and which is for mirroring the output current of the power transistor and second mirror circuits 13 and 14 which are connected to the fist mirror means 11 in series. The second mirror circuits output current correlated to current mirrored by the first mirror circuit for comparing it with the reference current Iref. The result of comparison decides whether it is necessary to operate the transistor or not. A circuit which is connected in parallel to the power transistor and the first mirror circuit for adjusting the minimum value and the maximum value of the output current of the power transistor as the function of voltage in the transistor, and which detects the drop of voltage on the power transistor can be contained.