Abstract:
PROBLEM TO BE SOLVED: To use a storage area of OTP (which can be program-controlled only once) and to satisfy all necessary conditions related to safety and reliability and the facility of access with respect to the constitution of a protected storage device. SOLUTION: In a method for protecting data in the semiconductor electronic storage device constituted of a storage matrix 2, respective matrix address decoding blocks 3 and a pre-decoding block, the protected storage part 5 in the matrix 2 and private decoding parts 6 and 7 are used so that a protection code CP is stored in a protected part without the address area of the matrix. The protection code CP is written and/or read only through a command translator 8.
Abstract:
PROBLEM TO BE SOLVED: To provide a controlled erasing method in a flash EEPROM device which does not require structural change of memory. SOLUTION: A controlled erasing method comprises at least a step (40) of supplying at least one erase pulse to cell of memory array, a step of comparing a threshold value voltage of cell erased with a certain lower threshold value, a step of performing selectively soft programming to the erased cell having the threshold value voltage lower than the lower threshold value voltage and a step (42) of verifying that the erased cell has the threshold value higher than the lower threshold value. When the erased cells of the predetermined number, which is at least one, have the threshold value higher than the first threshold value, only one erase pulse is given to all cells (44), and the selective soft programming and verify step are repeated.
Abstract:
PROBLEM TO BE SOLVED: To enable the protection of an EEPROM cell which is improved with respect to abnormal readouts by allowing the cell to include floating-gate transistors, a first metallic layer over-lapping with a semiconductor substrate and a second metallic layer positioned by being more separated from the substrate than the first metallic layer and allowing the metallic first layer to be arranged so as to be overlapped in major portions of floating gate terminals. SOLUTION: A metallic structure for a screen 50 is arrayed so as to be overlapped on floating gate terminals 30 and covers only the terminals 30 completely. Since it is advantageous that the metallic structure 50 is formed in a first metallic layer, a selection terminal is provided by a poly silicon structure contacting in the relation that it is oven lapped with a metallic structure 242 formed in the first metallic layer in order to lower the low efficiency of a word line. Moreover, it is advantageous in order to obtain a small-sized cell layout that one side of readout terminals 14, 16 or both terminals are provided by a metallic structure to be formed in a metallic layer succeeding to the first metallic layer, that is, the second metallic layer.
Abstract:
PROBLEM TO BE SOLVED: To provide a method for self-testing and correcting an error caused by the charge loss of a flash memory. SOLUTION: Read and parity check are repeated sequentially per byte and integrity is verified for values stored in respective parity bits of a parity value. It the verification is negative, and parity verification is continued sequentially starting from the first row until a row generating a negative verification result is identified while sustaining the current row address. If a discrete tail bit is '1', it is rewritten to '0'.
Abstract:
PROBLEM TO BE SOLVED: To provide a current mode PWM(pulse width modulation) driving device whose precision does not deteriorate even if it is miniaturized. SOLUTION: A control loop becoming a close sate with the input node (A) of an error amplifier comparing the voltage of the input mode (A) balancing second current amplified by the output voltage V sense of a current sensing amplifier inputting first current amplified by control voltage Vdac via a first resistor R1 and the voltage drop quantity of a current detection resistor R3 via a second resistor R2 with reference voltage Vref is provided. In a current mode PWM driving device, voltage drop quantity is smaller than that by the current detection resistor R3. The current sense amplifier is constituted of an operational amplifier OP operating as a buffer or a charge transfer circuit by switches swA, swB, swC and sw1 controlled by a pair of complementary control signals ϕ1 and ϕ2 and a sample-and-hold output stage.
Abstract:
PROBLEM TO BE SOLVED: To make it possible to integrate a plurality of MOS devices of different voltage thresholds in one and the same substrate, by a method wherein when forming a plurality of channel regions for the MOS devices, impurities are selectively doped into a geometrical pattern with a gate electrode as a mask. SOLUTION: After a gate oxide film 3 and a polycrystalline silicon layer 4 are formed, these layers 3, 4 are selectively removed to form square openings for a transistor 1' and stripe openings for a transistor 1" to form a gate electrode 5, 5' for the transistor 1', 1". Then, with the gate electrode 5, 5' as a mask, P-type impurities are selectively doped into a drain layer 2 to form the main body region 7 of the transistor 1', 1". The main body region 7 has a square or stripe shape and is extended under the gate electrode 5, 5' to form a channel region of the transistor. Again, N-type impurities are selectively doped into the main body region 7 with the gate electrode 5, 5' as a mask to form a source region.
Abstract:
PROBLEM TO BE SOLVED: To incorporate a power supply means controlled to supply an energy of a variable amount to a reactance load with a low power consumption amount. SOLUTION: Reactance elements Lr, Cr are connected to a load Cl through a controllable electronic switch T3 to form a resonance circuit together with the load Cl when the switch T3 is closed. Further, the driving system for a reactance load comprises a means 10 for energizing the switch T3 , an operational amplifier 3 of a power supply means controlled according to a predetermined program for specifying an energy supply to the load Cl, and a controller 14 connected to regulate an operation of the means 10.
Abstract:
PROBLEM TO BE SOLVED: To provide a synchronization circuit for simply and reliably switching from a closed loop mode to an open loop mode or vice versa. SOLUTION: A circuit has a programming resistor REG FT for programming a specific value of frequency for scanning the sample of a profile, a demultiplexer DEMU and a multiplexer MUX for inputting the output of the programming resistor to a first resistor REG A, and a circuit MSF FALSE for generating a compulsory synchronizing pulse for loading the data of the programming resistor to a first resistor during opened loop operation by a value, in which the counter value of a third counter CONTN is smaller than the number of samples by 1 and for generating a reset signal for resetting a first counter CONT UP, the multiplexer, and the demultiplexer.
Abstract:
PROBLEM TO BE SOLVED: To enhance the sensitivity of a sensor furthermore by providing a weighted region containing tungsten in a movable mass. SOLUTION: A sacrifice region whose both sides and lower side are surrounded by a buried conductive region 3 is etched and removed, and an air gap 38 is formed in a semiconductor substrate 1. In its bottom part, a movable mass 40 is separated from the other parts of the substrate 1, and supported only by a fixed zone 42. This movable mass 40 is H-shaped, and a cross wall partitioning a movable electrode is inserted like a comb into the cross wall of a stationary mass 41 partitioning a stationary electrode. Since the movable and stationary electrodes are polarized through a contact region and buried conductive regions, the change of the distance between the movable electrode and the stationary electrode to be produced when the movable mass 40 is accelerated, is detected as a capacity change. Since tungsten is deposited on the movable mass 40 in a manufacturing stage to a thickness of about 1 μm for example, to form a tungsten weighted region 26C, the sensitivity of detection of the sensor increases furthermore.
Abstract:
PROBLEM TO BE SOLVED: To effectively protect the action of a power supply line from the static discharge to the terminal of the power supply line by connecting the gate of a first electrolytic transistor to a second power supply line through a front-end switch circuit. SOLUTION: A protective circuit utilizes a MOS type field effect transistor GCTRL connected between a pulse power source VDD to be protected by means of drain and source terminals and a ground GND. The gate terminal of the transistor GCTRL is grounded though a resistor RG and a capacitor which are connected in parallel with each other and, at the same time, connected to a low-voltage power source LVRAIL through a bias current generator. However, the power source LVRAIL is adjusted against and protected from ESD events by means of an exclusive protective device. Then the gate terminal of the transistor GCTRL is always grounded whenever the ESD events occur due to power failures. Therefore, the action of a power supply line can be protected effectively front static discharge to the terminal of the power supply line.