公开(公告)号：GB2497909A

公开(公告)日：2013-06-26

申请号：GB201307919

申请日：2011-10-20

Applicant: IBM

Inventor： SHIN BYUNGHA ,  BOJARCZUK NESTOR ,  GUHA SUPRATIK ,  WANG KEJIA

IPC: H01L31/18 ,  H01L31/0224 ,  H01L31/032

Abstract: A method of fabricating a solar cell e.g. CuZnSn(S,Se) (CZTSSe), that includes the following steps. A substrate is coated with a molybdenum (Mo) layer. A stress-relief layer is deposited on the Mo layer. The stress-relief layer is coated with a diffusion barrier. Absorber layer constituent components are deposited on the diffusion barrier, wherein the constituent components comprise one or more of sulfur (S) and selenium (Se). The constituent components are annealed to form an absorber layer, wherein the stress-relief layer relieves thermal stress imposed on the absorber layer, and wherein the diffusion barrier blocks diffusion of the one or more of S and Se into the Mo layer. A buffer layer is formed on the absorber layer. A transparent conductive electrode is formed on the buffer layer.

公开(公告)号：CA2673330A1

公开(公告)日：2008-07-24

申请号：CA2673330

申请日：2008-01-02

Applicant: IBM

Inventor： TUTUC EMANUEL ,  APPENZELLER JOERG ,  GUHA SUPRATIK

IPC: H01L29/06 ,  B82B1/00 ,  B82B3/00

Abstract: A semiconductor structure is provided, which includes multiple sections a rranged along a longitudinal axis. Preferably, the semiconductor structure c omprises a middle section and two terminal sections located at opposite ends of the middle section. A semiconductor core having a first dopant concentra tion preferably extends along the longitudinal axis through the middle secti on and the two terminal sections. A semiconductor shell having a second, hig her dopant concentration preferably encircles a portion of the semiconductor core at the two terminal sections, but not at the middle section, of the se miconductor structure. It is particularly preferred that the semiconductor s tructure is a nanostructure having a cross-sectional dimension of not more t han 100 nm.

公开(公告)号：DE112018003101T5

公开(公告)日：2020-03-26

申请号：DE112018003101

申请日：2018-08-02

Applicant: IBM

Inventor： VAN KESSEL THEODORE ,  CHANG JOSEPHINE ,  HAMANN HENDRIK ,  GERSHON TALIA SIMCHA ,  GUHA SUPRATIK ,  LIU JIAXING

IPC: G01N27/00

Abstract: Bereitgestellt werden energiesparende Sensoren für feuergefährliche Gase unter Verwendung einer Thermoelementbauform. Bei einem Aspekt umfasst ein Sensor für feuergefährliche Gase: mindestens eine erste Elektrode; mindestens eine zweite Elektrode, die aus einem Material gebildet ist, das ungleich dem der ersten Elektrode ist; und ein katalytisches Material an einer aktiven Reaktionsverbindungsstelle zwischen der ersten Elektrode und der zweiten Elektrode, wobei die aktive Reaktionsverbindungsstelle zwischen der ersten Elektrode und der zweiten Elektrode ein Thermoelement bildet. Eine Erkennungseinheit umfasst z.B. mehrere Sensoren und ein Verfahren zum Erkennen von feuergefährlichem Gas unter Verwendung der vorliegenden Sensoren werden ebenfalls bereitgestellt.

公开(公告)号：GB2488421B

公开(公告)日：2013-11-20

申请号：GB201202928

申请日：2010-10-26

Applicant: IBM

Inventor： MOUMEN NAIM ,  MARTIN YVES ,  KESSEL THEODORE GERARD VAN ,  SANDSTROM ROBERT ,  GUHA SUPRATIK

IPC: H01L31/0224 ,  H01L31/0687

Abstract: Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.

公开(公告)号：GB2488421A

公开(公告)日：2012-08-29

申请号：GB201202928

申请日：2010-10-26

Applicant: IBM

Inventor： MOUMEN NAIM ,  MARTIN YVES ,  KESSEL THEODORE GERARD VAN ,  SANDSTROM ROBERT ,  GUHA SUPRATIK

IPC: H01L31/0224 ,  H01L31/0687

Abstract: Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.

公开(公告)号：GB2487881A

公开(公告)日：2012-08-08

申请号：GB201209027

申请日：2010-10-18

Applicant: IBM

Inventor： GUHA SUPRATIK ,  MARTIN YVES ,  SANDSTROM ROBERT ,  KESSEL THEODORE GERARD VAN

IPC: G01J1/42

Abstract: Techniques for analyzing performance of solar panels and/or cells are provided. In one aspect, a method for analyzing an infrared thermal image taken using an infrared camera is provided. The method includes the following steps. The infrared thermal image is converted to temperature data. Individual elements are isolated in the infrared thermal image. The temperature data for each isolated element is tabulated. A performance status of each isolated element is determined based on the tabulated temperature data. The individual elements can include solar panels and/or solar cells. In another aspect, an infrared diagnostic system is provided. The infrared diagnostic system includes an infrared camera which can be remotely positioned relative to one or more elements to be imaged; and a computer configured to receive thermal images from the infrared camera, via a communication link, and analyze the thermal images.

公开(公告)号：DE112010003140T5

公开(公告)日：2012-05-31

申请号：DE112010003140

申请日：2010-06-25

Applicant: IBM

Inventor： GUHA SUPRATIK ,  HOVEL HAROLD

IPC: H01L31/068 ,  H01L21/02 ,  H01L31/0392 ,  H01L31/18

Abstract: Eine Mehrfach-Fotovoltaikvorrichtung umfasst ein Siliziumsubstrat und eine dielektrische Schicht, die auf dem Siliziumsubstrat ausgebildet ist. Eine Germaniumschicht ist auf der dielektrischen Schicht ausgebildet. Das Germanium umfasst eine kristalline Struktur, die im Wesentlichen ähnlich der kristallinen Struktur des Siliziumsubstrates ist. Eine erste Fotovoltaik-Subzelle umfasst eine erste Vielzahl dotierter Halbleiterschichten, die auf der Germaniumschicht ausgebildet sind. Zumindest eine zweite Fotovoltaik-Subzelle umfasst eine zweite Vielzahl dotierter Halbleiterschichten, die auf der ersten Fotovoltaik-Subzelle, die auf der Germaniumschicht ist, die auf der dielektrischen Schicht ist, ausgebildet ist.

公开(公告)号：GB2484605A

公开(公告)日：2012-04-18

申请号：GB201119893

申请日：2010-06-25

Applicant: IBM

Inventor： GUHA SUPRATIK ,  HOVEL HAROLD

IPC: H01L31/0687 ,  H01L31/18

Abstract: A multi-junction photovoltaic device includes a silicon substrate and a dielectric layer formed on the silicon substrate. A germanium layer is formed on the dielectric layer. The germanium includes a crystalline structure that is substantially similar to the crystalline structure of the silicon substrate. A first photovoltaic sub-cell includes a first plurality of doped semiconductor layers formed on the germanium layer. At least a second photovoltaic sub-cell includes a second plurality of doped semiconductor layers formed on the first photovoltaic sub-cell that is on the germanium layer that is on the dielectric layer.

公开(公告)号：DE69818166D1

公开(公告)日：2003-10-23

申请号：DE69818166

申请日：1998-06-25

Applicant: IBM

Inventor： BOJARCZUK JR ,  GUHA SUPRATIK ,  GUPTA ARUNAVA ,  TANG WADE WAI-CHUNG

IPC: B41M5/26 ,  G11B7/00 ,  G11B7/004 ,  G11B7/0045 ,  G11B7/005 ,  G11B7/24 ,  G11B7/243 ,  G11B7/253

Abstract: This invention provides phase change media for optical storage based on semiconductors of nitrides of the column III metals. The surface of thin films of these wide bandgap semiconductors may be metallized (by desorption of the nitrogen) by irradiating with photons of energy equal to, or greater than the band gap of these materials, and with power densities beyond a critical threshold value. As a consequence of such writable metallization, these materials are excellent candidates for write once, read many times storage media since the differences in the reflectivity between the metal and its corresponding wide gap nitride are very large. Furthermore, once the nitrogen is desorbed, the written metallic phase can no longer revert back to the nitride phase and hence the media is stable and is truly a write-once system. Additional advantages offered by these materials over present day phase change media include higher differences in reflectivity contrast and suitability for use with short wavelength laser diodes (460 nm and lower) which are expected to be introduced into optical recording technology in the next 5 years. The band gap of alloys of nitrides of column III metals can be tuned by changing the relative fractions of the column III metals to continuously vary the band gap so as to be compatible with lasers having photon energies within the range. The low absorptivity and hence high transmissitivity, at the appropriate recording wavelength, of the starting phase also offers the potential application of these materials in a multiple-recording-layer format.

公开(公告)号：AU2002357054A1

公开(公告)日：2003-06-10

申请号：AU2002357054

申请日：2002-11-27

Applicant: IBM

Inventor： KIM HYUNGJUN ,  MCFEELY FENTON ,  NARAYANAN VIJAY ,  RODBELL KENNETH ,  YURKAS JOHN ,  AMOS RICKY ,  BUCHANAN DOUGLAS ,  CABRAL CYRIL JR ,  CALLEGARI ALESSANDRO ,  GUHA SUPRATIK

IPC: H01L21/28 ,  H01L21/285 ,  H01L21/30 ,  H01L21/336 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  H01L29/76

Abstract: A method for fabricating a CMOS gate electrode by using Re, Rh, Pt, Ir or Ru metal and a CMOS structure that contains such gate electrodes are described. The work functions of these metals make them compatible with current pFET requirements. For instance, the metal can withstand the high hydrogen pressures necessary to produce properly passivated interfaces without undergoing chemical changes. The thermal stability of the metal on dielectric layers such as SiO2, Al2O3 and other suitable dielectric materials makes it compatible with post-processing temperatures up to 1000° C. A low temperature/low pressure CVD technique with Re2(CO)10 as the source material is used when Re is to be deposited.