公开(公告)号：US20120052695A1

公开(公告)日：2012-03-01

申请号：US12868370

申请日：2010-08-25

Applicant: MYOUNGSOO JEON ,  ATTALEE SNARR TAYLOR ,  JOHN JOSEPH CONSOLI

Inventor： MYOUNGSOO JEON ,  ATTALEE SNARR TAYLOR ,  JOHN JOSEPH CONSOLI

IPC: H01R12/14 ,  H05K1/11

CPC classification number: H05K3/308 ,  H01R12/585 ,  H05K1/116 ,  H05K3/366 ,  H05K2201/044 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2201/10189

Abstract: An electrical connector assembly includes a circuit board and an electrical connector mounted on the circuit board. The circuit board has a circuit board body having first and second surfaces and through-holes bored between the first and second surfaces. The circuit board has signal traces on internal layers of the circuit board that are generally parallel to the first and second surfaces. Portions of the circuit board body within the through-holes are etched away to expose portions of the signal traces beyond the circuit board body within the corresponding through-hole. The electrical connector includes a housing and signal terminals held by the housing. The signal terminals are received in respective through-holes of the circuit board and engage the corresponding signal traces.

Abstract translation: 电连接器组件包括电路板和安装在电路板上的电连接器。 电路板具有电路板主体，其具有在第一表面和第二表面之间钻孔的第一表面和第二表面以及通孔。 电路板在电路板的内层上具有通常平行于第一和第二表面的信号迹线。 蚀刻掉通孔内的电路板主体的部分，以将信号迹线的部分暴露在对应的通孔内的电路板主体之外。 电连接器包括壳体和由壳体保持的信号端子。 信号端子被接收在电路板的相应通孔中并与相应的信号迹线接合。

公开(公告)号：US20120045909A1

公开(公告)日：2012-02-23

申请号：US13264892

申请日：2010-03-26

Applicant: Erich Pischler

Inventor： Erich Pischler

IPC: H01R12/71 ,  H01R43/00

CPC classification number: H01L24/10 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/16 ,  H01L24/72 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L2223/6622 ,  H01L2224/0401 ,  H01L2224/05578 ,  H01L2224/13 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/16106 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81898 ,  H01L2224/83136 ,  H01L2224/83851 ,  H01L2224/90 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01R23/26 ,  H01R24/40 ,  H01R2103/00 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/184 ,  H05K2201/09036 ,  H05K2201/092 ,  H05K2201/09809 ,  H05K2201/09845 ,  Y10T29/49117 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A male connection component (120) for connection with a correspondingly configured female connection component (140) having a recess (144) extending into a main surface (170) of a female Substrate (142) of the female connection component (140), wherein the female connection component (140) comprises a plurality of electrically conductive female contacts (146) which are electrically decoupled from one another and are arranged at different height levels with regard to the main surface (170) of the female Substrate (142), the male connection component (120) comprising a male Substrate (102), a Protrusion (104) protruding from a main surface (160) of the male Substrate (102) and comprising a plurality of electrically conductive male contacts (106) which are electrically decoupled from one another and are arranged at different height levels with regard to the main surface (160) of the male Substrate (102), wherein the male connection component (120) is adapted for connection with the female connection component (140) so that upon connection, each of the plurality of electrically conductive male contacts (106) is brought in contact with one of the plurality of electrically conductive female contacts (146) for providing electric contactation at different height levels, wherein the male Substrate (102) forms at least part of one of a chip, a chip package and a circuit board.

Abstract translation: 用于与相应配置的阴连接部件（140）连接的阳连接部件（120），该阴连接部件具有延伸到阴连接部件（140）的阴基板（142）的主表面（170）的凹部（144），其中 阴连接部件（140）包括多个导电阴触头（146），它们彼此电分离并且相对于阴基板（142）的主表面（170）布置在不同的高度水平处， 阳连接部件（120），包括阳基底（102），从阳基底（102）的主表面（160）突出的突起（104），并且包括多个导电的阳触头（106），电接头 并且相对于阳性基板（102）的主表面（160）布置在不同的高度水平处，其中阳连接部件（120）适于与阴连接 连接部件（140），使得在连接时，多个导电阳触头（106）中的每一个与多个导电阴触头（146）中的一个接触，用于在不同的高度级别提供电接触，​​其中 阳基板（102）形成芯片，芯片封装和电路板之一的至少一部分。

公开(公告)号：US20110100699A1

公开(公告)日：2011-05-05

申请号：US12716212

申请日：2010-03-02

Applicant: Masahi Hamazaki ,  Dek Gin Yang ,  Dong Hwan Lee ,  Bong Soo Kim ,  II Kyoon Jeon ,  Kwang Yune Kim

Inventor： Masahi Hamazaki ,  Dek Gin Yang ,  Dong Hwan Lee ,  Bong Soo Kim ,  II Kyoon Jeon ,  Kwang Yune Kim

IPC: H05K1/11 ,  H05K3/42

CPC classification number: H05K3/4069 ,  H05K1/0268 ,  H05K1/0269 ,  H05K3/0047 ,  H05K3/429 ,  H05K3/4644 ,  H05K2201/092 ,  H05K2201/09518 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09827 ,  H05K2203/0207 ,  Y10T29/49165

Abstract: Disclosed herein is a method of manufacturing a printed circuit board, including: forming a buildup layer on a base substrate including a circuit layer connected with a first via penetrating an insulation layer; forming a viahole penetrating the buildup layer and at least a part of the first via; and forming an interlayer connection member in the viahole. The method is advantageous in that a process of forming a multilayer connection structure can be simplified, and an error in the formation of a viahole can be minimized.

Abstract translation: 本发明公开了一种印刷电路板的制造方法，其特征在于，包括：在基板上形成积层，所述基板包括与穿过绝缘层的第一通孔连接的电路层; 形成穿过所述积聚层和所述第一通孔的至少一部分的通孔; 以及在所述通孔中形成层间连接构件。 该方法的优点在于，可以简化形成多层连接结构的过程，并且可以最小化通孔形成的误差。

公开(公告)号：US20110036620A1

公开(公告)日：2011-02-17

申请号：US12563975

申请日：2009-09-21

Applicant: Hsien-Chieh Lin

Inventor： Hsien-Chieh Lin

IPC: H05K1/11 ,  B23K1/20

CPC classification number: H05K3/3457 ,  H05K1/116 ,  H05K3/3452 ,  H05K3/4092 ,  H05K3/4644 ,  H05K2201/0397 ,  H05K2201/092 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2203/043

Abstract: The invention provides a printed circuit board and method for fabricating the same. The printed circuit board includes a substrate having an internal circuit structure. An additional circuit structure is disposed on the substrate, electrically connected to the internal circuit structure. A solder mask insulating layer having an opening is disposed on the additional circuit structure. A conductive bump pattern is disposed in the solder mask insulating layer, wherein the conductive bump pattern extends into the opening horizontally, wherein a side, a portion of an upper surface and a portion of a lower surface of the conductive bump pattern are exposed from the opening from the opening. A solder ball is formed in the opening, wherein the solder ball is electrically connected to the additional circuit structure.

Abstract translation: 本发明提供一种印刷电路板及其制造方法。 印刷电路板包括具有内部电路结构的基板。 附加的电路结构设置在基板上，电连接到内部电路结构。 具有开口的焊接掩模绝缘层设置在附加电路结构上。 导电凸块图案设置在焊料掩模绝缘层中，其中导电凸块图案水平地延伸到开口中，其中导电凸块图案的一侧，上表面的一部分和下表面的一部分从 从开幕开幕。 在开口中形成焊球，其中焊球与附加电路结构电连接。

公开(公告)号：US20110024165A1

公开(公告)日：2011-02-03

申请号：US12606462

申请日：2009-10-27

Applicant: Thomas A. Olden ,  Walter Wrigglesworth

Inventor： Thomas A. Olden ,  Walter Wrigglesworth

IPC: H05K1/09 ,  H05K3/00 ,  H05K1/16

CPC classification number: H05K1/0366 ,  H05K1/0284 ,  H05K1/05 ,  H05K3/0014 ,  H05K3/4632 ,  H05K3/465 ,  H05K2201/0323 ,  H05K2201/09018 ,  H05K2201/09063 ,  H05K2201/092 ,  H05K2203/302 ,  Y10T29/49124

Abstract: A composite interconnect assembly includes a body structure formed from a composite material (e.g., a carbon graphite material) with one or more conductive traces embedded therein (e.g., a copper or copper alloy). One or more contact regions are provided such that the conductive traces are exposed and are configured to mechanically and electrically connect to one or more electronic components. The body structure may have a variety of shapes, including planar, cylindrical, conical, and the like.

Abstract translation: 复合互连组件包括由其中嵌入有一个或多个导电迹线（例如铜或铜合金）的复合材料（例如，碳石墨材料）形成的主体结构。 提供一个或多个接触区域，使得导电迹线被暴露并且被配置为机械地和电连接到一个或多个电子部件。 身体结构可以具有各种形状，包括平面，圆柱形，圆锥形等。

公开(公告)号：US07280372B2

公开(公告)日：2007-10-09

申请号：US10990280

申请日：2004-11-15

Applicant: Kevin P. Grundy ,  William F. Wiedemann ,  Joseph C. Fjelstad

Inventor： Kevin P. Grundy ,  William F. Wiedemann ,  Joseph C. Fjelstad

IPC: H05K1/11

CPC classification number: H05K3/3405 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/3011 ,  H05K1/183 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10727 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Disclosed are stair stepped PCB structures which provide high performance, direct path, via-less interconnections between various elements of an electronic interconnection structure including, among others, IC packages and connectors.

Abstract translation: 公开了楼梯级PCB结构，其提供包括IC封装和连接器在内的电子互连结构的各种元件之间的高性能，直接路径，无通孔互连。

公开(公告)号：US06730859B2

公开(公告)日：2004-05-04

申请号：US09817947

申请日：2001-03-27

Applicant: Shigetsugu Muramatsu ,  Kazunari Imai

Inventor： Shigetsugu Muramatsu ,  Kazunari Imai

IPC: H01R1204

CPC classification number: H05K3/3447 ,  H05K3/002 ,  H05K3/0032 ,  H05K3/0094 ,  H05K3/4602 ,  H05K2201/092 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2203/1394 ,  Y10T29/49139

Abstract: A substrate for mounting an electronic part or parts thereon, which comprises a core substrate and at least a set of insulation layer and patterned wiring line layer, which is formed on the insulation layer, at at least one side of the core substrate, the core substrate having holes, in each of which a lead pin of the electronic part to be mounted is to be inserted, and being provided with lands which surround the opening of the hole and to which the lead pin inserted in the hole is to be bonded, wherein the insulation layer or layers at at least one side of the core substrate has bores, which expose the land at their bottoms, and communicate with the hole. A method of manufacturing such a substrate is also disclosed.

Abstract translation: 一种用于安装其上的电子部件的基板，其包括在所述芯基板的至少一侧上形成在所述绝缘层上的芯基板和至少一组绝缘层和图案化布线线层，所述芯 具有孔的基板，其中每个要安装的电子部件的引脚插入，并且设置有围绕孔的开口的焊盘，插入孔中的引脚与引脚抵接， 其中所述芯基板的至少一侧的所述绝缘层或多个孔具有孔，其在其底部暴露所述焊盘并与所述孔连通。 还公开了制造这种基板的方法。

公开(公告)号：US6138350A

公开(公告)日：2000-10-31

申请号：US30587

申请日：1998-02-25

Applicant: Anilkumar Chinuprasad Bhatt ,  Donald Herman Glatzel ,  Allen F. Moring ,  Voya Rista Markovich ,  Kostas Papathomas ,  David John Russell

Inventor： Anilkumar Chinuprasad Bhatt ,  Donald Herman Glatzel ,  Allen F. Moring ,  Voya Rista Markovich ,  Kostas Papathomas ,  David John Russell

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/02 ,  H05K3/24 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H01K3/10

CPC classification number: H05K3/4652 ,  H05K1/113 ,  H05K3/4069 ,  H05K3/4602 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2924/12044 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/092 ,  H05K2201/0959 ,  H05K2203/0191 ,  H05K2203/025 ,  H05K2203/0278 ,  H05K2203/0338 ,  H05K2203/0554 ,  H05K3/0023 ,  H05K3/0094 ,  H05K3/025 ,  H05K3/246 ,  H05K3/429 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/24942 ,  Y10T428/249996

Abstract: A process for manufacturing circuit boards comprising providing a circuitized substrate having a dielectric surface, providing a peel apart structure including a metal layer and a peelable film, laminating the peel apart structure to the circuitized substrate with the metal layer positioned adjacent said dielectric surface, forming holes in the circuitized substrate through the peel apart structure, applying a filler material including an organic base to the peel apart structure, applying a sacrificial film onto the filler material, and applying sufficient heat and pressure to the sacrificial film to force the filler material into the holes to substantially fill the holes is provided.

Abstract translation: 一种用于制造电路板的方法，包括提供具有电介质表面的电路化基板，提供包括金属层和可剥离膜的剥离结构，将剥离结构层压到电路化基板上，金属层位于邻近所述电介质表面，形成 通过剥离结构在电路化基板中的孔，将包含有机基底的填充材料施加到剥离结构上，将牺牲膜施加到填充材料上，以及向牺牲膜施加足够的热和压力以迫使填充材料进入 提供基本上填充孔的孔。

公开(公告)号：US20110084383A1

公开(公告)日：2011-04-14

申请号：US12903403

申请日：2010-10-13

Applicant: Daisuke MIZUTANI

Inventor： Daisuke MIZUTANI

IPC: H01L23/48 ,  H01L21/50

CPC classification number: H05K1/147 ,  H01L21/76898 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0218 ,  H05K1/141 ,  H05K3/222 ,  H05K3/3436 ,  H05K3/363 ,  H05K2201/0379 ,  H05K2201/0715 ,  H05K2201/09063 ,  H05K2201/092 ,  H05K2201/10666 ,  H05K2201/10734 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00

Abstract: A semiconductor device includes a first circuit base member including a surface having multiple first electrodes formed thereon, a second circuit base member being provided above the first circuit base member and having first through holes and second through holes formed respectively above the first electrodes, a semiconductor package provided above the second circuit base member, and multiple first bumps provided inside the first through holes and the second through holes to connect the first electrodes to the semiconductor package.

Abstract translation: 半导体器件包括：第一电路基体部件，其包括形成有多个第一电极的表面;第二电路基体部件，设置在第一电路基体的上方，并具有分别形成在第一电极上方的第一通孔和第二通孔; 设置在第二电路基体上方的封装，以及设置在第一通孔内的多个第一凸起和第二通孔，以将第一电极连接到半导体封装。

公开(公告)号：US20080207015A1

公开(公告)日：2008-08-28

申请号：US12003996

申请日：2008-01-04

Applicant: Junya Sueyoshi

Inventor： Junya Sueyoshi

IPC: H01R12/00

CPC classification number: H05K3/308 ,  H01R12/585 ,  H05K3/325 ,  H05K2201/092 ,  H05K2201/10189 ,  H05K2201/10303 ,  H05K2201/1059 ,  H05K2201/10878

Abstract: Provided is a printed wiring board formed with a through-hole into which a press-fit pin is press-fitted. The printed wiring board includes at least one signal transmission layer, a signal transmission wiring pattern formed in the signal transmission layer, and an electrode portion of the signal transmission wiring pattern exposed at an inner circumferential surface of the through-hole. The electrode portion is not formed covering the entire inner circumferential surface of the through-hole but at a part of the inner circumferential surface of the through-hole.

Abstract translation: 提供了一种形成有压配合销的通孔的印刷线路板。 印刷布线板包括至少一个信号传输层，形成在信号传输层中的信号传输布线图案，以及在通孔的内周表面处暴露的信号传输布线图案的电极部分。 电极部不形成为覆盖通孔的整个内周面，而是形成在通孔的内周面的一部分。