公开(公告)号：US20170133152A1

公开(公告)日：2017-05-11

申请号：US15318472

申请日：2015-07-01

Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.

Inventor： Masahiko KOUCHI ,  Tetsuya SHIMOMURA

IPC: H01F38/14 ,  H05K1/14 ,  H02J7/02 ,  H05K1/11

CPC classification number: H01F38/14 ,  H01F27/2804 ,  H01F27/365 ,  H01F2027/2809 ,  H02J7/025 ,  H02J50/12 ,  H05K1/115 ,  H05K1/144 ,  H05K1/148 ,  H05K1/165 ,  H05K3/4635 ,  H05K2201/041 ,  H05K2201/09227 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/10098

Abstract: A printed circuit board according to an embodiment of the present invention includes, alternately, at least one insulating layer containing a synthetic resin as a main component; and a plurality of conductive layers including circuit patterns, wherein the plurality of circuit patterns of the plurality of conductive layers form a spiral pattern in plan view, and the plurality of circuit patterns are connected together via a plurality of through-holes so as to form a single closed loop in which a current flows counterclockwise or clockwise in an entirety of the spiral pattern. The conductive layers are preferably formed on both surfaces of the at least one insulating layer so as to form a pair. The spiral pattern includes a plurality of multi-row circuits arranged to form multi-rows, and a bridging circuit that connects an end portion of one multi-row circuit of one of the conductive layers to an end portion of another multi-row circuit of the other conductive layer, the other multi-row circuit being adjacent to the one multi-row circuit.

公开(公告)号：US09635761B2

公开(公告)日：2017-04-25

申请号：US14306768

申请日：2014-06-17

Applicant: Massachusetts Institute of Technology

Inventor： Glenn A. Brigham ,  Richard J. Stanley ,  Bradley Thomas Perry ,  Patrick J. Bell

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K3/42 ,  H05K1/0222 ,  H05K1/115 ,  H05K1/116 ,  H05K3/0094 ,  H05K3/4685 ,  H05K2201/0959 ,  H05K2201/09745 ,  H05K2201/10242 ,  H05K2203/03 ,  H05K2203/0703 ,  H05K2203/30 ,  Y10T29/49123

Abstract: A printed circuit board, and a method of fabricating the printed circuit board is disclosed. The printed circuit board includes at least one coaxial via. A hollow via is disposed in the printed circuit board. A metal sleeve is formed around the circumference of said hollow via. An inner conductive path is disposed in the hollow via. Additionally, an insulating material is disposed in the hollow via, between the conducting path and the metal sleeve. The conductive path is used to connect signal traces disposed on two different layers of the printed circuit board. In some embodiments, these signal traces carry signals having a frequency above 1 GHz, although the disclosure is not limited to this embodiment.

公开(公告)号：US09629260B2

公开(公告)日：2017-04-18

申请号：US14169097

申请日：2014-01-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Seung Wook Park ,  Young Do Kweon ,  Jin Gu Kim

IPC: H05K1/11 ,  H05K3/42 ,  H05K3/10 ,  H05K1/03 ,  H05K3/28

CPC classification number: H05K3/426 ,  H05K1/036 ,  H05K3/108 ,  H05K3/285 ,  H05K2201/0959 ,  H05K2203/1476

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board according to a preferred embodiment of the present invention includes a base substrate; a through via formed to penetrate through the base substrate; and circuit patterns formed on one side and the other side of the base substrate and formed to be thinner than an inner wall of the through via.

公开(公告)号：US09578755B2

公开(公告)日：2017-02-21

申请号：US14255986

申请日：2014-04-18

Applicant: IBIDEN CO., LTD.

Inventor： Yoshio Mizutani ,  Hiroaki Watanabe

IPC: H05K3/46 ,  H05K3/42 ,  H01L23/498

CPC classification number: H05K3/462 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/0959 ,  H05K2203/1476 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A printed wiring board includes: a multilayer core substrate including first and second insulation layers and a double-sided board between the first and second insulation layers. The core substrate has a cylindrical through-hole structure including a cylindrical conductor through the insulation layers and the board, a resin filler filling inside the cylindrical conductor and covering circuits covering the filler at the ends of the cylindrical conductor, respectively. The core substrate includes a conductive layer including a through-hole land around end of the structure such that the land is directly connected to the cylindrical conductor, the land includes a first electroless film, a first electrolytic film, a second electroless film and a second electrolytic film, and the cylindrical conductor includes the second electroless and electrolytic films such that the second electroless film is in contact with the side walls of the first electroless and electrolytic films.

Abstract translation: 印刷电路板包括：包括第一绝缘层和第二绝缘层的多层芯基板和在第一绝缘层和第二绝缘层之间的双面板。 核心基板具有圆柱形通孔结构，其包括穿过绝缘层和板的圆柱形导体，填充在圆柱形导体内部的树脂填料和覆盖圆柱形导体端部的填料的覆盖电路。 核心基板包括导电层，该导电层包括在结构的端部周围的通孔焊盘，使得焊盘直接连接到圆柱形导体，焊盘包括第一化学镀膜，第一电解膜，第二无电镀膜和第二 所述圆筒形导体包括所述第二无电电解膜和所述电解质膜，使得所述第二无电解膜与所述第一无电解电解质膜和所述电解质膜的侧壁接触。

公开(公告)号：US09480141B1

公开(公告)日：2016-10-25

申请号：US14032908

申请日：2013-09-20

Applicant: Junis Hamadeh

Inventor： Junis Hamadeh

IPC: H05K1/02 ,  H01R12/00

CPC classification number: H01R12/00 ,  H05K1/0206 ,  H05K1/021 ,  H05K1/113 ,  H05K2201/09381 ,  H05K2201/0939 ,  H05K2201/09463 ,  H05K2201/0959 ,  H05K2201/10106 ,  H05K2201/10401 ,  H05K2201/10416

Abstract: A heat sinking rapid assembly semiconductor package comprising an electrically segmented conductive assembly post. The post is fabricated comprising at least two independent electrically conductive segments separated by an electrically isolating element. An electrical component, such as a semiconductor device, is assembled to an upper portion of the conductive post, wherein each contact of the component is in electrical communication with a respective conductive segment. The post can be mechanically pressed, threaded, or mechanically coupled using any other reasonable mechanical interface into a segmented via or plated-through hole of a printed circuit board (PCB). The electrical segments would be in electrical communication with conductive portions of the segmented via to form a complete electrical circuit between the PCB and the electrical component. A thermally conductive element can be integrated into the post to conduct heat away from the semiconductor device to improve performance and reduce failures related to thermal stress.

Abstract translation: 一种散热快速组装半导体封装，包括电分段的导电组件柱。 该柱被制造成包括由电隔离元件隔开的至少两个独立的导电段。 诸如半导体器件的电气部件被组装到导电柱的上部，其中部件的每个触点与相应的导电部分电连通。 可以使用任何其他合理的机械接口将柱机械地压制，螺纹化或机械耦合到印刷电路板（PCB）的分段通孔或电镀通孔中。 电段将与分段通孔的导电部分电连通，以在PCB和电气部件之间形成完整的电路。 导热元件可以集成到柱中以将热量从半导体器件导出，以提高性能并减少与热应力相关的故障。

公开(公告)号：US20160224811A1

公开(公告)日：2016-08-04

申请号：US15011823

申请日：2016-02-01

Applicant: KYOCERA Circuit Solutions, Inc.

Inventor： Takafumi KAWASHIMA

IPC: G06K7/06 ,  H05K1/11 ,  H05K1/18 ,  H05K1/02

CPC classification number: G06K7/065 ,  H01L2224/16225 ,  H05K1/0268 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/113 ,  H05K1/181 ,  H05K2201/0959 ,  H05K2201/10674 ,  H05K2201/10734

Abstract: A wiring board of the present invention includes an insulating board including a core insulating plate and an insulating layer laminated on at least one surface of the insulating plate. A plurality of code information reading pads formed of a conductor layer are disposed on a surface of the insulating layer formed uppermost. A common conductor is disposed oppositely to the code information reading pads by interposing therebetween the insulating layer formed uppermost. At least one of the code information reading pads and the common conductor are electrically connected to each other through a via conductor penetrating through the insulating layer formed uppermost.

Abstract translation: 本发明的布线基板包括绝缘板，该绝缘板包括层叠在绝缘板的至少一个表面上的芯绝缘板和绝缘层。 由导体层形成的多个代码信息读取焊盘设置在最上层形成的绝缘层的表面上。 公共导体通过插入其间形成最上层的绝缘层而相对于码信息读取垫布置。 代码信息读取焊盘和公共导体中的至少一个通过穿过最上层形成的绝缘层的通孔导体彼此电连接。

公开(公告)号：US09320154B2

公开(公告)日：2016-04-19

申请号：US14287242

申请日：2014-05-27

Applicant: HITACHI, LTD.

Inventor： Akira Soeda ,  Chiko Yorita ,  Shinichirou Tooya ,  Takayuki Ono ,  Mitsuru Takahira ,  Yuuichi Sekino ,  Akira Goto ,  Yoshimasa Tashiro ,  Hiroyuki Doi ,  Tsutomu Sakamoto

IPC: H05K3/20 ,  H05K3/46 ,  H05K1/11 ,  H05K3/00 ,  H05K3/30

CPC classification number: H05K3/4614 ,  H05K1/113 ,  H05K1/114 ,  H05K3/0094 ,  H05K3/306 ,  H05K2201/044 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2201/099 ,  H05K2201/10189 ,  H05K2201/10234 ,  H05K2203/061 ,  H05K2203/063 ,  Y10T29/49165

Abstract: An electrode connected to a TH pad requiring electric conduction is formed on a bonded surface of a first multilayer substrate having piercing TH to form a solder bump on the electrode. An electrode connected to the TH pad is formed on a bonded surface of a second multilayer substrate to be bonded having a piercing TH at a position opposite the electrode formed on the first multilayer substrate to form a solder bump on the electrode. A three-layered sheet is formed by applying an adhesive as a resin material that is not completely cured to both surfaces of a core material as the cured resin, and has holes at positions corresponding to the TH and the solder bump, respectively. The first and the second multilayer substrates are then laminated having the bonded surfaces facing each other while having the three-layered sheet positioned and interposed therebetween, and batch thermocompression bonded.

Abstract translation: 在具有穿刺TH的第一多层基板的接合表面上形成连接到需要导电的TH垫的电极，以在电极上形成焊料凸块。 连接到TH焊盘的电极形成在与要形成在第一多层基板上的电极相对的位置处具有穿刺TH的待接合的第二多层基板的接合表面上，以在电极上形成焊料凸块。 通过将作为树脂材料的粘合剂施加到作为固化树脂的芯材的两个表面的树脂材料上，并且在与TH和焊料凸块相对应的位置处分别具有孔，形成三层片。 然后将第一和第二多层基板层压，其中具有彼此面对的接合表面，同时具有定位并插入其中的三层片材，并进行批量热压接。

公开(公告)号：US20160105958A1

公开(公告)日：2016-04-14

申请号：US14785422

申请日：2014-04-21

Applicant: DENSO CORPORATION

Inventor： Toshihiro NAKAMURA ,  Shinya UCHIBORI ,  Koji NUMAZAKI ,  Atsushi KASHIWAZAKI ,  Masaji IMADA ,  Eiji YABUTA

IPC: H05K1/03 ,  H05K3/00 ,  H05K3/06 ,  H05K3/34 ,  H01L23/498 ,  H05K1/18

CPC classification number: H05K1/0306 ,  H01L23/145 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K1/0313 ,  H05K1/038 ,  H05K1/181 ,  H05K3/0067 ,  H05K3/067 ,  H05K3/341 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4655 ,  H05K2201/029 ,  H05K2201/0347 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/10166 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: In a multi-layer substrate, a glass cloth of a build-up layer is deformed toward a land below the land. A thickness of a resin layer of the build-up layer from the glass cloth to a surface adjacent to the land is set to be smaller than a dimension from the glass cloth to a front surface of a core layer. With the above configuration, a progress or an enlargement of a crack can be suppressed from a stage in which the crack is smaller. Therefore, the progress and the enlargement of the crack can be delayed. As a result, even if the crack is generated, an insulating property between the land and an inner layer wire is ensured, and the land and the inner layer wire can be restricted from being short-circuited.

Abstract translation: 在多层基板中，堆积层的玻璃布朝向陆地下方的陆地变形。 从玻璃布到邻接的台面的堆积层的树脂层的厚度被设定为小于从玻璃布到芯层的前表面的尺寸。 利用上述结构，可以从裂纹较小的阶段抑制裂纹的进行或扩大。 因此，破裂的进展和扩大可能会延迟。 结果，即使产生裂缝，也能够确保焊盘与内层电线之间的绝缘性，能够限制焊盘和内层电线的短路。

公开(公告)号：US20160095218A1

公开(公告)日：2016-03-31

申请号：US14858242

申请日：2015-09-18

Applicant: KYOCERA Circuit Solutions, Inc.

Inventor： Keizou SAKURAI

IPC: H05K1/11 ,  H05K1/09 ,  H05K1/03 ,  H05K1/18 ,  H05K1/02

CPC classification number: H05K1/0218 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/552 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/3025 ,  H05K1/144 ,  H05K1/181 ,  H05K1/183 ,  H05K3/426 ,  H05K3/4697 ,  H05K2201/041 ,  H05K2201/0959 ,  H05K2201/09981 ,  H05K2201/10545 ,  H05K2203/025 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A composite wiring board includes a first wiring board having an opening for housing an electronic component, and including a plurality of first connection pads on an upper surface and a plurality of second connection pads on a lower surface, and a second wiring board having the electronic component mounted on a lower surface, including a third connection pad provided on the lower surface on an outer peripheral side and bonded to the first connection pad through a solder, and disposed on the first wiring board so as to cover the opening, in which a grounding inner wall conductor layer is deposited on an inner wall of the opening around the electronic component, and a grounding conductor layer is deposited on the lower surface of the second wiring board and connected to the inner wall conductor layer through a solder.

Abstract translation: 复合布线板包括具有用于容纳电子部件的开口的第一布线板，并且在上表面上包括多个第一连接焊盘和在下表面上的多个第二连接焊盘，以及具有电子部件的第二布线板 组件安装在下表面上，包括设置在外周侧的下表面上的第三连接焊盘，并通过焊料粘合到第一连接焊盘，并且设置在第一布线板上以覆盖开口，其中 接地内壁导体层沉积在围绕电子部件的开口的内壁上，并且接地导体层沉积在第二布线板的下表面上，并通过焊料与内壁导体层连接。

公开(公告)号：US20160081191A1

公开(公告)日：2016-03-17

申请号：US14733245

申请日：2015-06-08

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jee-Soo MOK ,  Yong-Ho BAEK ,  Young-Gwan KO

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/30 ,  H05K3/40 ,  H05K3/02

CPC classification number: H05K3/4697 ,  H01L2224/16237 ,  H05K1/183 ,  H05K3/429 ,  H05K3/4623 ,  H05K3/4626 ,  H05K2201/0959 ,  H05K2203/063

Abstract: A printed circuit board and a manufacturing method thereof are disclosed. The printed circuit board in accordance with an aspect of the present invention includes: a base board having a pad formed on one surface thereof; a copper clad laminate laminated on the one surface of the base board and having a cavity formed therein such that the pad is placed within the cavity; and an insulating adhesive layer interposed between the base board and the copper clad laminate in such a way that the pad is exposed

Abstract translation: 公开了印刷电路板及其制造方法。 根据本发明的一个方面的印刷电路板包括：具有在其一个表面上形成的焊盘的基板; 层叠在基板的一个表面上并且具有形成在其中的腔的覆铜层压板，使得焊盘放置在腔内; 以及插入在基板和覆铜层压板之间的绝缘粘合剂层，使得该垫被暴露