公开(公告)号：US20060118940A1

公开(公告)日：2006-06-08

申请号：US11338647

申请日：2006-01-25

Applicant: Yasumasa Kasuya ,  Hirotaka Nakano

Inventor： Yasumasa Kasuya ,  Hirotaka Nakano

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H05K3/341 ,  H01L23/49827 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/12042 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0203 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10166 ,  H05K2201/10734 ,  H05K2201/10969 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/01024 ,  H01L2924/3512 ,  H01L2224/29116 ,  H01L2224/13111 ,  H01L2924/20753

Abstract: There is provided a semiconductor device low in profile, having high heat radiation property, A binding electrode, and draw-out electrodes are formed integrally with the top of an insulting film made out of an aramid non-woven fabric epoxy film, a semiconductor element is attached onto the binding electrode through the intermediary of a solder layer, electrodes provided on the upper surface of the semiconductor element are bonded to the draw-out electrodes by a gold wire, respectively, and all those elements are encapsulated with a synthetic resin. On the other hand, at portions of the insulting film, corresponding to the underside of the binding electrode, and the undersides of the draw-out electrodes, respectively, there is provided an opening having an optional area smaller than that for each of the undersides described, and the draw-out electrodes are bonded to bumps, respectively, through the respective openings, while the lower end face of the binding electrode is exposed to the atmosphere.

Abstract translation: 提供了一种低散热性的半导体器件，具有高散热性，A型粘合电极和拉出电极与由芳族聚酰胺无纺布环氧树脂膜制成的绝缘膜的顶部整体形成，半导体元件 通过焊料层的中间附着到装订电极上，设置在半导体元件的上表面上的电极分别通过金线接合到引出电极，并且所有这些元件都用合成树脂封装。 另一方面，在绝缘膜的对应于接合电极的下侧的部分和引出电极的下侧分别设置有具有比每个下侧的面积小的任选区域的开口 并且通过各个开口分别将引出电极接合到凸块，同时将粘合电极的下端面暴露于大气。

公开(公告)号：US20060117332A1

公开(公告)日：2006-06-01

申请号：US11191939

申请日：2005-07-29

Applicant: Manabu Ochi ,  Yukinari Ueki ,  Yoshitaka Kusano ,  Hiroyasu Yoshida ,  Fumihito Ichikawa

Inventor： Manabu Ochi ,  Yukinari Ueki ,  Yoshitaka Kusano ,  Hiroyasu Yoshida ,  Fumihito Ichikawa

IPC: G11B7/08 ,  G11B7/085 ,  G11B7/09

CPC classification number: H05K1/0209 ,  G11B7/0935 ,  G11B7/12 ,  H05K1/0206 ,  H05K1/189 ,  H05K2201/055 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/10969

Abstract: Provided is a reliable optical pick-up which can prevent deterioration of a performance of a component, shortening of a service life or malfunctioning due to heat generation of an laser driver IC, wherein a metallic pattern is provided on a flexible printed board, having an area wider than the external shape of the laser driver IC and having an exposed outer surface, and made of the same material as that of a wiring pattern. It is preferable to bent the flexible printed board in a mounting part for the laser driver IC so that the metallic pattern is faced to and superposed with a surface of the flexible printed board on the side remote from the surface on which the laser driver IC is mounted.

Abstract translation: 提供了一种可靠的光学拾取器，其可以防止部件性能的劣化，使用寿命缩短或者由于激光驱动器IC的发热引起的故障，其中金属图案设置在柔性印刷电路板上，具有 区域比激光驱动IC的外形宽，外露面外露，并且由与布线图案相同的材料制成。 优选地，将柔性印刷电路板弯曲在用于激光驱动IC的安装部分中，使得金属图案面对并与柔性印刷电路板的远离激光驱动器IC的表面的一侧的表面重叠 安装。

公开(公告)号：US07006331B1

公开(公告)日：2006-02-28

申请号：US10676538

申请日：2003-09-30

Applicant: Jai N. Subrahmanyam ,  Pierre C. Humbert

Inventor： Jai N. Subrahmanyam ,  Pierre C. Humbert

IPC: G11B5/60

CPC classification number: G11B5/4853 ,  G11B5/4826 ,  H05K1/0215 ,  H05K1/0243 ,  H05K1/056 ,  H05K3/305 ,  H05K3/321 ,  H05K2201/0347 ,  H05K2201/10727 ,  H05K2201/10969

Abstract: A head gimbal assembly for a disk drive. The head gimbal assembly includes a trace suspension assembly backing layer including a gimbal. The trace suspension assembly backing layer is formed of a conductive material having a first oxidation rate. The head gimbal assembly further includes a gimbal conductive layer disposed upon the gimbal and formed of a conductive material having a second oxidation rate lower than the first oxidation rate. The head gimbal assembly further includes a slider supported by the gimbal. The head gimbal assembly further includes a conductive compound disposed between the gimbal conductive layer and the slider for electrically grounding the slider to the trace suspension assembly backing layer.

Abstract translation: 用于磁盘驱动器的磁头万向架组件。 头部万向架组件包括包括万向节的轨迹悬挂组件背衬层。 痕量悬浮组件背衬层由具有第一氧化速率的导电材料形成。 头万向架组件还包括设置在万向架上的万向导电层，并由具有低于第一氧化速率的第二氧化速率的导电材料形成。 头万向架组件还包括由万向节支撑的滑块。 头万向架组件还包括设置在万向导电层和滑块之间的导电化合物，用于将滑块电动接地到轨道悬挂组件背衬层。

公开(公告)号：US20060024865A1

公开(公告)日：2006-02-02

申请号：US11238894

申请日：2005-09-29

Applicant: Jeffrey Underwood ,  John Arledge ,  Thomas Swirbel ,  Joaquin Barreto

Inventor： Jeffrey Underwood ,  John Arledge ,  Thomas Swirbel ,  Joaquin Barreto

IPC: H01L21/48 ,  H01L21/44

CPC classification number: H05K1/0218 ,  H01L2223/6622 ,  H05K1/0221 ,  H05K1/0222 ,  H05K1/113 ,  H05K3/4644 ,  H05K9/0039 ,  H05K2201/0715 ,  H05K2201/09036 ,  H05K2201/09509 ,  H05K2201/09809 ,  H05K2201/09972 ,  H05K2201/09981 ,  H05K2201/10553 ,  H05K2201/10969 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A method for shielding one or more circuits (21, 21′) of a printed circuit board includes depositing a layer of dielectric material (43) over a printed circuit board substrate (22) and the printed circuits (21, 21′), creating a trench-like opening (44) in the dielectric layer (43) such that the trench-like opening (44) surrounds the one or more circuits (21, 21′) to be shielded, depositing a layer of metal (27) over the layer of dielectric material (43) and within the trench-like openings (44), creating a solder pad (24) at each location where an electrical connection is to be made to the printed circuits (21, 21′) by removing a border of the metal layer (27) surrounding each connection location, and providing a microvia (25) through each solder pad (24) penetrating the dielectric layer (43) and terminating at the metal of the printed circuit (21, 21′).

Abstract translation: 用于屏蔽印刷电路板的一个或多个电路（21,21'）的方法包括在印刷电路板基板（22）和印刷电路（21,21'）之上沉积介电材料层（43），从而产生 电介质层（43）中的沟槽状开口（44），使得沟槽状开口（44）围绕要被屏蔽的一个或多个电路（21,21'），将金属层（27）沉积在 所述电介质材料层（43）并且在所述沟槽状开口（44）内，在每个位置处产生焊接焊盘（24），其中将通过去除所述印刷电路（21,21'）来形成电连接 围绕每个连接位置的金属层（27）的边界，以及通过穿过介电层（43）并终止在印刷电路（21,21'）的金属处的每个焊盘（24）提供微孔（25）。

公开(公告)号：US20060016618A1

公开(公告)日：2006-01-26

申请号：US11181097

申请日：2005-07-14

Applicant: Kyoung-Soo Kim ,  Jin-Ho Park

Inventor： Kyoung-Soo Kim ,  Jin-Ho Park

IPC: H05K7/06

CPC classification number: H05K1/183 ,  G02F1/13452 ,  H05K1/114 ,  H05K3/341 ,  H05K3/429 ,  H05K2201/09072 ,  H05K2201/09518 ,  H05K2201/09627 ,  H05K2201/10189 ,  H05K2201/10969 ,  H05K2201/2072

Abstract: A printed circuit board on which a connector is mounted includes a conductive layer, insulating layers, and a supporting member. A part of the conductive layer is exposed on a top surface of the PCB in order to form a connecting pad portion for connecting the connector. The insulating layers are disposed proximate to both sides of the conductive layer. The supporting member is connected to the conductive layer and covers a surface of a hole formed by opening an orifice through the conductive layer and the insulating layer. The hole is disposed adjacent to the connecting pad portion.

Abstract translation: 其上安装有连接器的印刷电路板包括导电层，绝缘层和支撑构件。 导电层的一部分露出在PCB的顶表面上，以便形成用于连接连接器的连接焊盘部分。 绝缘层靠近导电层的两侧设置。 支撑构件连接到导电层并覆盖通过导电层和绝缘层打开孔而形成的孔的表面。 孔邻近连接焊盘部分设置。

公开(公告)号：US06977190B2

公开(公告)日：2005-12-20

申请号：US10956043

申请日：2004-10-04

Applicant: Tadashi Yamaguchi

Inventor： Tadashi Yamaguchi

IPC: H01L23/12 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H05K3/34 ,  H01L21/44

CPC classification number: H01L23/3121 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4826 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H05K3/341 ,  H05K2201/10734 ,  H05K2201/10969 ,  H05K2203/041 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A semiconductor device provided with a shallow metal basin having a flange outwardly extending from the top edge of the side wall of the shallow metal basin, to receive a semiconductor device chip having one or more semiconductor device elements disposed therein and one or more bonding pads arranged thereon, an insulator frame having one or more external terminals arranged thereon, the external terminals being connected with the bonding pads, and the insulator frame being arranged on the flange of the shallow metal basin, and a plastic layer molded to cover the semiconductor device chip, resultantly realizing a semiconductor device packaged in a chip scale package of which the production procedure is simplified and the heat dissipation efficiency and the integration are remarkably improved.

Abstract translation: 一种具有浅金属盆的半导体器件，其具有从浅金属盆的侧壁的顶部边缘向外延伸的凸缘，以接收其中设置有一个或多个半导体器件元件的半导体器件芯片，以及布置有一个或多个焊盘 绝缘体框架具有设置在其上的一个或多个外部端子，所述外部端子与所述接合焊盘连接，所述绝缘体框架布置在所述浅金属盆的凸缘上，以及模塑成覆盖所述半导体器件芯片的塑料层 从而实现了封装在芯片级封装中的半导体器件，其制造步骤简化，散热效率和集成度显着提高。

公开(公告)号：US06936921B2

公开(公告)日：2005-08-30

申请号：US10706307

申请日：2003-11-12

Applicant: Katsuyuki Yoshida

Inventor： Katsuyuki Yoshida

IPC: H01L23/053 ,  H01L23/12 ,  H01L23/34 ,  H01L23/498 ,  H01L23/66 ,  H01L29/00 ,  H01P1/04 ,  H05K1/02 ,  H05K3/34

CPC classification number: H05K1/0243 ,  H01L23/49805 ,  H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6627 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15313 ,  H01L2924/16195 ,  H01L2924/1903 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01P1/047 ,  H05K3/3421 ,  H05K2201/10689 ,  H05K2201/10946 ,  H05K2201/10969 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A high-frequency package comprises a dielectric substrate, on an upper face of which a mounting portion of a high-frequency circuit component is formed, a first line conductor formed on the upper face for transmitting high-frequency signals, a first coplanar grounding conductor, a second line conductor formed on a lower face, a second coplanar grounding conductor, a through conductor formed inside for connecting the first and second line conductors, a grounding through conductor connecting the first and second coplanar grounding conductors, a metal terminal bonded to the second line conductor, and grounding metal terminals bonded to the second coplanar grounding conductor, wherein a gap between the grounding metal terminals is equal to or less than ½ of a wavelength of high-frequency signals.

Abstract translation: 高频组件包括介电衬底，其上表面上形成有高频电路部件的安装部分，形成在上表面上用于传输高频信号的第一线导体，第一共面接地导体 ，形成在下表面上的第二线导体，第二共面接地导体，形成在内部用于连接第一和第二线导体的通孔导体，连接第一和第二共面接地导体的接地导体， 第二线路导体和接地金属端子接合到第二共面接地导体，其中接地金属端子之间的间隙等于或小于高频信号波长的1/2。

公开(公告)号：US06897562B2

公开(公告)日：2005-05-24

申请号：US10411744

申请日：2003-04-11

Applicant: Lei L. Mercado ,  Tien-Yu Tom Lee ,  Jay Jui Hsiang Liu

Inventor： Lei L. Mercado ,  Tien-Yu Tom Lee ,  Jay Jui Hsiang Liu

IPC: H01L23/498 ,  H05K3/34 ,  H01L23/02

CPC classification number: H01L23/49816 ,  H01L2224/48227 ,  H01L2924/12044 ,  H01L2924/15311 ,  H05K3/341 ,  H05K2201/10727 ,  H05K2201/10969 ,  Y02P70/613

Abstract: An electronic component includes an organic interposer (160, 460, 560, 660, 760, 860, 960), a semiconductor chip (220) mounted over the organic interposer, copper pads (250, 751, 851) under the organic interposer, a solder attachment (110, 510, 610, 910) between certain ones of the copper pads, and solder interconnects (120, 420) between certain other ones of the copper pads and located around an outer perimeter (111, 511, 911) of the solder attachment. The solder attachment is placed at locations within the electronic component that experience the greatest stress, which may include, for example, locations adjacent to at least a portion of a perimeter (221) of the semiconductor chip. In one embodiment, a surface area of the solder attachment is larger than a surface area of each one of the solder interconnects. In the same or another embodiment, the electronic component includes multiple solder attachments.

Abstract translation: 电子部件包括有机插入件（160,460,560,660,760,860,960），安装在有机插入件上的半导体芯片（220），有机插入件下方的铜焊盘（250,751,851）， 在某些铜焊盘之间的焊料附着物（110,510,610,910）以及位于铜焊盘的某些其它铜焊盘之间的焊料互连（120,420），并位于铜焊盘的外周边（111,511,911）周围 焊锡附件。 焊料附着物被放置在经受最大应力的电子部件内的位置，其可以包括例如与半导体芯片的周边（221）的至少一部分相邻的位置。 在一个实施例中，焊料附着物的表面积大于每个焊料互连的表面积。 在相同或另一个实施例中，电子部件包括多个焊接附件。

公开(公告)号：US20050092814A1

公开(公告)日：2005-05-05

申请号：US11000697

申请日：2004-12-01

Applicant: John Waldvogel ,  Brian Bielick ,  Herman Miller ,  Billy Van Cannon

Inventor： John Waldvogel ,  Brian Bielick ,  Herman Miller ,  Billy Van Cannon

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34 ,  H05K3/38 ,  H05K3/40 ,  B23K31/02

CPC classification number: H05K1/021 ,  H05K1/182 ,  H05K3/0061 ,  H05K3/341 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/09554 ,  H05K2201/10166 ,  H05K2201/10969 ,  H05K2203/042 ,  H05K2203/063

Abstract: An electrical circuit apparatus (300) that includes: a substrate (330) having a ground layer (336), at least one device aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate such that at least a portion of the substrate device aperture overlaps the heat sink, the adhesive layer having at least one device aperture and at least one solder aperture, wherein aligning the at least one substrate solder aperture with the at least one adhesive layer solder aperture and aligning the at least one substrate device aperture with the at least one adhesive layer device aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.

Abstract translation: 一种电路设备（300），包括：具有接地层（336），至少一个器件孔（332）和至少一个焊料孔（334）的衬底（330）; 散热器（310）; 以及用于将所述散热器机械耦合到所述基板的接地层的粘合剂层（320），使得所述基板装置孔的至少一部分与所述散热器重叠，所述粘合剂层具有至少一个装置孔和至少一个焊料 孔，其中将所述至少一个衬底焊接孔与所述至少一个粘合剂层焊接孔对准并且将所述至少一个衬底器件孔与所述至少一个粘合剂层器件孔对准使得焊料在所述散热器和所述散热器之间的预定区域中润湿 衬底的接地层。

公开(公告)号：US20050023668A1

公开(公告)日：2005-02-03

申请号：US10901168

申请日：2004-07-29

Applicant: Nobuaki Ebihara ,  Naoshi Suzuki

Inventor： Nobuaki Ebihara ,  Naoshi Suzuki

IPC: H01L25/18 ,  H01L25/10 ,  H01L25/11 ,  H05K1/14 ,  H05K3/32 ,  H05K3/34 ,  H01L23/02

CPC classification number: H05K1/141 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H05K1/144 ,  H05K1/145 ,  H05K3/321 ,  H05K3/3421 ,  H05K2201/0397 ,  H05K2201/10477 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2201/10969 ,  H01L2924/00

Abstract: To mount a TSOP on an interposer substrate, leads provided to the TSOP are joined to pads of the interposer substrate by a thermosetting conductive resin, and the TSOP exclusive of the leads is joined to ground layers formed in the interposer substrate by a thermosetting conductive resin. The interposer substrates with the TSOPs mounted thereon are stacked in eight layers in such a manner that the TSOPs face downward. Then, leads of the upper interposer substrate are joined to pads formed in the rear face of the lower interposer substrate by a thermosetting conductive resin, so that the interposer substrates adjacent in a vertical direction are connected.

Abstract translation: 为了将TSOP安装在插入物基板上，通过热固性导电树脂将提供给TSOP的引线接合到插入器基板的焊盘，并且引线之外的TSOP通过热固性导电树脂与形成在插入器基板中的接地层接合 。 将其上安装有TSOP的插入物基板以使得TSOP面向下的方式以8层层叠。 然后，通过热固性导电树脂将上部插入器基板的引线接合到形成在下部插入器基板的后表面中的焊盘，使得在垂直方向上相邻的插入器基板被连接。