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    Fabrication of integrated semiconductor circuit involves bringing substrate as electrode into contact with electrolysis liquid and carrying out electrolysis
    12.
    发明专利
    Fabrication of integrated semiconductor circuit involves bringing substrate as electrode into contact with electrolysis liquid and carrying out electrolysis 未知

    公开(公告)号：DE10147894A1

    公开(公告)日：2003-02-20

    申请号：DE10147894

    申请日：2001-09-28

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SCHREMS MARTIN ,  KIRCHHOFF MARKUS

    IPC: H01L21/316 ,  H01L21/762 ,  H01L21/8242 ,  H01L21/306

    Abstract: An integrated semiconductor circuit is fabricated by bringing substrate as electrode into contact with electrolysis liquid and carrying out electrolysis, so as to selectively grow material on inner wall of the recess while the insulating layer prevents the material from growing outside the recess, and convert the reserve material into the material that is grown by electrolysis. Fabrication of integrated semiconductor circuit comprises forming recess or recesses in a surface of a semiconductor substrate (2), epitaxially depositing a reserve material on an inner wall (4) of the recess, producing an electrically insulating layer (6) on the surface of the substrate outside the recess. The substrate is brought as electrode into contact with an electrolysis liquid (7) and electrolysis is performed, so as to selectively grow the material on the inner wall of the recess while the insulating layer prevents the material from growing outside the recess, and convert the reserve material into the material that is grown by electrolysis.

    13.
    发明专利
    未知

    公开(公告)号：DE19961103C2

    公开(公告)日：2002-03-14

    申请号：DE19961103

    申请日：1999-12-17

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ROGALLI MICHAEL ,  KIRCHHOFF MARKUS ,  WEGE STEPHAN

    IPC: H05K1/03 ,  H01L21/283 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/314

    Abstract: Electric wiring of an IC comprises: a base body (1); a conductive layer (2) patterned into two conductor tracks (3,4) with a trench (5) between; and a dielectric layer (9) on the conductive layer, at least partially filling the trench. The dielectric layer is at least one polymer selected from polybenzoxazole, polynorbornene and derivatives. Independent claims are also included for: (a) electrical wiring, in which the polymer material is selected from fluorinated derivatives of polybenzoxazole, polynorbornene, polyimide and perylene polymer; and (b) a process to produce the electrical wiring, by: forming the conductive layer (2) on a base body (1), patterning and spin coating at least one dielectric polymer layer onto the conductive layer so the trench (5) is at least partially filled.

    18.
    发明专利
    未知

    公开(公告)号：DE10153310A1

    公开(公告)日：2003-05-22

    申请号：DE10153310

    申请日：2001-10-29

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： KIRCHHOFF MARKUS ,  WEGE STEPHAN ,  STEGEMANN MAIK ,  VOGT MIRKO

    IPC: G03F7/36 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/314 ,  G03F7/40

    Abstract: A carbon hard mask layer is applied to a substrate to be patterned by means of a plasma-enhanced deposition process in such a manner that it has a hardness comparable to that of diamond in at least one layer thickness section. During the production of this diamond-like layer thickness section, the parameters used in the deposition are set in such a manner that growth regions which are produced in a form other than diamond-like are removed again in situ by means of subsequent etching processes and that diamond-like regions which are formed are retained.

    19.
    发明专利
    未知

    公开(公告)号：DE10036725C2

    公开(公告)日：2002-11-28

    申请号：DE10036725

    申请日：2000-07-27

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： KIRCHHOFF MARKUS

    IPC: H01L21/768 ,  H01L21/316

    Abstract: A method for fabricating an insulator on a semiconductor substrate such that the insulator has a low dielectric constant. A first interconnect and a second interconnect are configured on a semiconductor substrate. A conductive silicon is formed between the first interconnect and the second interconnect. The conductive silicon is anodically etched in a hydrofluoric-acid-containing electrolyte to convert the conductive silicon into porous silicon. The porous silicon is subsequently oxidized to form porous silicon oxide. With a dielectric constant of between 1.1 and 4, the porous silicon oxide has a lower dielectric constant than customary silicon oxide with 4.

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