公开(公告)号：JPH07200262A

公开(公告)日：1995-08-04

申请号：JP30086194

申请日：1994-12-05

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI MITSUHIRO ,  CHIYOU SEIRIYUU ,  RI AKINARI

IPC: G06F7/52 ,  G06F7/50 ,  G06F7/535 ,  G06F7/72 ,  G09C1/00 ,  G06F7/38

Abstract: PURPOSE: To provide a method for decreasing the mean number of times of addition execution, and increasing the reduction speed by fixing the number of times of the addition necessary for one time of the execution of a reduction algorithm to the maximum two times. CONSTITUTION: A method for modulo reduction using a preliminary calculation table is provided with a first stage in which a value stored in a table with the number of upper log2 t (t>=1) bits for reduction as an index is retrieved, and added to the number of lower (n) (n>=512) bits, and a second stage in which when overflow (1bit) is generated as the result of the addition of the number retrieved in the table to the number of the lower (n) bits in the first stage, the overflow is removed, and the execution of the arithmetic operation is ended. Moreover, this method is provided with a third state in which when the overflow is not generated in the second stage, N on modulo N is added to the result in the first stage, and the execution of the arithmetic operation is ended.

公开(公告)号：JPH07170200A

公开(公告)日：1995-07-04

申请号：JP22032294

申请日：1994-09-14

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： I BOMU CHIYORU ,  IMU SON YORU ,  KIMU JIYON SHIKI

IPC: H03M13/00 ,  H03M13/09 ,  H03M13/33 ,  H04L1/00 ,  H04L7/00

Abstract: PURPOSE: To identify the boundary of a block only by performing the arithmetic operation of the newly added number of bytes or the number of bytes removed from the block, and outputs byte-synchronized and block-synchronized data before the starting point of the block. CONSTITUTION: A block synchronization identifying part 24 detects 8 syndrome outputs from an arithmetic part 23 with each byte time interval in a block synchronizing state. Then, when results whose remainders are 0 are outputted continuously (j) times from a syndrome output terminal, a block synchronizing state is declared, and the block synchronizing state is outputted. Also, when results whose remainders are not 0 are outputted continuously (i) times from the syndrome output terminal which detects the block synchronizing state, the block asynchronizing state is restored, and the state is outputted, and a byte unit detection process is executed. Moreover, the syndrome output which detects the block synchronizing state is identified, and outputted as 3 bit data so that a point of time when the remainder 0 is periodically outputted can be synchronized with the outputted byte interval.

公开(公告)号：JPH07152717A

公开(公告)日：1995-06-16

申请号：JP18860694

申请日：1994-08-10

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： SAI CHINEI ,  KICHI TOSHIKAGE

IPC: G06G7/60 ,  G06F15/18 ,  G06N3/08

Abstract: PURPOSE: To be practical from the side of a learning data number and an element function by applying a linearity learning method between an output layer and a hidden layer and a nonlinearity learning method between the hidden layer and input and estimating a network variable. CONSTITUTION: In the stage S1 of learning composed of the input layer, the hidden layer and the output layer, a new input learning pattern is introduced to a nonlinearity estimation network, the output of the nonlinearity estimation network is obtained in the stage S2 and the error is obtained. Then, whether or not the error is larger than a prescribed error reference value is discriminated in the stage 3. In the case that the error is not larger than the reference value, as the stage S5, whether or not to input the entire learning data to the nonlinearity estimation network is discriminated and the mean square error of the nonlinear estimation network is obtained in the case of inputting them. Then, as the stage S6, whether or not the mean square error is larger than a prescribed stipulated error is discriminated, and in the case that the mean square error is larger than the stipulated error, the error reference value is reduced for a prescribed error reduction value and a first stage is returned.

公开(公告)号：JPH07123074A

公开(公告)日：1995-05-12

申请号：JP4919594

申请日：1994-03-18

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： KIMU YON SOBU ,  CHIE SON IN ,  PAKU HON SHIKI

IPC: H04K1/04 ,  H04L9/12 ,  H04L9/22 ,  H04Q3/00 ,  H04L12/28

Abstract: PURPOSE: To process parallelly distributed samples for an ATM physical layer at a slower operation speed by processing transmission data parallelly for 8 bits by using a common semiconductor element. CONSTITUTION: When an optional value not '0' is set by using initial value setting signals SETB at the time of initialization, a PRBS generator 22 generates the random number of the 8 bits for executing a prescribed generating polynomial (X +X +1) for distributed sample descrambling. A descrambler 21 adds output signals PN7-PN0 from the generator 22, performs descrambling and then, outputs the next descrambled data TD7-TD0. A sample processor 23 extracts a second bit which is ATM cell data in the random number to be added to a fifth octet and a sixth bit in the random number to be added to a 31st octet and outputs synchronizing signals CRR1 and CRR0 for synchronizing the generator 22.

公开(公告)号：JPH0772516A

公开(公告)日：1995-03-17

申请号：JP16439594

申请日：1994-07-15

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KAN SENKEI ,  RI SHIYOUTAI ,  YU HEISHIYUU ,  TEI YASUMICHI ,  SAI EIKAN ,  BOKU HEIUN ,  RI KAZUTSUNE

IPC: G02F1/015 ,  G02F1/01 ,  G02F1/35 ,  H01L27/14 ,  H01L31/00

Abstract: PURPOSE: To provide an ultra-high speed optical switching element which is operative at ordinary temp. and is capable of overcoming the threshold of switching of a several tens nanosecond band. CONSTITUTION: If incident light 4 passes a first multiple quantum well structure 1 changed in the properties of light by control light 3, transmitted light 5 is so changed as to have an increased light quantity by exposure development. When this light passes a second multiple quantum well structure 2, the exposure development by this second multiple quantum well structure 2 is increased by the exposure development by the changed light during the first several picoseconds and the quantity of the transmitted light 5 is eventually increased. Namely, the intensity of the transmitted light 5 increases in the short time band. On the other hand, the second MQWS acts as an absorber and the transmitted light quantity is increased during several picoseconds in the long time zone past the several picoseconds. The long time constant is offset by the second MWQS and an off-time is shortened.

公开(公告)号：JPH06202009A

公开(公告)日：1994-07-22

申请号：JP28153093

申请日：1993-11-10

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： BOKU GIYONRIYUU ,  BOKU SHINSHIYOU ,  BOKU KIYOUMO

IPC: G02F3/00 ,  B81B3/00 ,  B81C1/00 ,  G02B26/02 ,  G02B26/08 ,  H02N1/00

Abstract: PURPOSE: To provide an optical open/close equipment where a micro-electrostatic actuator produced only by semiconductor process is utilized and its producing method. CONSTITUTION: Positive and negative voltages are applied to a selection electrode 3 and a signal electrode 2, to make a traveling element 12 electrified. When the impressed voltage polarity of the signal electrode 2 changes instantaneously, an electric charge electrified to be band-shaped at a traveling element side does not immediately react, owing to the resistance of the travelling element 12. Therefore, driving force for moving the travelling element 12 to a left side occurs together with the repulsion between the travelling element 12 and the electrode 2, so that a shutter travelling element 12 is moved.

公开(公告)号：JPH0661339A

公开(公告)日：1994-03-04

申请号：JP11609392

申请日：1992-05-08

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIYOU SOUGEN ,  YANAGI KENKEI ,  KIYOU GENKIYUU

IPC: H01L21/304 ,  H01L21/02 ,  H01L21/74 ,  H01L21/762 ,  H01L21/822 ,  H01L21/8242 ,  H01L23/52 ,  H01L23/535 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L27/12 ,  H01L21/76

Abstract: PURPOSE: To improve the area efficiency of a wafer by forming an SOI substrate where an arbitrary structure with electrical characteristics are buried between a seed wafer and a handle wafer. CONSTITUTION: Before a seed wafer 21 and a handle wafer 36 are joined, conductive or resistive films 27, 29, and 33 are evaporated in multiple layers on the seed wafer 21 and an arbitrary structure 32 (for example, a capacitor, a resistor, and a connecting wire) with electrical characteristics are formed individually or compoundly. Then, a surface where the structure 31 is formed is adhered to the handle wafer 36, thus manufacturing an SOI substrate and hence overlapping an arbitrary structure 31 inside an active region 37 but also wiring a metal wire on the upper and lower surfaces of the SOI substrate independently and hence improving the area efficiency of the wafer.

公开(公告)号：JPH0635172A

公开(公告)日：1994-02-10

申请号：JP12390793

申请日：1993-05-26

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： GO YOUKO ,  ZEN EICHIN ,  KURUMA SAIGEN ,  KIN TAKASHIGE

IPC: G03F1/00 ,  G03F1/68 ,  G03F7/20 ,  H01L21/027 ,  G03F1/08

Abstract: PURPOSE: To improve the resolution and the focal depth by improving the property of light made incident on a main mask (or passing the main mask), namely, the angle of incidence (or the angle of transmission) of light and the distribution based on this angle in the mask level other than the exposure equipment level. CONSTITUTION: A mask is provided which has dummy diffraction layers 20 and 20a used as an auxiliary with a main mask at in executing a lithography process with a light exposure equipment. When the exposure equipment using deformation illumination and a super-resolution filter is used, these dummy diffraction layers 20 and 20a are used as an aid together with the main mask 10 and are constituted into a minute repeat pattern where an image is not transmitted to a wafer.

公开(公告)号：JPH05226598A

公开(公告)日：1993-09-03

申请号：JP31476492

申请日：1992-11-25

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： GO MITSUTATSU ,  RI YUUTAKU

IPC: H01L27/14 ,  H01L21/8252 ,  H01L27/095 ,  H01L27/144 ,  H01L31/10 ,  H01L31/105 ,  H01L31/18

Abstract: PURPOSE: To provide a photoelectric integration device for reception and its manufacture by which reception sensitivity, high-speed operation and reliability can be improved, packaging process can be simplified and the manufacturing cost can be reduced. CONSTITUTION: A photoelectric integration device comprises a photosensor and a transistor formed on a substrate. The photosensor comprises an n-type channel layer (n-InGaAs), an etching-blocking layer (u-Inp), and an absorbing layer (u-InGaAs) which are formed as mesa-types on a part of a semi-insulating substrate (S, I-INP) which is etched up to a specified depth. A transistor comprises an n-type channel layer (n-InGaAs), an etching-blocking layer (u-Inp), and a p-type InP layer which are formed as reverse mesa-type on a part of the semi-insulating substrate which is not etched.

公开(公告)号：JPH05182959A

公开(公告)日：1993-07-23

申请号：JP33062091

申请日：1991-12-13

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI KIKOU ,  KIN DAIYOU ,  KIN OUSHIYU

IPC: H01L21/76 ,  H01L21/316

Abstract: PURPOSE: To provide an element isolating method with good electric characteristics even for the isolation of a 0.5 μm design role essential to the development of a highly integrated element of >=16 M bits as one of isolating methods utilizing a silicon substrate by making good use of polysilicon and eliminating a bird's beak generated by a LOCOS method. CONSTITUTION: This is a method which uses polysilicon as a material of silicon at the time of oxidation so as to form oxide for element separation; and an oxide film 12 is grown on the silicon substrate 11 and a nitride film 13 is formed to form a nitride film pattern as well as the LOCOS method. After oxide grown by etching and oxidizing a polysilicon film 15 is etched to above the nitride film by utilizing an etching baking process, the nitride film and oxide film are etched similarly to the advance in the LOCOS process to form the oxide for element separation.