公开(公告)号：JPH07298301A

公开(公告)日：1995-11-10

申请号：JP10261595

申请日：1995-04-26

Applicant: CONS RIC MICROELETTRONICA ,  ST MICROELECTRONICS SRL

Inventor： MANCUSO MASSIMO ,  POLUZZI RINALDO ,  RIZZOTTO GIANGUIDO

IPC: H04N5/92 ,  H04N5/44 ,  H04N9/80 ,  H04N11/20

Abstract: PURPOSE: To provide high resolution of video and to eliminate the defects of conventional techniques by providing a calculation block which is connected to an input terminal and operated by a fuzzy-logic based processing method and which executes a switch between at least two different interpolation processing methods. CONSTITUTION: For a TV signal scanning converting device 1, luminance/ chrominance signals CFy and CFuv and signals PFy and PFuv corresponding to image fields are inputted to an interface(IF) 2. The IF 2 is operated with a fuzzy logic and supplies TV signals components Xy and Piy to input terminals Pi and X of a filtering block 3. A calculation block CALC1 is operated with a fuzzy logic processing method, receives a luminance component Y and detects the front and motion of a TV signal, while utilizing information in two continuous image fields. On the other hand, an arithmetic block 5 inputs an average parameter, which is calculated based on pixels (Pi , Pj and x) of image fields, to the calculation block CALC1 . A block MAX calculates and outputs the peak value of plural signals to be inputted.

公开(公告)号：JPH07271593A

公开(公告)日：1995-10-20

申请号：JP5921395

申请日：1995-03-17

Applicant: CONS RIC MICROELETTRONICA

Inventor： MATSUSHIMO ABURUZETSUSE ,  BIAJIYO JIYAKAROONE

IPC: G06F9/44 ,  G06N7/02 ,  G06N7/04

Abstract: PURPOSE: To eliminate the disadvantage of the conventional technique while the high calculating speed of membership functions and the optimization of storage are maintained. CONSTITUTION: In a method for storing the membership function (FA) of a logical variable defined in a discussed region (U) distinguished with a finite number of points (m), the apex of each membership function is stored in the first part of the corresponding stored word and the inclination on each side of the apex is stored in the second and third parts.

公开(公告)号：JPH07271592A

公开(公告)日：1995-10-20

申请号：JP5921495

申请日：1995-03-17

Applicant: CONS RIC MICROELETTRONICA

Inventor： MATSUSHIMO ABURUZETSUSE ,  BIAJIYO JIYAKAROONE

IPC: G06F9/44 ,  G05B13/02 ,  G06N7/02 ,  G06N7/04

Abstract: PURPOSE: To reconstitute the expectation value α a membership function (FA) stored as a significant value at each point in a discussed region (U). CONSTITUTION: A calculation circuit 8 is provided with a microprocessor 9, a storing section 5, an interface 13, and a calculator 11. The storing section 5 stores FAs from the microprocessor 9 and the calculator 11 is connected to the storing section 5, microprocessor 9, and interface 13 and decides the value of each FA at each point in the U by using the stored apexes and inclinations of the FA.

公开(公告)号：JPH07260838A

公开(公告)日：1995-10-13

申请号：JP31904394

申请日：1994-11-29

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： PALARA SERGIO ,  SUERI STEFANO

IPC: G01R31/26 ,  F02P3/05 ,  G01R19/165 ,  H03K17/08 ,  H03K17/64

Abstract: PURPOSE: To generate a diagnostic signal indicating reach of current flowing through a power transistor in a presetting level by driving the first circuit, in which maximum current is restricted by a single signal serving as a function of the voltage difference, and a threshold circuit generating the diagnostic signal. CONSTITUTION: A comparator is constructed of a differential amplifier A which can generate a signal as a function of the difference between a reverence voltage E1 and a voltage in a sensing resistor RS, through which current IC flowing in a power transistor T1 (and a load L) flows. The signal generated by the comparator A drives two circuits. The first circuit (LIMITATOR) generates a restriction signal for the maximum current flowing in the transistor T1 and works on a driving circuit (DRIVE) transmitting driving current to the transistor T1 . The second circuit (DIAGNOSTIC) is set by the first circuit and generates a diagnostic signal VD, after the current IC reaches a value smaller than the limit value for the current IC by the previously set value.

公开(公告)号：JPH07184367A

公开(公告)日：1995-07-21

申请号：JP8430594

申请日：1994-04-22

Applicant: CONS RIC MICROELETTRONICA

Inventor： SERUJIO PARAARA ,  SUTEFUAANO SERI ,  DONATO TARIIBIA

IPC: G05F1/56 ,  H02M1/08 ,  H03K17/00 ,  H03K17/08 ,  H03K17/16 ,  H03K17/64

Abstract: PURPOSE: To provide a control circuit for slowing tuning off a semiconductor power transistor, especially for inductive loads. CONSTITUTION: This control circuit possesses means R1, R2, and 18 for limiting the load current flowing to the switch, and clocking and control circuits 11, 12, and 13, and guarantees to turn off a switch slowly with a specified delay, when it reaches the maximum load current value regardless of the duration of command pulses, whereby it keeps the power diffusion through the switch in load current limiting phase, moreover keeps the turn off overvoltage on or under a specified level.

公开(公告)号：JPH07183302A

公开(公告)日：1995-07-21

申请号：JP22960994

申请日：1994-09-26

Applicant: CONS RIC MICROELETTRONICA

Inventor： RAFUAERE ZANBURAANO

IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L29/417 ,  H01L29/78

Abstract: PURPOSE: To prevent damage, e.g. penetration of a metal layer, during a bonding process by setting the thickness of a metallizing region at least two times as thick as a metal interconnection line. CONSTITUTION: A first metal layer 12 is etched selectively and coated with a layer of passivation material, e.g. phosphorus silicate glass, after an interconnection line pattern is defined between cells 1. The passivation layer 13 is then removed selectively at the parts corresponding to bonding areas 14, 15 and a second metal layer 16 is connected with the first metal layer 12. In this regard, the second metal layer 16 has same composition as the first metal layer 12 and formed thicker than the first metal layer 12. Since a cell 1 is not subjected to damage during a process for connecting wires 17, 18, a dedicated area for bonding is not required and the surface area of a chip can be decreased furthermore.

公开(公告)号：JPH06349431A

公开(公告)日：1994-12-22

申请号：JP613591

申请日：1991-01-23

Applicant: CONS RIC MICROELETTRONICA

Inventor： MARIO RASUPARIISHI ,  KANDEIIDO MEDEYURATSU

IPC: C23C14/48 ,  H01J27/08 ,  H01J27/22 ,  H01J37/08 ,  H01J37/317 ,  H01L21/265

Abstract: PURPOSE: To provide a Freeman-type ionizer which can be used for a commercial ion implanter and can ionize metals having a high melting point, while maintaining conventional operation. CONSTITUTION: This ionizer is provided with a cylindrical casing 1, having an inside cavity 2 and a flange, an arc chamber 15 which is superposed on its outside upper part and contains a filament 20 to which electric power is supplied by passing through power supply conductors 8, 7 and 6 supported by the flange, a repulsive plate 21 held at a negative voltage by the power supply conductors and an inlet for gas to be ionized. A support 23 for metal 24 to be ionized, which is supported by a rod 9 passing through the inside cavity of the cylindrical casing and electrically connected to an electrode 13, exists on the inside of the arc chamber.

公开(公告)号：JPH0653510A

公开(公告)日：1994-02-25

申请号：JP15092991

申请日：1991-05-28

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： ZAMBRANO RAFFAELE ,  GRIMALDI ANTONIO

IPC: H01L21/8249 ,  H01L21/76 ,  H01L27/06 ,  H01L27/088 ,  H01L29/78 ,  H01L29/784

Abstract: PURPOSE: To maximize the breakdown voltage, without compromising the series resistance of a power stage and reliability of the device by making the min. distance of a structure junction from an embedded drain region shorter than or equal to that of this region from the junction of the peripheral region. CONSTITUTION: In a possible embodiment for the terminal of a power stage, a min. distance d1 between an embedded drain region 6 and this insulation region 9 is made smaller than that d2 between the buried drain region 9 from a junction 10, lying between a substrate and drain. In creating a device region 15, a substrate-drain junction 10 of an MOS power transistor must be connected to the region 9, as described above. The terminal length given from the region 9 is equal to the sum of the side face diffusions of the insulation regions, its photo-masked opening and error layout allowance. Its structure can maximize the operating voltage, without changing the series resistance of the power stage.

公开(公告)号：JPH09232567A

公开(公告)日：1997-09-05

申请号：JP29406296

申请日：1996-11-06

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： FURISHINA FUERUTSUCHIO ,  FUEERA JIYUSETSUPE ,  RINAUDO SARUBUATOORE

IPC: H01L21/336 ,  H01L29/08 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To reduce the capacitance between a gate and a drain by providing a basic unit having a first specific resistance value and formed in a semiconductor material layer, and a low-dope region having a second specific resistance value greater than the first specific resistance value. SOLUTION: A low-dope semiconductor layer 2 is formed on a high-dope semiconductor substrate 1. The epitaxial layer 2 forms a common drain layer, and a basic function unit has a main frame region 3 of P-conduction type. A high-dope source region 4 of N-conduction type is provided inside the main frame region 3. The top surface of the epitaxial layer 2 is covered with an insulating gate layer, and a hole is opened therein on the main frame region 3. The insulating gate layer is covered with an insulating material layer 7, and a contact window is opened therein on the main frame region 3. A region 20 having the same conduction type as and higher specific resistance than the epitaxial layer 2 is provided on the lower side of the main frame region 3. Thus, a MOS gate power device having low output resistance and low capacitance may be provided.

公开(公告)号：JPH09172337A

公开(公告)日：1997-06-30

申请号：JP15105096

申请日：1996-06-12

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： BRUCCOLERI MELCHIORRE ,  DEMICHELI DAVIDE ,  DEMICHELI MARCO ,  PATTI GIUSEPPE

IPC: H03G3/30 ,  G11B5/02 ,  H03G1/00 ,  H03G3/20

Abstract: PROBLEM TO BE SOLVED: To provide a circuit automatically adjusting the gain of a diffenteial amplifier which is satisfactory operated even when ununiform signal is amplified. SOLUTION: The circuit is provided with a duplex half wave rectifier(DHWR) connected tot he output of the differential voltage gain amplifier(VGA) generating two quantities depending on the amplitude of the half wave of the output signal of the amplifier(VGA), two compactors (COMP1 and COMP2) respectively provided with reference inputs (IN-1 and IN-2) for generating the output signal of each when inputs (IN+1 and IN+2) connected to the output (OUT1 and OUT2) of this rectifier (DHWR) and the amplitudes of the respective half eaves become larger than a level impressed to reference inputs (IN-1 and IN-2), and processing means (str1, A1, R1, Str2, A2, R2 and C) generating signals for the gain adjustment of the amplifier depending on the duration time of the output signal of the two compactors.