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61.发明授权Low-EMI electronic apparatus, low-EMI circuit board, and method of manufacturing the low-EMI circuit board 失效低EMI电子设备，低EMI电路板以及制造低EMI电路板的方法公开(公告)号：US06707682B2
公开(公告)日：2004-03-16
申请号：US09956909
申请日：2001-09-21
Applicant: Yutaka Akiba , Yasunori Narizuka , Hirayoshi Tanei , Naoya Kitamura
Inventor： Yutaka Akiba , Yasunori Narizuka , Hirayoshi Tanei , Naoya Kitamura
IPC: H05K118
CPC classification number: H05K1/0246 , H01L23/5383 , H01L23/552 , H01L25/16 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/16152 , H01L2924/19105 , H01L2924/19106 , H01L2924/3011 , H01L2924/3025 , H05K1/0227 , H05K1/0231 , H05K1/0234 , H05K1/092 , H05K1/113 , H05K1/115 , H05K1/162 , H05K1/167 , H05K3/403 , H05K3/4053 , H05K3/429 , H05K3/4611 , H05K3/4614 , H05K3/4652 , H05K3/467 , H05K9/0039 , H05K2201/0209 , H05K2201/0715 , H05K2201/093 , H05K2201/09309 , H05K2201/09354 , H05K2201/09509 , H05K2201/09518 , H05K2201/09563 , H05K2201/09663 , H05K2201/0979 , H05K2201/10022 , H05K2201/10045 , H05K2201/10446 , H05K2201/10636 , H05K2201/10689 , Y02P70/611 , Y10T29/49155 , H01L2224/0401
Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation of a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.
Abstract translation: 通过将电源层的电位波动相对于在切换IC器件等而发生的接地层的电位波动转换为基底中的焦耳热而不使用任何部件作为对策来实现高安装密度的低EMI电路 针对EMI。 还公开了其结构，使用它的电路板以及制造电路板的方法。 从电源层和接地层观察的固体层之间的杂散电容的Q值的平行板线等效地减少，并且通过形成其中电阻器（电阻层）和另一接地层的结构匹配地终止 除了在多层电路板上的电源层和接地层之外提供。 还公开了封闭的屏蔽结构。
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62.发明申请公开(公告)号：US20030030510A1
公开(公告)日：2003-02-13
申请号：US10192155
申请日：2002-07-11
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Tomohiro Sasaki , Takahiro Azuma , Shigekatsu Yamamoto
IPC: H03H007/00
CPC classification number: H03H7/0115 , H03H2001/0085 , H05K1/0243 , H05K3/3442 , H05K2201/09381 , H05K2201/09954 , H05K2201/10045 , Y02P70/613
Abstract: A multilayered LC composite component includes a main body having a pair of side surfaces, a pair of end surfaces, and an upper surface and a lower surface. Ground-side terminal electrodes are disposed at the center of the side surfaces and hot-side terminal electrodes are disposed along edges of the side surfaces. Each of the hot-side terminal electrodes includes an end surface extended portion extending to each of the end surfaces. The end-surface extended portion is arranged so that at least the approximate center of each of the end surfaces is exposed.
Abstract translation: 多层LC复合部件包括具有一对侧面，一对端面以及上表面和下表面的主体。 接地侧端子电极设置在侧面的中心，热侧端子电极沿着侧面的边缘设置。 每个热侧端子电极包括延伸到每个端面的端面延伸部分。 端面延伸部分被布置成使得至少每个端面的大致中心被露出。
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63.发明授权公开(公告)号：US06278356B1
公开(公告)日：2001-08-21
申请号：US09572142
申请日：2000-05-17
Applicant: Wen-Yen Lin , Lin-Yeh Chen , Chin-Chi Chang , Shih-Ting Huang
Inventor： Wen-Yen Lin , Lin-Yeh Chen , Chin-Chi Chang , Shih-Ting Huang
IPC: H01L1012
CPC classification number: H05K1/167 , H05K1/095 , H05K1/162 , H05K3/064 , H05K2201/09763 , H05K2201/10045
Abstract: A flat, built-in resistor and capacitor has a substrate (10) made of dielectric material; a copper layer (12) formed on each surface of the substrate (10) and having an etched image (30) formed in each of the copper layers (12); a dielectric material layer (40) printed onto the copper layer (12) and filling up the etched image; and a resistance layer (50) printed onto the copper layer (12) and the dielectric material layer (40).
Abstract translation: 扁平的内置电阻器和电容器具有由电介质材料制成的衬底（10）; 形成在所述基板（10）的每个表面上并具有形成在每个所述铜层（12）中的蚀刻图像（30）的铜层（12）。 印刷在所述铜层（12）上并填充所述蚀刻图像的介电材料层（40）; 和印刷在铜层（12）和电介质材料层（40）上的电阻层（50）。
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公开(公告)号：US4899126A
公开(公告)日：1990-02-06
申请号：US293416
申请日：1989-01-04
Applicant: Takeharu Yamada
Inventor： Takeharu Yamada
IPC: H01C1/14 , H01C7/00 , H01C13/02 , H01C17/24 , H01C17/28 , H01L27/01 , H05K1/03 , H05K1/09 , H05K1/16 , H05K3/28
CPC classification number: H01C17/281 , H05K1/167 , H05K3/28 , H05K1/0306 , H05K1/092 , H05K1/095 , H05K2201/09236 , H05K2201/10045 , H05K2203/1453 , Y10T29/49101
Abstract: A thick film resistor type printed circuit board including an insulating substrate, a plurality of pairs of terminal electrode layers made of silver and formed on the insulating substrate, a plurality of resistor layers formed on the terminal electrode layers so as to connect the pairs of the terminal electrode layers, respectively, a plurality of wiring conductive layers made of copper and connected to predetermined ones of the terminal electrode layers so as to coat the predetermined ones of the terminal electrode layers and a protective layer for covering at least a portion of the insulating substrate, in which portion the terminal electrode layers and the resistor layers are formed.
Abstract translation: 一种厚膜电阻器型印刷电路板，包括绝缘基板，多个由银制成的端子电极层，形成在绝缘基板上，多个电阻层形成在端子电极层上，以便连接成对的 端子电极层，分别由铜制成并与预定的端子电极层连接的多个布线导电层，以覆盖预定的端子电极层和用于覆盖绝缘的至少一部分的保护层 衬底，其中形成端子电极层和电阻器层。
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公开(公告)号：US4857002A
公开(公告)日：1989-08-15
申请号：US572173
申请日：1984-01-18
Applicant: William T. Jensen , Vincent B. Brown , Cathy J. Edgerton , Robert W. Masterson
Inventor： William T. Jensen , Vincent B. Brown , Cathy J. Edgerton , Robert W. Masterson
CPC classification number: H01R12/7082 , H05K1/167 , H01R12/585 , H05K1/095 , H05K1/141 , H05K2201/10045 , H05K2201/10189 , H05K3/3447 , H05K3/42
Abstract: A compact terminator for interconnecting computer devices with each other and with peripheral equipment having contact ends to be interconnected with connectors. The contacts are interconnected on a circuit board employing thick film circuitry mounted thereon. The contacts are press fitted in plated through holes on the circuit board and form male or female connectors at one end. The device may be a differential or single ended type.
Abstract translation: 一种紧凑的终端器，用于将计算机设备彼此互连，并且具有外围设备，其具有与连接器互连的接触端。 触点在使用安装在其上的厚膜电路的电路板上互连。 触点压配在电路板的电镀通孔中，并在一端形成阳或阴连接器。 该器件可以是差分或单端型。
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Patent Agency Ranking
公开(公告)号：KR1020150018143A
公开(公告)日：2015-02-23
申请号：KR1020130094692
申请日：2013-08-09
Applicant: 삼성전기주식회사
CPC classification number: H01F29/00 , H01F27/2804 , H01F27/292 , H01F27/40 , H01F2027/2809 , H01G4/005 , H01G4/01 , H01G4/012 , H01G4/12 , H01G4/1209 , H01G4/228 , H01G4/232 , H01G4/30 , H01G4/40 , H03H7/0115 , H05K1/111 , H05K2201/10015 , H05K2201/1003 , H05K2201/10045 , Y02P70/611
Abstract: 본 발명은 복수의 유전체층과 상기 유전체층을 사이에 두고 서로 대향하도록 배치되는 내부전극이 적층된 세라믹 본체로 이루어진 커패시터와 도전 패턴과 동일한 층으로 형성되는 다수의 자성체가 적층된 자성체 본체로 이루어진 인덕터가 결합된 육면체 형상의 복합체; 상기 복합체의 제1 단면에 형성되며, 상기 인덕터의 도전 패턴과 연결되는 입력단자; 상기 복합체의 제2 단면에 형성되며, 상기 인덕터의 도전 패턴과 연결되는 제1 출력단자와 상기 복합체의 제2 측면이며, 상기 커패시터의 상하면 및 제2 측면 중 어느 하나 이상에 형성된 제2 출력단자를 포함하는 출력단자; 및 상기 복합체 중 상기 커패시터의 상하면 및 제1 측면 중 어느 하나 이상에 형성되며, 상기 커패시터의 내부전극과 연결되는 그라운드 단자;를 포함하는 복합 전자부품에 관한 것이다.
Abstract translation: 本发明涉及一种复合电子元件，它包括一个六面体复合材料，该六面体复合材料与由多个电介质层组成的电容器和陶瓷体组成，内部电极通过介电层层叠在一起而面对彼此， 电感器，其由其上形成有与导电图案相同的层的多个磁性元件层叠的磁体组成，输入端子形成在复合体的第一横截面上并连接到复合材料的导电图案 电感器，形成在复合体的第二截面上的输出端子，并且包括连接到电感器的导电图案的第一输出端子和形成在复合材料的第二侧上的第二输出端子 和电容器的下侧，以及形成在c的第一侧或上侧和下侧的接地端子 复合材料中的绝缘体并连接到电容器的内部电极。
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公开(公告)号：KR100843216B1
公开(公告)日：2008-07-02
申请号：KR1020060125656
申请日：2006-12-11
Applicant: 삼성전자주식회사
CPC classification number: H01C1/144 , H01C1/01 , H01C7/18 , H05K3/3436 , H05K3/3442 , H05K2201/09172 , H05K2201/10045 , Y02P70/613
Abstract: 솔더볼 접합이 가능한 칩 네트워크 저항기 및 이를 포함하는 반도체 모듈에 관해 개시한다. 이를 위해 본 발명은 칩 네트워크 저항기가 인쇄회로기판에 실장된 후, 외부 전극이 바깥으로 노출되지 않으며, 측면 접합 방식이 아닌 저항기 몸체의 하부면을 통해 인쇄회로기판과 접합되는 구조의 솔더볼 접합이 가능한 칩 네트워크 저항기 및 이를 포함하는 반도체 모듈을 제공한다. 이에 따라 칩 네트워크 저항기에서 발생하는 전극의 벗겨짐(peeling), 몸체 깨짐(body broken)을 억제하고 신뢰도 검사에서 솔더 접합 신뢰도(solder joint reliability)를 개선할 수 있다.
칩 네트워크 저항기, 솔더 접합 신뢰도, 반도체 모듈.-
公开(公告)号：JPWO2014069363A1
公开(公告)日：2016-09-08
申请号：JP2014544477
申请日：2013-10-25
Applicant: ローム株式会社
CPC classification number: H01G4/30 , H01G2/06 , H01G4/005 , H01G4/228 , H01G4/232 , H01G4/40 , H01L22/14 , H01L22/20 , H01L23/5223 , H01L24/48 , H01L27/0676 , H01L27/101 , H01L27/2409 , H01L29/66189 , H01L29/94 , H01L2224/48227 , H01L2224/49175 , H01L2924/00014 , H01L2924/0002 , H05K1/111 , H05K1/162 , H05K1/18 , H05K1/181 , H05K3/3436 , H05K2201/10015 , H05K2201/10045 , Y02P70/611 , H01L2924/00 , H01L2224/05599 , H01L2224/45099
Abstract: この発明のチップコンデンサは、基板と、前記基板上に形成された一対の外部電極と、前記一対の外部電極の間に接続されたキャパシタ素子と、前記一対の外部電極の間に、前記キャパシタ素子に対して並列に接続された双方向ダイオードとを含む。また、この発明の回路アセンブリは、この発明のチップコンデンサと、前記基板の表面に対向する実装面に、前記外部電極に半田接合されたランドを有する実装基板とを含む。
Abstract translation: 的片状电容器本发明中，一基板，一对在基板上形成外部电极，并且所述一对外部电极之间的电容器连接的元件，所述一对外部电极之间，所述电容器元件 和双向二极管并联连接到所述。 本发明的电路组件包括本发明的片状电容器，在安装面与基片相反的表面上，并粘合焊盘与外部电极的安装具有焊料板。
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公开(公告)号：JP3933849B2
公开(公告)日：2007-06-20
申请号：JP2000199456
申请日：2000-06-30
Applicant: 松下電器産業株式会社
CPC classification number: H05K3/3442 , H01C1/012 , H01G4/40 , H05K2201/10045 , H05K2201/10537 , Y02P70/613
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公开(公告)号：JP3885965B2
公开(公告)日：2007-02-28
申请号：JP2003507856
申请日：2002-03-25
Applicant: 箕輪興亜株式会社
Inventor： 永司 小林
CPC classification number: H01G2/065 , H01C1/01 , H05K3/3442 , H05K2201/09181 , H05K2201/09781 , H05K2201/10045 , Y02P70/613
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