公开(公告)号：WO2014174710A1

公开(公告)日：2014-10-30

申请号：PCT/JP2013/080268

申请日：2013-11-08

Applicant: 株式会社村田製作所

Inventor： 大坪　喜人 ,  目黒　徹 ,  菅　達典

IPC: H05K3/46 ,  H01L21/66

CPC classification number: H05K1/09 ,  H01L21/4867 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/19105 ,  H05K1/0298 ,  H05K1/112 ,  H05K1/115 ,  H05K3/0058 ,  H05K3/3436 ,  H05K3/4038 ,  H05K3/4084 ,  H05K3/42 ,  H05K3/4629 ,  H05K3/4644 ,  H05K3/4667 ,  H05K2201/0376 ,  H05K2201/0382 ,  H05K2201/09545 ,  H05K2201/09627 ,  H05K2201/09836 ,  H05K2201/09845 ,  H05K2201/1006 ,  H05K2203/0278 ,  H05K2203/063 ,  H05K2203/068 ,  H05K2203/1126 ,  H01L2924/00

Abstract: 　配線構造の高密度化を図り得る多層配線基板を得る。　第１の絶縁層（３）と、第１の絶縁層（３）の下面に積層されている第２の絶縁層（４）とを有する積層体（２）内に、印刷配線電極（７，１１）が設けられており、印刷配線電極（７，１１）が導電ペーストの印刷及び焼成により形成されており、該印刷配線電極（７，１１）が、第２の絶縁層（４）上に位置している第１の配線電極部分（７ａ，１１ａ）と、第１の配線電極部分（７ａ，１１ａ）に連なっている第２の配線電極部分（７ｂ，１１ｂ）とを有し、第２の配線電極部分（７ｂ，１１ｂ）が、貫通孔（３ａ，３ｂ）内に至っており、さらに第１の絶縁層（３）の上面に露出している、多層配線基板（１）。

Abstract translation: 本发明实现了能够实现布线结构的高密度化的多层布线基板。 本发明提供一种多层布线基板（1），其中：印刷布线电极（7,11）设置在层叠体（2）内，该叠层体具有第一绝缘层（3）和第二绝缘层（4） 在所述第一绝缘层（3）的下表面上; 印刷布线电极（7,11）通过印刷和烧结导电浆料形成; 并且印刷布线电极（7,11）具有分别位于第二绝缘层（4）上的第一布线电极部分（7a，11a）和与第二绝缘层（4）连续的第二布线电极部分（7b，11b） 各个第一布线电极部分（7a，11a），所述第二布线电极部分（7b，11b）延伸到相应的通孔（3a，3b）内，并暴露在第一绝缘层（3）的顶表面上。

公开(公告)号：WO2010001300A1

公开(公告)日：2010-01-07

申请号：PCT/IB2009/052687

申请日：2009-06-23

Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V. ,  ELZINGA, Marcus, J., G.

Inventor： ELZINGA, Marcus, J., G.

IPC: H05K3/34 ,  H01L33/48 ,  F21K7/00

CPC classification number: H01L33/486 ,  F21K9/00 ,  F21Y2115/10 ,  H01L2924/0002 ,  H05K3/3494 ,  H05K2201/09063 ,  H05K2201/09754 ,  H05K2201/09836 ,  H05K2201/10106 ,  H05K2201/10962 ,  H05K2203/107 ,  H01L2924/00

Abstract: A support module (1), comprising a conducting layer (2) having a trough hole (5) and a receiving surface adapted to receive a solid state light source (3) with the electrical contact pad (4) being aligned with the through hole (5). The support module (1) further comprises an electrical insulation element (8) and at least one contact pin (9), extending through the electrical insulation element (8), and protruding through the through hole (5). Furthermore, the electrical insulation element (8) comprises a channel (10) allowing access to the end of the contact pin (9) and the electrical contact pad (4) of the solid state light source (3) received by the surface of the conducting layer (2). Such a channel makes it possible to reach the end of the contact pin and the contact pad through the insulation element with a soldering tool. Thus, it is possible to attach the solid state light source on a metal surface by soldering the contact pin to the contact pad. Mounting a solid state lighting device on a metal surface is advantageous in applications requiring good heat dissipation, since the heat dissipation properties of a metal surface is better than of a printed circuit board.

Abstract translation: 一种支撑模块（1），包括具有槽孔（5）的导电层（2）和适于接收固态光源（3）的接收表面，所述电接触焊盘（4）与所述通孔 （5）。 支撑模块（1）还包括电绝缘元件（8）和延伸穿过电绝缘元件（8）并且穿过通孔（5）突出的至少一个接触销（9）。 此外，电绝缘元件（8）包括通道（10），允许接触到接触销（9）的端部和由固态光源（3）的表面接收的固态光源（3）的电接触焊盘（4） 导电层（2）。 这样的通道使得可以用焊接工具通过绝缘元件到达接触针和接触垫的端部。 因此，可以通过将接触销焊接到接触焊盘来将固态光源附着在金属表面上。 由于金属表面的散热性优于印刷电路板，所以在金属表面上安装固态照明装置在需要良好散热的应用中是有利的。

公开(公告)号：WO2009034557A3

公开(公告)日：2009-10-15

申请号：PCT/IB2008053714

申请日：2008-09-12

Applicant: NXP BV ,  WYLAND CHRISTOPHER

Inventor： WYLAND CHRISTOPHER

IPC: H01L21/48 ,  H01L23/473 ,  H01L23/538

CPC classification number: H05K3/00 ,  B33Y80/00 ,  H01L21/4846 ,  H01L23/473 ,  H01L23/5389 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2223/6622 ,  H01L2224/16225 ,  H01L2224/24227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01066 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K1/0237 ,  H05K1/185 ,  H05K3/0005 ,  H05K3/0082 ,  H05K3/1241 ,  H05K3/4644 ,  H05K3/4664 ,  H05K2201/09836 ,  Y02P80/30 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of implementing arbitrary structures to provide electrical interconnection and mechanical fixturing for integrated circuits is provided. According to exemplary embodiments of the invention said arbitrary structures are manufactured using three dimensional manufacturing processes employing only additive steps for all materials within the arbitrary structure. Accordingly the arbitrary structure is provided in a single step incorporating mechanical, electrical, and thermal elements as required by the design incorporating simultaneously dielectric and metallic materials. The arbitrary structures may be manufactured directly in association with the integrated circuits or separately for subsequent assembly to the integrated circuits. Arbitrary structures ranging from a fraction of to all of the structural and electrical elements required for packaging the integrated circuit(s) being provided by the arbitrary structures according to the design boundary established.

Abstract translation: 提供了实现任意结构以提供集成电路的电互连和机械夹持的方法。 根据本发明的示例性实施例，所述任意结构是使用对任意结构内的所有材料仅采用添加步骤的三维制造工艺制造的。 因此，任意结构在单个步骤中提供，其包括机械，电和热元件，其根据设计同时包含电介质和金属材料的要求。 任意结构可以直接与集成电路相关联地制造，或者单独地用于随后组装到集成电路。 根据设计边界，由任意结构提供的集成电路封装所需的结构和电气元件的一部分到所有的任意结构。

公开(公告)号：WO2009066121A1

公开(公告)日：2009-05-28

申请号：PCT/IB2007/003575

申请日：2007-11-21

Applicant: NOKIA CORPORATION ,  NOKIA, INC. ,  LIUSVAARA, Tapio

Inventor： LIUSVAARA, Tapio

IPC: H05K1/02 ,  H05K1/18 ,  H04M1/03

CPC classification number: H05K1/02 ,  H04M1/0277 ,  H04M1/035 ,  H04R1/06 ,  H04R1/083 ,  H05K1/0272 ,  H05K1/181 ,  H05K3/0047 ,  H05K2201/0195 ,  H05K2201/09072 ,  H05K2201/09163 ,  H05K2201/09836 ,  H05K2201/10083 ,  Y02P70/611

Abstract: A printed wiring board (46) including a first sound channel (68) extending through the printed wiring board. The sound channel includes a first aperture (74) into the channel on a first side of the printed wiring board and a second aperture (76) into the channel on a second side of the printed wiring board. The second side is angled relative to the first side. The first and second apertures are spaced from each other. The printed wiring board is adapted to be mounted in an apparatus with the first side being placed proximate a sound port (50) through a housing (36) of the apparatus. The sound channel is adapted to transmit sound between the first aperture on the first side and the second aperture on the second side.

Abstract translation: 一种印刷电路板（46），包括延伸穿过印刷电路板的第一声道（68）。 声音通道包括在印刷线路板的第一侧上的通道中的第一孔（74）和在印刷线路板的第二侧上的通道中的第二孔（76）。 第二侧相对于第一侧成角度。 第一和第二孔彼此间隔开。 印刷电路板适于安装在设备中，其中第一侧通过设备的壳体（36）靠近声音端口（50）放置。 声音通道适于在第一侧的第一孔和第二侧上的第二孔之间传输声音。

公开(公告)号：WO2009028463A1

公开(公告)日：2009-03-05

申请号：PCT/JP2008/065117

申请日：2008-08-25

Applicant: 日本電気株式会社 ,  森 透 ,  増田 幸一郎

Inventor： 増田 幸一郎

IPC: H05K1/18 ,  H01L23/12

CPC classification number: H01L23/49816 ,  H01G2/06 ,  H01L23/49805 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/15311 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/145 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09836 ,  H05K2201/10378 ,  H05K2201/10636 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

Abstract: 【課題】　ロウ付けされた半導体装置とプリント配線基板との間隙幅を一定とする際に、ロウの吸い寄せによる接続不良の回避を実現しうるスペーサおよびその製造方法の提供。 【解決手段】　電気絶縁性のベース基材と、少なくとも１個のロウ誘導端子とを有するスペーサであって、前記ベース基材の表面が、底面と、上面と、少なくとも１面の側面とで構成され、前記底面と前記上面とが、互いに接しない面であり、前記側面が、前記底面及び前記上面の一方又は両方に接する面であり、前記ロウ誘導端子が、前記底面の一部と、前記上面の一部と、前記側面の一部又は全部とを被覆しており、前記ロウ誘導端子の前記側面を被覆している部分の表面であるロウ誘導面が、前記底面に対して非垂直である、スペーサ。

Abstract translation: 提供一种间隔物，其能够实现当焊接的半导体器件和印刷电路板之间的间隙宽度恒定时由于焊料的吸引而避免连接不良，以及间隔件的制造方法。 间隔件包括电绝缘基底构件和至少一个焊料引导端子。 基部构件的表面由底面，顶面和至少一个侧面构成，底面和顶面彼此不接触，而侧面接触底面和底面 顶面。 焊料引导端部部分或全部地部分地覆盖底面，顶面部分地覆盖侧面。 作为覆盖侧面的焊料引导端子的一部分的表面的焊料引导面与底面不正交。

公开(公告)号：WO00010370A1

公开(公告)日：2000-02-24

申请号：PCT/US1999/000942

申请日：1999-01-15

IPC: H05K1/11 ,  H01L21/48 ,  H01L23/498 ,  H05K1/02 ,  H05K3/00 ,  H05K3/38 ,  H05K3/40 ,  H01L23/538

CPC classification number: H01L21/486 ,  H01L23/49827 ,  H01L23/4985 ,  H01L2924/0002 ,  H05K3/002 ,  H05K3/388 ,  H05K3/4076 ,  H05K2201/0166 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09854 ,  H01L2924/00

Abstract: A flexible circuit includes a flexible non-conductive substrate (12) having a first surface and a second surface. A first electrically conductive trace (18) is provided on the first surface and a second electrically conductive trace (20) is provided on the second surface. A passage (22) extends through the substrate from an end of the first trace to an end of the second trace. The passage includes a beveled opening (26) of a first size formed in the first side and axially aligned with a second beveled opening (28) of the first size formed in the second side. The first and second openings are interconnected by an aperture axially aligned therewith and being of a second size less than the first size. An electrically conductive surface is provided on the passage for electrically interconnecting the first trace and the second trace.

Abstract translation: 柔性电路包括具有第一表面和第二表面的柔性非导电基底（12）。 第一导电迹线（18）设置在第一表面上，第二导电迹线（20）设置在第二表面上。 通道（22）从第一迹线的末端延伸穿过基底到第二迹线的末端。 通道包括形成在第一侧的第一尺寸的斜切开口（26），并且与形成在第二侧的第一尺寸的第二斜切开口（28）轴向对准。 第一和第二开口通过与其轴向对齐的孔并且具有小于第一尺寸的第二尺寸而相互连接。 在通道上设置导电表面，用于电连接第一迹线和第二迹线。

公开(公告)号：WO1993026143A1

公开(公告)日：1993-12-23

申请号：PCT/CH1993000145

申请日：1993-06-09

Applicant: DYCONEX PATENTE AG ,  SCHMIDT, Walter ,  MARTINELLI, Marco

Inventor： DYCONEX PATENTE AG

IPC: H05K03/00

CPC classification number: H05K3/4655 ,  H05K1/0287 ,  H05K1/0289 ,  H05K1/0393 ,  H05K1/05 ,  H05K1/115 ,  H05K3/0041 ,  H05K3/0061 ,  H05K3/0064 ,  H05K3/0097 ,  H05K3/386 ,  H05K3/4084 ,  H05K3/42 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4635 ,  H05K3/4641 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/066 ,  H05K2201/0909 ,  H05K2201/09327 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09572 ,  H05K2201/09609 ,  H05K2201/09627 ,  H05K2201/09781 ,  H05K2201/09836 ,  H05K2201/09945 ,  H05K2201/10666 ,  H05K2203/0554 ,  H05K2203/0746 ,  H05K2203/1184 ,  H05K2203/1545 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T428/24917

Abstract: The initial intention in the semi-finished product of the invention is to provide a functional separation between the requirement for mechanical strength and the previously concomitant requirement, for completing a circuit, in order to bring the pure circuit connection, especially for signals, "closer" to the electrical and technical properties of chips. To do this, the layout miniaturisation is optimised without regard for the mechanical strength of the substrate. Instead of a printed circuit board (MCM), a semi-finished product which can be developed into a printed circuit board is made. The semi-finished product of the invention consists of an extremely thin film (8) with a plurality of extremely small holes (14) made simultaneously by an etching process. The hole diameters can be reduced by almost an order of magnitude (down to 20 mu m), facilitating, for instance, definite sub-100 mu m technology. Such a semi-finished product (19) does not act as a mechanical support but is designed only for signal conduction. The semi-finished product (19) which carries the densely packed wiring pattern, is bonded to a not densely packed power supply plane (22) acting as the service plane and the printed circuit board thus made is finally secured to a mechanical support (20).

公开(公告)号：US11646246B2

公开(公告)日：2023-05-09

申请号：US16461970

申请日：2017-11-17

Applicant: SAMTEC INC.

Inventor： Tim Mobley ,  Roupen Leon Keusseyan

IPC: H01L29/40 ,  H01L29/06 ,  H01L23/48 ,  H01L21/00 ,  H01K3/10 ,  H01L23/15 ,  H01L23/498 ,  H05K3/40 ,  H05K3/46 ,  H05K3/10 ,  H01L21/48 ,  C03C4/14 ,  C03C8/04 ,  C03C8/18 ,  H01B1/22 ,  H05K1/16 ,  H05K1/03 ,  H05K1/09 ,  H05K3/42 ,  H05K3/00 ,  H01L23/367

CPC classification number: H01L23/481 ,  C03C4/14 ,  C03C8/04 ,  C03C8/18 ,  H01B1/22 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49883 ,  H05K3/101 ,  H05K3/102 ,  H05K3/107 ,  H05K3/4061 ,  H05K3/4076 ,  H05K3/4614 ,  H05K3/4629 ,  C03C2204/00 ,  C03C2205/00 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H05K1/0306 ,  H05K1/095 ,  H05K1/097 ,  H05K1/16 ,  H05K1/162 ,  H05K1/167 ,  H05K3/0029 ,  H05K3/403 ,  H05K3/423 ,  H05K2201/0272 ,  H05K2201/0391 ,  H05K2201/068 ,  H05K2201/09254 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/1006 ,  H05K2203/0182 ,  H05K2203/107 ,  H05K2203/1126 ,  H05K2203/1131 ,  H05K2203/1461 ,  H05K2203/1476

Abstract: Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to a second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.

公开(公告)号：US10014244B2

公开(公告)日：2018-07-03

申请号：US15214532

申请日：2016-07-20

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H05K1/16 ,  H01L23/498 ,  H01L21/48 ,  H01L21/768 ,  H01L23/14 ,  H01L23/48 ,  H05K1/11 ,  H05K3/42 ,  H01L23/00 ,  H05K3/44

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/01024 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

公开(公告)号：US09961768B2

公开(公告)日：2018-05-01

申请号：US14919058

申请日：2015-10-21

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yoshihito Otsubo ,  Toru Meguro ,  Tatsunori Kan

IPC: H05K1/00 ,  H05K1/09 ,  H05K1/11 ,  H05K3/40 ,  H05K3/46 ,  H05K1/02 ,  H05K3/00 ,  H05K3/42 ,  H01L23/498 ,  H01L21/48 ,  H05K3/34

CPC classification number: H05K1/09 ,  H01L21/4867 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/19105 ,  H05K1/0298 ,  H05K1/112 ,  H05K1/115 ,  H05K3/0058 ,  H05K3/3436 ,  H05K3/4038 ,  H05K3/4084 ,  H05K3/42 ,  H05K3/4629 ,  H05K3/4644 ,  H05K3/4667 ,  H05K2201/0376 ,  H05K2201/0382 ,  H05K2201/09545 ,  H05K2201/09627 ,  H05K2201/09836 ,  H05K2201/09845 ,  H05K2201/1006 ,  H05K2203/0278 ,  H05K2203/063 ,  H05K2203/068 ,  H05K2203/1126 ,  H01L2924/00

Abstract: A multilayer wiring substrate that can realize a higher-density wiring structure is obtained. Provided is a multilayer wiring substrate, where a multilayer body including a first insulating layer and a second insulating layer stacked on the bottom surface of the first insulating layer includes printed wiring electrodes; the printed wiring electrodes are formed by printing with and sintering conductive paste; the printed wiring electrodes respectively include first wiring electrode portions located on the second insulating layer and second wiring electrode portions respectively joined to first wiring electrode portions; and the second wiring electrode portions respectively extend into through holes and, further, are exposed at the top surface of the first insulating layer.